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DC and AC Load Line

This document discusses DC and AC load lines for transistors. It covers: 1) How the DC load line shows all possible combinations of collector current (IC) and collector-emitter voltage (VCE) for a given amplifier. The intersection of the load line with the transistor characteristic curve determines the quiescent (Q) point. 2) How an AC signal causes IC and VCE to vary around the Q-point. For optimal performance, the Q-point is placed at the midpoint of the load line. 3) The AC load line differs from the DC load line due to different AC and DC loads. It determines the amplifier's maximum output voltage swing,

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arjuna4306
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3K views

DC and AC Load Line

This document discusses DC and AC load lines for transistors. It covers: 1) How the DC load line shows all possible combinations of collector current (IC) and collector-emitter voltage (VCE) for a given amplifier. The intersection of the load line with the transistor characteristic curve determines the quiescent (Q) point. 2) How an AC signal causes IC and VCE to vary around the Q-point. For optimal performance, the Q-point is placed at the midpoint of the load line. 3) The AC load line differs from the DC load line due to different AC and DC loads. It determines the amplifier's maximum output voltage swing,

Uploaded by

arjuna4306
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Lecture 07

DC and AC Load Line


• DC biasing circuits
• DC and AC equivalent circuit
• Q-point (Static operation point)
• DC and AC load line
• Saturation Cutoff Condition
• Compliance
Book Reference
• Electronic Devices and Circuit Theory by
Robert Boylestad & Louis Nashelsky
( Prentice Hall )
• Electronic Devices by Thomas L. Floyd
( Prentice Hall )
DC Biasing Circuits
• The ac operation of an +VCC
amplifier depends on the
initial dc values of IB, IC, and
VCE.
RC
RB
• By varying IB around an
v out
initial dc value, IC and VCE
are made to vary around their
initial dc values.
v in vce
• DC biasing is a static ib
operation since it deals with
setting a fixed (steady) level ic
of current (through the
device) with a desired fixed
voltage drop across the
device.
Purpose of the DC biasing circuit
• To turn the device “ON”
• To place it in operation in the region of its
characteristic where the device operates
most linearly, i.e. to set up the initial dc
values of IB, IC, and VCE
Voltage-Divider Bias
• The voltage – divider (or +VCC

potentiometer) bias circuit is by


far the most commonly used.
RC
• RB1, RB2
R1
 voltage-divider to set the v out
C2
value of VB , IB C1
v in
• C3
 to short circuit ac signals to R2

ground, while not effect the DC C3


RE
operating (or biasing) of a circuit
(RE  stabilizes the ac signals)
 Bypass Capacitor
Graphical DC Bias Analysis
+VCC
VCC  ICRC  VCE  IERE  0
for I C  I E
1 VCC
IC RC IC  VCE 
RC  RE RC  RE
R1
Point - slope form of straight line equation :
y  mx  c

IC(sat) = VCC/(RC+RE)

R2 DC Load Line
IE
IC
RE (mA)
VCE(off) = VCC

VCE
DC Load Line
•The straight line is know as the DC load line IC(sat) = VCC/(RC+RE)

•Its significance is that regardless of the behavior DC Load Line


of the transistor, the collector current IC and the I C
(mA)
collector-emitter voltage VCE must always lie on VCE(off) = VCC

the load line, depends ONLY on the VCC, RC and VCE

RE
•(i.e. The dc load line is a graph that represents
all the possible combinations of IC and VCE for
a given amplifier. For every possible value of
IC, and amplifier will have a corresponding value
of VCE.)
•It must be true at the same time as the transistor
characteristic. Solve two condition using
What is IC(sat) and VCE(off) ?
simultaneous equation
 graphically  Q-point !!
Q-Point (Static Operation Point)
• When a transistor does not have an ac input, it
will have specific dc values of IC and VCE.
• These values correspond to a specific point on the
dc load line. This point is called the Q-point.
• The letter Q corresponds to the word (Latent)
quiescent, meaning at rest.
• A quiescent amplifier is one that has no ac signal
applied and therefore has constant dc values of IC
and VCE.
Q-Point (Static Operation Point)
• The intersection of the dc bias
value of IB with the dc load line
determines the Q-point.
• It is desirable to have the Q-
point centered on the load line.
Why?
• When a circuit is designed to
have a centered Q-point, the
amplifier is said to be midpoint
biased.
• Midpoint biasing allows
optimum ac operation of the
amplifier.
DC Biasing + AC signal
• When an ac signal is applied to the base of
the transistor, IC and VCE will both vary
around their Q-point values.
• When the Q-point is centered, IC and VCE
can both make the maximum possible
transitions above and below their initial dc
values.
• When the Q-point is above the center on
the load line, the input signal may cause the
transistor to saturate. When this happens, a
part of the output signal will be clipped off.
• When the Q-point is below midpoint on the
load line, the input signal may cause the
transistor to cutoff. This can also cause a
portion of the output signal to be clipped.
DC Biasing + AC signal
DC and AC Equivalent Circuits
+VCC
+VCC

RC IC RC
R1 R1

RL rC
vin vce
vin

R2 R1//R2
R2
IE
RE
RE

rC = RC//RL

Bias Circuit DC equivalent AC equivalent


circuit circuit
AC Load Line
IC(sat) = VCC/(RC+RE)
• The ac load line of a given
amplifier will not follow the
DC Load Line
IC
plot of the dc load line.
(mA)
VCE(off) = VCC • This is due to the dc load of
VCE an amplifier is different from
the ac load.
IC(sat) = ICQ + (VCEQ/rC)
ac load line

ac load line
IC IC Q - point

dc load line
VCE(off) = VCEQ + ICQrC

VCE

VCE
AC Load Line
What does the ac load line tell you?
• The ac load line is used to tell you the maximum
possible output voltage swing for a given common-
emitter amplifier.
• In other words, the ac load line will tell you the
maximum possible peak-to-peak output voltage (Vpp )
from a given amplifier.
• This maximum Vpp is referred to as the compliance of
the amplifier.
(AC Saturation Current Ic(sat) , AC Cutoff Voltage VCE(off) )
AC Saturation Current and AC
Cutoff Voltage

IC(sat) = ICQ + (VCEQ/rC)

ac load line
rC IC
vin vce

R1//R2
VCE(off) = VCEQ + ICQrC

VCE
rC = RC//RL
Amplifier Compliance
• The ac load line is used to tell the maximum
possible output voltage swing for a given
common-emitter amplifier. In another words, the
ac load line will tell the maximum possible peak-
to-peak output voltage (VPP) from a given
amplifier. This maximum VPP is referred to as the
compliance of the amplifier.
• The compliance of an amplifier is found by
determine the maximum possible of IC and VCE
from their respective values of ICQ and VCEQ.
Maximum Possible Compliance
Compliance
The maximum possible transition for VCE is equal to the
difference between VCE(off) and VCEQ. Since this transition is
equal to ICQrC, the maximum peak output voltage from the
amplifier is equal to ICQrC. Two times this value will give
the maximum peak-to-peak transition of the output
voltage: VPP = 2ICQrC (A)

VPP = the output compliance, in peak-to-peak voltage


ICQ = the quiescent value of IC
rC = the ac load resistance in the circuit
Compliance
When IC = IC(sat)­, VCE is ideally equal to 0V. When I­C = ICQ, VCE is at
VCEQ. Note that when IC makes its maximum possible transition
(from ICQ to IC(sat)), the output voltage changes by an amount equal to
VCEQ. Thus the maximum peak-to-peak transition would be equal to
twice this value:
VPP = 2VCEQ (B)
• Equation (A) sets the limit in terms of VCE(off). If the value obtained
by this equation is exceed, the output voltage will try to exceed
VCE(off), which is not possible. This is called cutoff clipping, because
the output voltage is clipped off at the value of VCE(off).
• Equation (B) sets of the limit in terms of IC(sat). If the value obtained
by this equation is exceed, the output will experience saturation
clipping.
Cutoff and Saturation Clipping
• When determining the output compliance for a given
amplifier, solve both equation (A) and (B). The lower of
the two results is the compliance of the amplifier.
Example
• For the voltage-divider bias amplifier
shown in the figure, what is the ac and dc
load line. Determine the maximum output
compliance. +12V

R C
R 1 4.7k 
33 k 
R L
10k 
 = 200

R 2
10k  R E
2.2k 

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