Digital Electronics

Principles & Applications

Seventh Edition

Roger L. Tokheim

Chapter 9
Shift Registers

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 INTRODUCTION
• Overview of Shift Registers
• Characteristics of Shift Registers
• Serial/Parallel Data Conversion
• Serial Load Shift Register
• Parallel Load Shift Register
• Recirculating Shift Register
• Using the 74194 Shift Register IC
• Digital Roulette Game
• Troubleshooting Hints
©2008 The McGraw-Hill Companies, Inc. All rights reserved.
 Overview of Shift Registers
• A shift register is a sequential logic device
made up of flip-flops that allows parallel or
serial loading and serial or parallel outputs
as well as shifting bit by bit.
• Common tasks of shift registers:
– Serial/parallel data conversion
– UART (an example)
– Time delay
– Ring counter
– Twisted-ring counter or Johnson counter
– Memory device
©2008 The McGraw-Hill Companies, Inc. All rights reserved.
Characteristics of Shift Registers
• Number of bits (4-bit, 8-bit, etc.)
• Loading
– Serial
– Parallel (asynchronous or synchronous)
• Common modes of operation.
– Parallel load
– Shift right-serial load
– Shift left-serial load
– Hold
– Clear
• Recirculating or non-recirculating
©2008 The McGraw-Hill Companies, Inc. All rights reserved.
 Serial/Parallel Data Conversion
Shift registers can be used to convert from serial-
to-parallel or the reverse from parallel-to-serial.

Parallel out
Parallel out

11 0 11 00 11 11 11 11 Serial out
Serial in 0
1 0 1 0 1 1 1 1 Serial out

Parallel in

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 QUIZ
Q#1-
Q#2- This
This represents
represents aa___
___ register.
register.
Q#3- This
Q#4- This represents
represents aa ___
___ register.
register.
a.a. Parallel-in,
Parallel-in,parallel-out
parallel-out
a.a. Parallel-in,
Parallel-in,serial
serialout
out
b.
b. Serial-in,
Serial-in,parallel-out
serial-out
b.
b. Serial-in, parallel-out
Parallel-in, parallel-out

ANS:
ANS:serial-in parallel-out
serial-in serial-out
ANS: parallel-in serial-out
ANS: parallel-in parallel-out

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Serial Load Shift Register
Parallel outputs here.
Order= A B C D
1 1
0 0 0
1 0
1
Data =
Data =01
Inputs here: 4-bit
Clock input: serial-in
(1) Data Clock Pulse 2
Positive-edge
Clock Pulse 1
3
4
6
7
5
8 parallel out
(2) Clock
Clear input:
triggering shift right
(3) Clear
Active = 0 =1
Clear 0 shift register
Deactivated = 1

Note the use of D FFs.

Clock (CLK) inputs wired in parallel.
Clear (CLR) inputs can be activated with LOW
or disabled with HIGH.
Preset (PS) inputs deactivated.

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 QUIZ
QUESTION #7 #2
#3
#4
#6
#5
QUESTION #1
What is the 4-bit output (bit A on left, D on right) after pulse 6?
1?
2?
3?
5?
4?
This is a ___ type shift register.
A. Serial-in, parallel out
A: Serial-in,A:
A:parallel-out
0100
1000
1100
0000
0010
1001
B. Parallel-in, serial-out

Data
Data =
Data
Data ==1
1
00
1

Clock
ClockPulse
Clock
Clock Pulse
Pulse26
Pulse 4
13
5

Clear
Clear
Clear =
Clear ==1
1
01

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Parallel Load Shift Register
Outputs here.
Order= A B C D

Parallel data
inputs

(Active LOW)
Recirculating
lines:
Clock input- H-to-L Pass data
Note thefrom
FFD to FFA
recirculating
on each
lines.
Clear input- Active LOW clock pulse.

Note the use of J-K FFs.

Clock (CLK) inputs wired in parallel.
Clear (CLR) input activated with LOW.
Parallel load inputs (A,B,C,D) are active LOW.

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Recirculating Shift Register

11
0 00
101
Parallel
Paralleldata
datainputs=
inputs=
only
C& allD
D
Binactive
activated
activated
active

Clock
Clockpulse
pulse8 7
1
2
3
5
6
4

Clear
Clearinput=
input=1 0
1

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 QUIZ
Q#1-
Q#2- After
After clock
clock pulse
pulse 1,2,the
the output
output from
from the
the shift
shiftregister
register
Q#3-
Q#4- After
After clock
clock pulse
pulse 3,
4,the
the output
output from
from the
the shift
shiftregister
register
will
Q#5-
will be
Q#6-
be ___.
After
___.
After clock
clock pulse
pulse 5,
6,the
the output
output from
from the
the shift
shiftregister
register
will
will be
be ___.
___.
will
willbe
be___.
___.

110011001100
000010011001
Parallel data inputs=
Bnone
and Cactive
active

Clock pulse 6
1
2
3
4
5

Clear input= 1
0

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Universal Shift Register IC
Outputs here

Clear input
Serial data Rightactive
input LOW
used during
Serial Load Right
mode ofdata
Parallel operation
inputs

Order: A, B, C, D
during data
Serial Leftloading
Parallel input
used during
Serial Load Left
mode of operation
Clock input
Mode
L-to-HControls:
triggering

Hold
Parallel load
Shift right
Shift left

74194 Universal 4-bit Shift Register IC.

Modes of operation: Hold, Parallel load, Shift right & Shift left.
An active LOW Clear (CLR) input overrides all others.

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Using the 74194 Shift Register IC

1 0
0 1 1
0 0
1
CLR = 1
0

Serial R = X
0

Parallel Load=
01010

Serial L = 0
X
1

Clock pulse 8
1
2
3
4
5
6
7
(L-to-H)

S0= 0
1

S1= 1
0

X = Irrelevant

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 QUIZ
QUESTION
QUESTION#3 #1
#2
#5
#6
#7
QUESTION #4- What is the mode of operation during and the output of the
The
What
What74194
isisthe
the
IC
mode
mode
could
of
ofbe
operation
operation
described
during
during
as a 4-bit
and
andthe
the
(shift
output
output
right,
ofof
universal)
the
the
shift register after pulse 3?
shift
shiftregister
register.
registerafter
afterpulse
pulse2?
1?
4?
5?
6?
A:A:A:A: A:right,
Parallel
A:
Shift
Shift
Clear,
Hold,Universal
left,
load,
00001
0001
0
0010
1
101
00

? ? ? ?
CLR =
CLR =10
1

X
Serial R = 0

Parallel Load=
Parallel Load=
01
0 10
00 0

Serial L = X
1

1
2
4
Clock pulse 6
3
5
(L-to-H)
(L-to-H)

1
S0= 0

0
S1= 1

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Digital Roulette Game

Audio
Amplifier
1
0
0
1
0 1
0
Power-up
Initializing 0
1 1
0
Spin Circuit
Wheel 1
0 1
0
1
0
+5V input
Voltage
8-bit Simulated
Controlled
Ring Counter Roulette
Oscillator
(shift register) Display
(VCO)

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 QUIZ
Q#1-
Q#2- The block at ABin the digital roulette game
Q#3- The
Theblock
blockat
at Cininthe
thedigital
digitalroulette
roulettegame
game
contains
containsa(n) ___ circuit.
containsa(n)
a(n)___
___circuit.
circuit which is a type of 8-bit shift register.

ANS: voltage-controlled
ANS: audio oscillator (VCO)
amplifier
ANS: ring counter

A C

©2008 The McGraw-Hill Companies, Inc. All rights reserved.

 Simple Troubleshooting Hints

• Feel top of IC to determine if it is hot

• Look for broken connections, signs of
excessive heat
• Smell for overheating
• Check power source
• Trace path of logic through circuit
• Know the normal operation of the circuit
©2008 The McGraw-Hill Companies, Inc. All rights reserved.
 QUIZ
1. The most important factor in successful
troubleshooting is a good knowledge of the
circuit’s normal operation. (True or False) True
2. The first three steps in troubleshooting are to
use your senses to (1) __________ the top of the feel
ICs for overheating, (2) look for broken
connections, and (3) smell for signs of
overheating.
3. The fourth step in troubleshooting is to use
a(n) __________ (logic probe, tachometer) to logic probe
check the power sources to the IC.
4. The fifth step in troubleshooting is to trace
the path of logic through the circuit. (True True
or False)
©2008 The McGraw-Hill Companies, Inc. All rights reserved.
 REVIEW
• Overview of Shift Registers
• Characteristics of Shift Registers
• Serial/Parallel Data Conversion
• Serial Load Shift Register
• Parallel Load Shift Register
• Recirculating Shift Register
• Using the 74194 Shift Register IC
• Digital Roulette Game
• Troubleshooting Hints
©2008 The McGraw-Hill Companies, Inc. All rights reserved.