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Linear Ic Applications: BY Mr. N. Sri Prakash Assistant Professor Dept. of ECE

The document discusses linear integrated circuits and their applications. It describes different types of linear ICs and their usage as audio and radio frequency amplifiers. It also covers differential amplifiers, their configurations and operating principles.
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0% found this document useful (0 votes)
32 views34 pages

Linear Ic Applications: BY Mr. N. Sri Prakash Assistant Professor Dept. of ECE

The document discusses linear integrated circuits and their applications. It describes different types of linear ICs and their usage as audio and radio frequency amplifiers. It also covers differential amplifiers, their configurations and operating principles.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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LINEAR IC APPLICATIONS

BY
Mr. N. SRI PRAKASH M.Tech(Ph.D)
Assistant Professor
Dept. of ECE
INTEGRATED CIRCUITS
• A circuit of transistors, resisters, and capacitors constructed on a
single semiconductor wafer or chip, in which the components are
interconnected to perform a given function.
• In 1958 kilby of Texas Instruments invented first IC.

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Classifications
According to the mode of operation
Linear IC’s
 Digital IC’s

3
LINEAR IC’s
Linear ICs have continuously variable output (theoretically capable of
attaining an infinite number of states) that depends on the input
signal level.
Linear ICs are used as Audio-frequency and Radio-frequency
Amplifiers.

4
Advantages of Integrated Circuits
Miniaturization and hence increased equipment density.
Cost reduction due to batch processing.
Increased system reliability due to the elimination of soldered joints.
Improved functional performance.
Matched devices.
Increased operating speeds.
Reduction in power consumption.

5
IC Package types
Metal can Package
Dual-in-line
Flat pack

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Metal can Packages
The metal sealing plane is at the bottom over which the chip is
bounded.
It is also called transistor pack.

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Dual-in-line Package
The chip is mounted inside a plastic or ceramic case.
The 8 pin DIP is called MINIDIP and also available with 12,14,16,20
pins.

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Flat Pack
The chip is enclosed in a rectangular ceramic case.

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Selection of IC Package

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Factors affecting selection of IC Package
Relative cost
Reliability
Weight of the Package
Ease of Fabrication
Power to be dissipated
Need of external heat sink

11
DIFFERENTIAL AMPLIFIERS

• The function of differential amplifier is to amplify the


difference between two signals.
• The need for differential amplifier in many physical measurements
arises where response from d.c to many megahertz is required. It is
also the basic input stage of an integrated amplifier.

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Block diagram of differential amplifier

13
• The output signal in a differential amplifier is proportional to the
difference between the two input signals.

Vo α (V1 – V2)  VO α Vd
Where,
• V1 & V2 – Two input signals

• Vo – Single ended output

14
Differential Gain (Ad):

Where,
• Ad is the constant of proportionality.
•Ad is the gain with which differential amplifier amplifies the difference between two input
signals.
•Hence it is known as ‘differential gain of the differential amplifier’.

V1-V2= Difference of two voltage


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Vo α ( V + – V - )

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Common Mode Gain (Ac):
• Anaverage
  of thetwo input signals is called common mode signal
denoted as Vc.

Hence, the differential amplifier also produces the output voltage proportional to
common mode signals.
Vo = Ac Vc
Where Ac is the common mode gain.
•Therefore, there exists some finite output for V1 = V2 due to common mode
gain Ac.
•Hence the total output of any differential amplifier can be given as,
Vo = Ad Vd + Ac Vc 17
Common Mode Rejection Ratio (CMRR):
• 
• The ability of a differential amplifier to reject a common mode signal is defined
by a ratio called ‘Common Mode Rejection Ratio’ denoted as CMRR.

• CMRR is defined as the ratio of the differential voltage gain Ad to common


mode gain Ac and is expresses in dB.

CMRR=
CMRR =20 log| Ad / Ac |dB
 
Relation b/w CMRR & Vo
V• o  = Ad Vd + Ac Vc

 = Ad Vd (1+ )

19
FEATURES OF DIFFERENTIAL
AMPLIFIERS:
• High Differential Voltage Gain(Ad).
• High CMRR.
• Low Common mode Voltage Gain(Ac).
• High Input Impedance(zi).
• Low Output Impedance(zo).
• Bandwidth should always Large.
• Should contain Low offset voltages and Currents

20
Configurations of Differential Amplifier:
• The differential amplifier in the difference amplifier stage in the op-amp, can be used in four
configurations.

(i) Dual input, balanced output differential amplifier

(ii) Dual input, unbalanced output differential amplifier

(iii) Single input, balanced output differential amplifier

(iv) Single input, unbalanced output differential amplifier

• Out of these four configurations, the dual input, balanced output is the basic differential amplifier
configuration.

21
(i) DUAL INPUT BALANCED OUTPUT DIFFERENTIAL AMPLIFIER

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DC ANALYSIS OF DIBO DIFFERENTIAL
AMPLIFIER

Fig: DC EQUIVALENT CIRCUIT


FOR DUAL-INPUT BALANCED
OUTPUT DIFFERETIAL AMPLIFIER

23
• Both the Transistors have same characters.
• RE1=RE2 HENCE RE=RE1||RE2
• RC1=RC2 HENCE DENOTED AS RC
• |VCC|= |VEE| and both are measured w.r.t. ground
• Assuming Rs1=Rs2 =Rs

24
• The dc equivalent circuit can be obtained simply by reducing the input
signals Vin1 and Vin2 to zero.
• Note that the internal resistances of the input signals are denoted by
Rin because Rin1 = Rin2.Since both emitter biased sections of the
differential amplifier are symmetrical (matched in all respects), we
need to determine the operating point collector current ICQ and
collector to emitter voltage VCEQ for only one section.
• We shall determine the ICQ and VCEQ values for transistor Q1 only. These
ICQ and VCEQ values can then be used for transistor Q2 also.

25
 Applying Kirchhoff’s voltage law to the base-emitter loop of the
transistor Q1,

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Now let us determine VCE. As IE is known and IE Ic
 
, we can determine the collector voltage of Q 1 as
ÞVC=VCC-ICRC

NEGLECTING THE DROP ACROSS RS, WE CAN SAY THAT THE VOLTAGE AT THE
EMITTER OF Q1 IS APPROXIMATELY EQUAL TO –VBE. HENCE THE COLLECTOR TO
EMITTER VOLTAGE IS

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-RsIB- VBE - RE(2IE)+VEE = 0 
But

 
IC = βIB and Ic IE
since IB = 
=> - VBE - RE(2IE)+VEE = 0
=>

Thus the emitter current through Q1 is determined directly from eq.(1)


as follows :
Þ IE = (VEE - VBE)/(2RE + Rin/Bdc)  (2)
• where VBE = 0.6V for silicon transistors
• VBE =0.2V for germanium transistors
• Generally, Rin/Bdc<< 2RE.Therefore, eqn(2) can be rewritten as
• ICQ=IE = (VEE - VBE)/2RE (3)

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(ii) DUAL INPUT UNBALANCED OUTPUT DIFFERENTIAL AMPLIFIER

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(iii) SINGLE INPUT BALANCED OUTPUT DIFFERENTIAL AMPLIFIER

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(iv) SINGLE INPUT UNBALANCED OUTPUT DIFFERENTIAL AMPLIFIER

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