Scribd
Upload
34 views11 pages

Microprocessor & Controller 10B11CI401

This document outlines the course details, schedule, evaluation, and textbooks for a Microprocessor & Controller course. The course covers topics related to microprocessors, microcontrollers, architecture, programming, interfacing, and more over 14 weeks. Students will have 3 closed-book tests, assignments, quizzes, and a mini project. Labs involve hands-on exercises and regular evaluation of assignments. Attendance and lab records are also part of the evaluation scheme.

Uploaded by

sumansingh143
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
34 views11 pages

Microprocessor & Controller 10B11CI401

This document outlines the course details, schedule, evaluation, and textbooks for a Microprocessor & Controller course. The course covers topics related to microprocessors, microcontrollers, architecture, programming, interfacing, and more over 14 weeks. Students will have 3 closed-book tests, assignments, quizzes, and a mini project. Labs involve hands-on exercises and regular evaluation of assignments. Attendance and lab records are also part of the evaluation scheme.

Uploaded by

sumansingh143
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 11

Microprocessor & Controller

10B11CI401
Course Description
Course contain the following topics
• Introduction to Microprocessor and
Microcontrollers
• Microprocessor and Microcontroller Architecture
• Addressing modes: addressing mode , 80x86
• 8086/8088 Hardware specification
• Programming the Microprocessors and
Microcontroller
• Memory Interface
• Interrupts for Microprocessors and
Microcontrollers
• I/O Interfacing: Memory organization &
Interfacing, Internal architecture and
programming of I/O Chips
• Direct Memory Access & DMA Controlled I/O
• Serial Data Communications
Weekly Lecture plan
Week No. Topic(s) Lecture Hrs Topic Reference

1 Introduction to microprocessor (including 8085) 3 T1: 1


2 Microprocessor architecture 2 T1: 2
2 &3 Addressing modes of 80x86 3 T1:3
3&4 8086 family hardware specification 4 T1: 9
5&6 Programming the microprocessor 6 T1: 4, 5, 6, 7
7 Memory interfacing with 80x86 family 2 T1: 10
7&8 Interrupts for microprocessor 3 T1: 12
8&9 I/O interfacing IC’s 4 T1: 11
10 DMA Controllers 2 T1: 13
10 & 11 Introduction of Microcontroller & Architecture 2 T2: 1,3
11 Addressing modes of 8051 & programming 2 T2:4,5,10
12 Memory interfacing & interrupts of 8051 2 T2: 3,8
12 & 13 Serial data communication 2 T2: 11
13 Introduction to embedded systems 2 T1: 14, 16, 17, 18, 19
T2: 10
14 System design notation and system testing 2 T2: 9
Text and Reference Books

Text Book:
• T1: The Intel Microprocessors 80x86, Pentium, Pentium Pro Processor, Pentium
II, Pentium III, Pentium IV Architecture, Programming and Interfacing by Berry B.
Bray, Six Edition, Prentice Hall
• T2: The 8051 microcontrollers Architecture, Programming & application ,2nd
edition by Kenneth .J. Ayala

Reference Book:
1. R1: R.S. Gaonkar, “Introduction to Microprocessors”, Wiley Eastern (Latest
Edition)
2. R2: Advanced microprocessors and peripherals by AK Ray & K M Bhurchandi
3. R3: Douglas Hall, “Microprocessors & Interfacing, Programming and
Hardware”, TMH.
4. R4: The 8086 Microprocessors programming & Interfacing the PC by Ayala
5. R5: Embedded controller hardware design By Ken Arnold
6. R6: Embedded Systems Design With 8051 Microcontrollers: Hardware and
Software By Knud Smed Christensen, Zdravko Karakehayov, Ole Winther
Assignment Details

Assignment Expected date of Based of Coverage Expected Date of


No. floating the in Week No. Submission
assignment
1. 1st Feb, 2011 1 to 3 6th Feb, 2011
2. 22nd March, 2011 4 to 8 27th March, 2011
3. 10th May, 2011 9 to 14 15th May, 2011
Evaluation Scheme:

Component & Duration Marks / Coverage


Nature Weightage
Test-1 1 hrs 15 Topics covered up to T-1
(Closed Book)
Test-2 1 hrs 30 min. 25
(Closed Book) Topic covered up to T-2
Test-3 2 hrs 35 Full syllabus
(Closed Book)

Assignments ------ 05 -----


Attendance ------ 05

Quiz ( may be online) 1 hrs. 05 Full syllabus ( any time during


1 or 2 session)
Tutorial 10

Total 100
Microprocessor & Controller
Lab
10B17CI407
Text and Reference Books

Text Book:
1. The Intel Microprocessors 80x86, Pentium, Pentium Pro Processor, Pentium II,
Pentium III, Pentium IV Architecture, Programming and Interfacing by Berry B.
Bray, Six Edition, Prentice Hall
2. Advanced Microprocessors and Interfacing by Ram, Badri, 1st Edition, Tata
McGraw Hill

Reference Book:
1. The 8051 microcontrollers Architecture, Programming & application ,2nd
edition by Kenneth .J. Ayala
2. Embedded controller hardware design By Ken Arnold
3. Embedded Systems Design With 8051 Microcontrollers: Hardware and Software
By Knud Smed Christensen, Zdravko Karakehayov, Ole Winther
Evaluation Scheme:

1. Regular Evaluation 15
2. Test-1 (P1) 15
3. Test-2 (P2) 15
4. Attendance 05
5. Mini Project 50 ( 20% marks in P1, 20% Marks in P2,
60% Marks in Final Submission)

Total 100
Process of regular Evaluation:
1. Every Lab will have weight-age of 10 marks.

2. Assignments will be floated on the same day separately for all lab days.

3. Problems in assignment may be categorized at Micro Level i.e. it mentioned there-


what should be done in Lab on that day & what should be treated as take home
assignment.

4. For the assignment of same day the students will be evaluated out of 10 marks, and
full marks will be awarded to those students who will be able to solve the problem
without help of any one, only on the basis of his knowledge and matter delivered
during lectures/ lab informative sessions. All such evaluation will be done in later
half of the Lab on call of students.

5. If few other students are able to solve the problem with the help of faculty, such
students may be awarded 6 to 9 marks depending on the input provided as help.
Concern faculty should decide such issue at his/her own discretion.
Process of regular Evaluation: Cntd.
6. If few students are not in situation to solve the problem even with the help of
faculty they will be allowed to show the solution in next Lab Session. He/She
will be allowed to take help of all the means to solve the problem in off Lab Hrs.
In next lab session he/she will be evaluated thoroughly well supported by viva.
At that time he/she will be evaluated only out of 5 marks (his maximum marks
will be 5 only). In first half of the Lab faculty will evaluate the Lab solutions of
such previous Labs.
7. Those, who will not be able to solve the problem in next turn also or found absent
in any lab they will be awarded 0 marks.
8. All the students must also maintain the Lab records (in hard copy wherever
possible); it will be checked /signed by faculties regularly.

You might also like