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Debugger: Submitted by Sachin B K

The document discusses how an ARM debug unit can be used to debug application software, operating systems, and hardware systems running on ARM processors. It describes a typical debug system consisting of a debug host computer running debugging software, a protocol converter interfacing the debug host and ARM processor, and the ARM7TDMI-S processor as the debug target. The debug target allows halting execution, examining state, setting breakpoints, and resuming execution for debugging purposes.

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pikumarkrishna
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25 views

Debugger: Submitted by Sachin B K

The document discusses how an ARM debug unit can be used to debug application software, operating systems, and hardware systems running on ARM processors. It describes a typical debug system consisting of a debug host computer running debugging software, a protocol converter interfacing the debug host and ARM processor, and the ARM7TDMI-S processor as the debug target. The debug target allows halting execution, examining state, setting breakpoints, and resuming execution for debugging purposes.

Uploaded by

pikumarkrishna
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Debugger

Submitted by
Sachin B K

1
Debugger
The ARM debug unit assists in debugging software
running on the ARM processor. We can use an ARM
debug unit, in combination with a software debugger
program, to debug:
application software
operating systems
ARM processor based hardware systems.

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Typical debug system

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Debug host: A computer that is running a software
debugger such as the ARM Debugger for Windows
(ADW).

Protocol converter: This interfaces between the high-


level commands issued by the debug host and the low-
level commands of the ARM7TDMI processor JTAG
interface.

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Debug target :The ARM7TDMI-S processor has
hardware extensions that ease debugging at the lowest
level. These extensions enable you to:
 halt program execution
 examine and modify the internal state of the core
 examine the state of the memory system
 execute abort exceptions, enabling real-time
monitoring of the core
 resume program execution.

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Controlling debugging
The major blocks of the ARM7TDMI-S processor are:
ARM CPU core: This has hardware support for
debug.
Embedded ICE macrocell: A set of registers and
comparators that you use to generate debug exceptions
(such as breakpoints).
TAP controller: Controls the action of the scan chains
using a JTAG serial interface.

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ARM7TDMI-S block diagram

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Debug modes
Halt mode When the system is in halt mode, the core
enters debug state when it encounters a breakpoint or a
watchpoint.
Monitor mode When the system is in monitor mode,
the core does not enter debug state on a breakpoint or
watchpoint.

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Entry into debug state
If the system is in halt mode, any of the following types
of interrupt force the processor into debug state:
a breakpoint (a given instruction fetch)
a watchpoint (a data access)
an external debug request.
In monitor mode, the processor continues to execute
instructions in real time, and will take an abort
exception. The abort status register enables to establish
whether the exception was due to a breakpoint or
watchpoint, or to a genuine memory abort.

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EmbeddedICE
The EmbeddedICE-RT logic can be used to program
the conditions under which a breakpoint or watchpoint
can occur. Alternatively, we can use the DBGBREAK
signal to enable external logic to flag breakpoints or
watchpoints and monitor the following:
address bus
data bus
control signals.

10
EmbeddedICE Debug Environment Block
Diagram

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EmbeddedICE
Allows the software debugger to talk via a JTAG port
directly to the core.
Inserts instructions directly in to the ARM7TDMI-S
core.
The ARM7TDMI-S core or the System state can be
examined, saved or changed depending on the type of
instruction inserted.

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THANK YOU

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