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Sequence Detector

Here are the steps to design an overlapping 101 Mealy sequence detector: 1. The state diagram will have 2 states - State 0 and State 1. There will be a self loop on state 1 for the 0 input. 2. Code assignment - State 0 = 00, State 1 = 01 3. The present state/next state table will be: Present State | Input | Next State :-: | :-: | :-: 0 | 0 | 0 0 | 1 | 1 1 | 0 | 1 1 | 1 | 1 4. The K-maps for Dx, Dy and Z will be: Dx = A'B' + AB Dy =

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Prathap Vuyyuru
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1K views

Sequence Detector

Here are the steps to design an overlapping 101 Mealy sequence detector: 1. The state diagram will have 2 states - State 0 and State 1. There will be a self loop on state 1 for the 0 input. 2. Code assignment - State 0 = 00, State 1 = 01 3. The present state/next state table will be: Present State | Input | Next State :-: | :-: | :-: 0 | 0 | 0 0 | 1 | 1 1 | 0 | 1 1 | 1 | 1 4. The K-maps for Dx, Dy and Z will be: Dx = A'B' + AB Dy =

Uploaded by

Prathap Vuyyuru
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Sequence Detector

Introduction
• A sequence detector is a sequential state machine that takes an input
string of bits and generates an output 1 whenever the target sequence
has been detected. 
Introduction
• Sequence detector is of two types: 
Overlapping
Non-Overlapping
• In an overlapping sequence detector, the last bit of one sequence
becomes the first bit of the next sequence.
• However, in a non-overlapping sequence detector, the last bit of one
sequence does not become the first bit of the next sequence.
Introduction
For example, take a sequence 1101
• For Non-overlapping 
                 Input :     1 1 0 1 1 0 1 1 0 1
              Output: 
For 1-bit Overlapping
                 Input :     1 1 0 1 1 0 1 1 0 1
              Output: 
Introduction
For example, take a sequence 11011

For 2-bit Overlapping


                 Input :     1 1 0 1 1 0 1 1 0 1 1
              Output: 
Mealy Model
For Mealy model we require N states for N-bit sequence

• For Non-Overlap, move the last bit to reset state


• For 1-bit overlap, compare the last bit to 1-bit state
• For 2-bit overlap, compare the last two bits to 2-bit state,
then For 1-bit to 1-bit state otherwise go to reset state.
Moore Model
For Mealy model we require (N+1) states for N-bit
sequence. The extra state is to represent output.
• For Non-Overlap, compare the last bit to 1-bit state
• For 1-bit overlap, compare the last two bits to 2-bit state, then For 1-
bit to 1-bit state otherwise go to reset state.
• For 2-bit overlap, compare the last three bits to 3-bit state, then the last
two bits to 2-bit state, then For 1-bit to 1-bit state otherwise go to
reset state.
Draw the state table for the Non-overlap sequence 1101
with Mealy model
Draw the state table for the 1-bit overlap sequence 1101
with Mealy model
Draw the state table for the 2-bit overlap sequence
11011 with Mealy model
Draw the state table for the Non-overlap sequence 1101
with Moore model
Draw the state table for the 2-bit overlap sequence
11011 with Moore model
Assignment
• Draw the state diagram for the sequence 1011 with
1) Moore Machine (Non-Overlapping)
2) Mealy Machine (Non-Overlapping)
3) Moore Machine (Overlapping)
4) Mealy Machine (Overlapping)
Draw the state tables for the sequence 1011 with 
1) Moore Machine (Non-Overlapping)      2) Mealy Machine (Non-Overlapping)
3) Moore Machine (Overlapping)              4) Mealy Machine (Overlapping)

1                                         2                                    3                                   4
Assignment
• Draw the state tables for the sequence 101 with 
1) Moore Machine (Non-Overlapping)
2) Mealy Machine (Non-Overlapping)
3) Moore Machine (Overlapping)
4) Mealy Machine (Overlapping)
Draw the state tables for the sequence 101 with 
1) Moore Machine (Non-Overlapping)      2) Mealy Machine (Non-Overlapping)
3) Moore Machine (Overlapping)              4) Mealy Machine (Overlapping)

1                                                         2                                                       3                                       4
Realization of FSM using Flip-flops 
• Step 1: Develop the state diagram
• Step 2: Code Assignment
• Step 3: Make Present State/Next State table
• Step 4: Draw K-maps for Dx, Dy and output (Z) 
• Step 5: Finally implement the circuit 
Design a overlapping 101 Mealy sequence
detector.

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