Input/Output Organization

l The computer system's input/output (I/O) architecture is its interface to the outside
world.
l Till now we have discussed the two important modules of the computer system -
m The processor and
m The memory module.
l The third key component of a computer system is a set of I/O modules
l
Each I/O module interfaces to the system bus and controls one or more peripheral
devices.
There are several reasons why an I/O device or peripheral device is not directly connected to the
system bus. Some
of them are as follows -
l There are a wide variety of peripherals with various methods of operation. It would be
impractical to include the
necessary logic within the processor to control several devices.
l The data transfer rate of peripherals is often much slower than that of the memory or
processor. Thus, it is
impractical to use the high-speed system bus to communicate directly with a peripheral.
l Peripherals often use different data formats and word lengths than the computer to which they
are attached.
Thus, an I/O module is required.
Input/Output Modules
The major functions of an I/O module are categorized as follows –
m Control and timing
m Processor Communication
m Device Communication
m Data Buffering
m Error Detection
During any period of time, the processor may communicate with one or more external devices in
unpredictable
manner, depending on the program's need for I/O.
The internal resources, such as main memory and the system bus, must be shared among a
number of activities,
including data I/O.
<<
Control & timings:
The I/O function includes a control and timing requirement to co-ordinate the flow of traffic
between internal
resources and external devices.
For example, the control of the transfer of data from an external device to the processor might
involve the following
sequence of steps –
a. The processor interacts with the I/O module to check the status of the attached device.
b. The I/O module returns the device status.
c. If the device is operational and ready to transmit, the processor requests the transfer of
data, by means of a
command to the I/O module.
d. The I/O module obtains a unit of data from external device.
e. The data are transferred from the I/O module to the processor.
If the system employs a bus, then each of the interactions between the processor and the I/O
module involves one or
more bus arbitrations.
Processor & Device Communication
During the I/O operation, the I/O module must communicate with the processor and with the
external device.
Processor communication involves the following -
Command decoding :
The I/O module accepts command from the processor, typically sent as signals on control bus.
Data :
Data are exchanged betweeen the processor and the I/O module over the data bus.
Status Reporting :
Because peripherals are so slow, it is important to know the status of the I/O module. For
example, if an I/O module is asked to send data to the processor(read), it may not be ready to
do so because it is still working on the previous I/O command. This fact can be reported with a
status signal. Common status signals are BUSY and READY.
Address Recognition :
Just as each word of memory has an address, so thus each of the I/O devices. Thus an I/O
module must recognize one unique address for each peripheral it controls.
One the other hand, the I/O must be able to perform device communication. This
communication involves command,
status information and data.
Data Buffering:
An essential task of an I/O module is data buffering. The data buffering is required due to
the mismatch
of the speed of CPU, memory and other peripheral devices. In general, the speed of CPU is
higher than
the speed of the other peripheral devices. So, the I/O modules store the data in a data
buffer and
regulate the transfer of data as per the speed of the devices.
In the opposite direction, data are buffered so as not to tie up the memory in a slow
transfer operation.
Thus the I/O module must be able to operate at both device and memory speed.
Error Detection:
Another task of I/O module is error detection and for subsequently reporting error to the
processor. One
class or error includes mechanical and electrical malfunctions reported by the device (e.g.
paper jam).
Another class consists of unintentional changes to the bit pattern as it is transmitted from
devices to the I/
O module.
There will be many I/O devices connected through I/O modules to the system. Each device
will be identified by a unique address.
When the processor issues an I/O command, the command contains the address of the
device that is used by the command. The I/O module must interpret the address lines to
check if the command is for itself.
Generally in most of the processors, the processor, main memory and I/O share a common
bus(data address and
control bus).
Two types of addressing are possible -
l Memory-mapped I/O
l Isolated or I/O mapped I/O
Memory-mapped I/O:
There is a single address space for memory locations and I/O devices.
The processor treats the status and address register of the I/O modules as memory location.
For example, if the size of address bus of a processor is 16, then there are 2 16 combinations
and all together 216 address locations can be addressed with these 16 address lines.
Out of these 216 address locations, some address locations can be used to address I/O devices
and other locations are used to address memory locations.
Since I/O devices are included in the same memory address space, so the status and address
registers of I/O modules are treated as memory location by the processor. Therefore, the
same machine instructions are used to access both memory and I/O devices.
Isolated or I/O -mapped I/O:
In this scheme, the full range of addresses may be available for both.
The address refers to a memory location or an I/O device is specified with the help of a
command line.
In general command line is used to identify a memory location or an I/O device.
if IO/M’ =1, it indicates that the address present in address bus is the address of an I/O
device.
if IO/M’ =0, it indicates that the address present in address bus is the address of a memory
location.
Since full range of address is available for both memory and I/O devices, so, with 16 address
lines, the system may now support both 2 16 memory locations and 2 16 I/O addresses.
Input / Output Subsystem
There are three basic forms of input and output systems –
m Programmed I/O
m Interrupt driven I/O
m Direct Memory Access(DMA)
With programmed I/O, the processor executes a program that gives its direct control of the I/O
operation, including
sensing device status, sending a read or write command, and transferring the data.
With interrupt driven I/O, the processor issues an I/O command, continues to execute other
instructions, and is
interrupted by the I/O module when the I/O module completes its work.
In Direct Memory Access (DMA), the I/O module and main memory exchange data directly
without processor
involvement.
With both programmed I/O and Interrupt driven I/O, the processor is responsible for
extracting data from main
memory for output operation and storing data in main memory for input operation.
To send data to an output device, the CPU simply moves that data to a special memory
location in the I/O address
space if I/O mapped input/output is used or to an address in the memory address space
if memory mapped I/O is
used.
Data I/O Address Space (in memory) if I/O mapped input/output is used
memory address space if memory mapped I/O is used
To read data from an input device, the CPU simply moves data from the address (I/O or
memory) of that device into
the CPU.
Input/Output Operation: The input and output operation looks very similar to a
memory read or write operation
except it usually takes more time since peripheral devices are slow in speed than main
memory modules.
Input/Output Port
An I/O port is a device that looks like a memory cell to the computer but contains connection
to the outside world.
An I/O port typically uses a latch. When the CPU writes to the address associated with the
latch, the latch device
captures the data and makes it available on a set of wires external to the CPU and memory
system.
The I/O ports can be read-only, write-only, or read/write. The write-only port is shown in the
figure.
First, the CPU will place the address of the device on the I/O address bus and with the help of
address decoder a
signal is generated which will enable the latch.
Next, the CPU will indicate the operation is a write operation by putting the
appropriate signal in CPU write control line.
Then the data to be transferred will be placed in the CPU bus, which will be
stored in the latch for the onward transmission to the device.
Both the address decode and write control lines must be active for the latch to
operate.
The read/write or input/output port is shown in the figure.
The device is identified by putting the appropriate address in the I/O address
lines. The address decoder will generate the signal for the address decode lines.
According to the operation, read or write, it will select either of the latch.
If it is a write operation, then data will be placed in the latch from CPU for
onward transmission to the output device.
If it is in a read operation, the data that are already stored in the latch will be transferred to the
CPU.
A read only (input) port is simply the lower half of the figure.
In case of I/O mapped I/O, a different address space is used for I/O devices. The address space
for memory is
different. In case of memory mapped I/O, same address space is used for both memory and I/O
devices. Some of the
memory address space are kept reserved for I/O devices.
To the programmer, the difference between I/O-mapped and memory-mapped input/output
operation is the
instruction to be used.
For memory-mapped I/O, any instruction that accessed memory can access a memory-mapped
I/O port.
I/O-mapped input/output uses special instruction to access I/O port.
Generally, a given peripheral device will use more than a single I/O port. A typical PC parallel
printer interface, for
example, uses three ports, a read/write port, and input port and an output port.
The read/write port is the data port ( it is read/write to allow the CPU to read the last ASCII
character it wrote to the
printer port ).
The input port returns control signals from the printer.
- These signals indicate whether the printer is ready to accept another character, is off-line,
is out of paper, etc.
The output port transmits control information to the printer such as
- whether data is available to print.
Memory-mapped I/O subsystems and I/O-mapped subsystems both require the CPU to move
data between the
peripheral device and main memory.
For example, to input a sequence of 20 bytes from an input port and store these bytes into
memory, the CPU must
send each value and store it into memory.
Programmed I/O:
In programmed I/O, the data transfer between CPU and I/O device is carried out with the help of
a software routine.
When a processor is executing a program and encounters an instruction relating to I/O, it
executes that I/O
instruction by issuing a command to the appropriate I/O module.
The I/O module will perform the requested action and then set the appropriate bits in the I/O
status register.
The I/O module takes no further action to alert the processor.
It is the responsibility of the processor to check periodically the status of the I/O module until it
finds that the
operation is complete.
In programmed I/O, when the processor issuses a command to a I/O module, it must wait until
the I/O operation is
complete.
Generally, the I/O devices are slower than the processor, so in this scheme CPU time is wasted.
CPU is checking the
status of the I/O module periodically without doing any other work.
I/O Commands
To execute an I/O-related instruction, the processor issues an address, specifying the particular
I/O module and
external device, and an I/O command. There are four types of I/O commands that an I/O module
will receive when it
is addressed by a processor –
l Control : Used to activate a peripheral device and instruct it what to do. For example, a
magnetic tape unit
may be instructed to rewind or to move forward one record. These commands are specific to a
particular type
of peripheral device.
l Test : Used to test various status conditions associated with an I/O module and its peripherals.
The
processor will want to know if the most recent I/O operation is completed or any error has
occurred.
l Read : Causes the I/O module to obtain an item of data from the peripheral and place it in the
internal buffer.
l Write : Causes the I/O module to take an item of data ( byte or word ) from the data bus and
subsequently
transmit the data item to the peripheral.