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Parity Bit Generator and Checker

A parity bit is an extra bit added to binary data to make the total number of 1s either even or odd. A parity generator adds the parity bit to create the transmission signal, while a parity checker detects errors by comparing the number of 1s received to what was sent. The main difference is that the generator creates the parity bit while the checker verifies it to detect errors caused during transmission. Common implementations include using integrated circuits like the 74180 chip to generate or check parity for 9-bit codes.

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269 views16 pages

Parity Bit Generator and Checker

A parity bit is an extra bit added to binary data to make the total number of 1s either even or odd. A parity generator adds the parity bit to create the transmission signal, while a parity checker detects errors by comparing the number of 1s received to what was sent. The main difference is that the generator creates the parity bit while the checker verifies it to detect errors caused during transmission. Common implementations include using integrated circuits like the 74180 chip to generate or check parity for 9-bit codes.

Uploaded by

Prateek Yadav
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Parity bit generator and checker

Parity Bit

3-bit parity generator

• Even
• Odd

3-bit parity checker

• Even COMP C 60
• Odd
61
62
A parity bit is an extra bit in any binary message to make
the total number of 1’s either odd or even. We need to add
the parity bit to a signal.

What is a
Parity Bit?
This is done by the Parity generator. This parity inclusive
binary message then transmits from transmitter to receiver
end.

The Parity Checker matches the number of 1’s at the


receiver’s end with that of the transmitter’s end to check for
errors. If there is a change in the number of 1s at the
receiving end, then that detects the presence of an error. 
Binary information transmitted through form of communication
medium is subject to external noise that could change bits from
1 to 0, and vice versa.

An error detection code detects digital errors during


Why use transmission.

Parity bit? detected errors cannot be corrected but their presence is


indicated.

The most common error detection code used is the parity bit.
What is the The primary difference between parity generator and a parity
difference checker is that a parity generator is a combinational logic circuit
 we use in the generation of the parity bit.

between a
Parity On the other hand, a parity checker is a circuit that checks the
parity (number of 1s) of the message signal.

Generator and
a Parity
Both these circuits are located at different sites based on their
working. A parity generator is present at the transmitter end to
generate the parity bit.
Checker?
Later it combines with the message signal. The Parity checker is
present at the receiver end for error detection through parity bit
count.
A Parity Generator is a Combinational Logic Circuit that
Generates the Parity bit in the Transmitter.

A Parity bit is used for the Purpose of Detecting Errors


during Transmissions of binary Information.

Parity bit It is an Extra bit included with a binary Message to Make the
Number of 1's either Odd or Even
generator Two Types of Parity:
• Even Parity : the total number of bits in the message(i.e.1) is made even.
• Odd Parity: the total number of bits in the message (i.e.1) is made odd.
3-bit parity bit generator
Decimal equivalent Message(XYZ) Even parity(P) Odd parity(P)
0 000 0 1
1 001 1 0
2 010 1 0
3 011 0 1
4 100 1 0
5 101 0 1
6 110 0 1
7 111 1 0
Logic circuit for parity Generator

X
X Y
Y X Z
Z P
X
P
Y
Y

P
P Z
Z
A Circuit that Checks the Parity in the Receiver is called Parity
Checker

The Parity Checker Circuit Checks for Possible Errors in the

Parity
Transmission.

checker Since the Information Transmitted with Even Parity, the


Received must have an even number of 1's If it has odd number
of 1's, it indicates that there is a Error occurred during
Transmission

The Output of the Parity Checker is denoted by PEC (Parity


Error Checker) If there is error, that is, if it has odd number of
1's, it will indicate 1 If no then PEC will indicate 0.
Deci. Equi. X Y Z P PEC
EVEN Parity 0 0 0 0 0 0
Error checker of 1 0 0 0 1 1
4-bit received 2 0 0 1 0 1
message 3 0 0 1 1 0
4 0 1 0 0 1
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 1
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 1
12 1 1 0 0 0
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 0
Deci. Equi. X Y Z P PEC
0 0 0 0 0 1
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 1 ODD PARITY
4 0 1 0 0 0
ERROR
5
6
0
0
1
1
0
1
1
0
1
1
CHECKER OF
7 0 1 1 1 0 4BIT
8 1 0 0 0 0
RECEIVED
9
10
1
1
0
0
0
1
1
0
1
1
MESSAGE
11 1 0 1 1 0
12 1 1 0 0 1
13 1 1 0 1 0
14 1 1 1 0 0
15 1 1 1 1 1
EVEN PEC
ZP
XY 00 01 11 10 Boolean Expression:
00 0 1 0 1
PEC=X’Y’(Z’P+ZP’)+A’B(Z’P’+ZP)
01 1 0 1 0
+XY(Z’P+ZP’)+XY’(Z’P’+ZP)
11 0 1 0 1 PEC=(X’Y’+XY)(Z⊕P)+(X’Y+XY’)(Z⊕P)’
PEC=(X⊕Y) ⊕(Z⊕P)
10 1 0 1 0

ZP ODD PEC
00 01 11 10
XY 1 0 1 0
Boolean expression:
00
0 1 0 1
01 PEC = ((X ⊕ Y)’ ⊕(Z ⊕ P)’)
1 0 1 0
11
0 1 0 1
10
Logic circuit for parity error checker
3-bit odd parity checker
X

X
Y
PEC Y
PEC

Z
Z

P P
There are different types of parity generator
/checker ICs are available with different input
configurations such as 5-bit, 4-bit, 9-bit, 12-bit,
etc.

Parity
Generator/Checker One of the most commonly used and standard
ICs type of parity generator/checker IC is 74180.

It is a 9-bit parity generator or checker used to


detect errors in high speed data transmission or
data retrieval systems.
Parity
Generator/Checker
ICs

◦ This IC can be used to generate a


9-bit odd or even parity code or it
can be used to check for odd or
even parity in a 9-bit code (8 data
bits and one parity bit).
◦ If this IC is used as an Even Parity
Checker and when a parity error
occurs, the ‘sum even’ output goes
low and ‘sum odd’ output goes
high. If this IC is used as an Odd
Parity Checker, the number of
input bits should be odd, but if an
error occurs the ‘sum odd’ output
goes low and ‘sum even’ output
goes high
This Photo by Unknown Author is licensed under CC BY-SA

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