COMPARATIVE STUDY OF MULTI LEVEL INVERTERS BASED

ON THE OUTPUT TOTAL HARMONIC DISTORTION

Binny Sharma
M.Tech ( POWER ENGG.)
Uni. Roll No. 1806095
 INTRODUCTION
World electricity energy consumption is steadily increasing which specifically
requests more electricity generation from renewable energy resources (wind
and solar). As a statistical approach total electricity consumption will be 61%
higher in 2030 than in 2011. In addition, renewable energy reaches 6% of
global energy production by 2030, up from 2% in 2011.
Multi-level inverters are widely used as stationary power converters for very
high-power operations such as FACTS devices, HVDC light transmission and AC
drives. One of the powerful benefits of multi-level modeling is the minimal
harmonic in the output waveform without reducing the inverter power output
and controlling the speed of a single-phase induction motor for low dissipation
of electrical energy.
In electric high-power applications multilevel inverters have become more
popular over the years with less voltage disturbances and the possibility of
operating at lower switching frequencies than ordinary two-stage inverter.
 COMPONENTS USED FOR DESIGNING OF MULTILEVEL

DC-Sources:Direct current is created by sources such as AC power supplies with rectifiers,

batteries, thermocouples, solar cells, or dynamos.

Inverter:An inverter is an electronics device or circuit that converts electrical energy (DC)
into AC. The input voltage, output voltage, Frequency and total Power depends upon design
and electronic equipment of inverter.

IGBT:An insulated-gate bipolar semiconductor device (IGBT) is a 3 terminal power

semiconductor that widely use as electronics switch.
 Advantages of Multi-Level Inverter over conventional two-
level Inverter
multilevel inverter has many advantages over a standard two-level inverter
that uses high switch frequency pulse width modulation (PWM). the
foremost attractive options of a multilevel inverter are as follows:
It generates output voltages with very low distortion and lower dv/dt.
 It draws input current with terribly low distortion.
 They generate smaller common-mode (CM) voltage.
 They will operate with a lower switch frequency.
 TYPES OF MODULAR MULTILEVEL INVERTERS
Multilevel inverters are three types.

Diode Clamped MLI

Figure presents functioning of a three-level
diode-clamped inverter. Here series-
connected capacitors 𝑐1 and 𝑐2 divide the
DC-bus voltage. The middle point of the
capacitors is considered as the neutral
point. The output 𝑣𝑎𝑛 will have three levels
± 𝑣𝑑𝑐/2, 0. When switches 𝑠1, 𝑠2 are
turned on then 𝑣𝑎𝑛 = +𝑣𝑑𝑐/2. while 𝑠′1, 𝑠
′2are turned on then 𝑣𝑎𝑛 = −𝑣𝑑𝑐/2 and for
the 0 level 𝑠2, 𝑠′1 𝑎𝑟𝑒 on. Then 𝐷1 𝑎𝑛𝑑 𝐷2
are clamping diodes.
Flying Capacitor MLI

Figure describes a three-level flying capacitor inverter.

Here series-connected capacitors 𝑐1 and 𝑐2 divide the DC-

bus voltage. The middle point of the capacitors is

considered as the neutral point. The output 𝑣𝑎𝑛 will have

three levels ±𝑣𝑑𝑐/2, 0.When switches 𝑠1, 𝑠2 are turned on

then 𝑣𝑎𝑛 = +𝑣𝑑𝑐/2. while 𝑠′1, 𝑠′2are turned on then 𝑣𝑎𝑛 =

−𝑣𝑑𝑐/2 and for the 0 level either 𝑠1, 𝑠′1 𝑜𝑟 𝑠2, 𝑠′2 𝑎𝑟𝑒 on.

The 𝐶 is clamping capacitor.

Cascaded Multi Level Inverter
. Figure presents a single-phase CHB inverter. It uses
two identical isolated DC supply in order to produce
five-level in the output. It produces five-levels in
output voltage waveform. Each cell produces three
different voltage levels such as +𝑣𝑑𝑐,0, −𝑣𝑑𝑐.
Therefore, to harvest large voltage levels in the output
waveform a greater number of cells are connected in
cascading. It will reduce harmonics in output voltage
waveform significantly. The cells can use equal or
unequal DC sources.

Output voltage V0=Vm1+Vm2

 Switching Techniques of Multilevel Inverters

Since multilevel inverters are used in high power applications, it is preferred

to apply modulation methods with low switching frequency to minimize
switching losses.
Despite the many modulation methods introduced for multilevel inverters,
there are only a few technologies that have found their way to industries.
PWM, SVM, SHE and SHM are considered suitable for generating pulses for
multilevel semiconductor.
 PULSE WIDTH MODUALTION
 There are many forms of modulation for
communicating information. When a
high frequency signal has amplitude
varying in response to a low frequency
signal, we have AM (amplitude
modulation).
 When the frequency of the signal varies
in response to the modulated signal, we
have FM (frequency modulation).
 LITERATURE REVIEW
Md Saleh Ebn Sharif, (2019) In this paper, firstly, a new technique is proposed for
generating multiple isolated Buck-Boost DC sources of variable voltages from a single DC
source. Secondly, a new switching algorithm is proposed by which number of output voltage
levels can be increased by 80%, 157% and 833% while reducing number of switch count by
0%, 16.66% and 25% keeping voltage stress across the switches unhampered for two, three
and four source inverters respectively compared to traditional multilevel inverter.
R Girish Ganesan, Mahadevan Bhaskar, K Narayanan, (2018) This paper proposes a
novel topology with a reduced number of switches, to obtain a similar performance to that of
existing cascaded H-bridge configurations, which use Carrier-Based Sinusoidal Pulse Width
Modulation (CBSPWM) technique. The designed power and pulse generator circuit are
validated by simulation and the outputs are presented.
 Rohith Balaji Jonnala, Sai Babu Choppavarapu, (2015) In this paper comparison of
reduced switch multilevel inverter with standard asymmetrical cascaded multilevel inverter
to analyze the various aspects like implementation, performance, applications and
computational complexity. This analysis gives the idea about recently introduced multilevel
inverters among the standard inverters.[
H. Vahedi, K. Al-Haddad, P.-A. Labbe, and S. Rahmani, (2014) A hybrid MLI built on
series connection of full and half bridge inverters is presented. The related switching
technique with multicarrier LS- PWM is implemented. The switching method permits the
capacitors of the half bridge inverter to have balanced voltage during load changing.
H. Sepahvand, J. Liao, M. Ferdowsi, and K. A. Corzine, (2013) The seven-level
cascaded MLI using a single DC source is implemented. The capacitor voltage is
controlled at half of the input supply in order to symmetrical level. It presents alternative
to interchange dc sources of the H-bridge cells with capacitors. The model is implemented
using the phase-shift SPWM technique.
M. F. Kangarlu and E. Babaei, (2013) A 31 level asymmetrical sub-multilevel inverter
is implemented. It uses a smaller number of power switches and DC input supplies. It
describes switching angle calculation to reduce THD the projected MLI is presented in
both symmetric and asymmetric type.
H. Vahedi and K. Al-Haddad, (2013) A single-phase asymmetrical CHB MLI built on
series connection of half and full bridge inverter cells is presented. It uses a smaller
number of switches compared to conventional MLI in order to produce same voltage
levels.
 Main Objective of the study:
The major weakness of conventional converters is the limited power rating, high
harmonic contamination, and high switching frequency that prevents their use for high
power applications. The multilevel converter structure allows a smooth output waveform
by producing different voltage levels while operating at a lower switching frequency
which leads to less power loss in the power inverter and reduces the output filter size.
 To collect the data of cascade H-Bridge, Flying Capacitor and Diode Clamped
inverter.
 To analyse the comparison between cascade H-Bridge, Flying Capacitor and Diode
Clamped inverter in terms of THD in output voltage and output.
 The modeling and simulation of different 5 level and 7 level topologies.
 To compare and analyse the characteristic and harmonics level of different
configuration.
 METHODOLOGY
 In this thesis, three cases of power electronic inverters are taken into consideration. The main reason for the
investigation is to analyses the performance in terms of total harmonic distortion in the output voltage and output
current by comparing with each other.
 On the basis of data collected the cascade H-Bridge, Flying Capacitor and Diode Clamped inverter is simulated.
 The comparison between cascade H-Bridge, Flying Capacitor and Diode Clamped inverter have been completed using
SPWM switching technique to generate the gating pulses for the switches.
 The modeling and simulation of 5 level and 7 level topologies of three cases namely cascade H-Bridge, Flying
Capacitor and Diode Clamped inverter have been made in MATLAB SIMULINK.
 The FFT analysis is performed to analyze the total harmonic distortion of output current and output voltage of all the
three cases.
A comparison study is made between all the three inverters total harmonic distortion of their output voltage and current by
keeping the load inductor value as constant and vice versa. Cost, size, no. of components used and design level factors are
also taken into consideration to compare the inverters. All these cases are simulated in MATLAB/SIMULINK.
Simulation Model for 7-level H-BRIDGE multi-level inverter
Figure shows the model of a 7-level cascaded inverter. There are six
carrier signals and a reference signal. Three of them are applied across
the positive half cycle of the modulating signal. Remaining three of them
are applied across the negative half cycle of the modulating signal. From
these signals twelve PWM signals are generated.

Simulation parameters:
Important Elements for 7-level H-BRIDGE Inverter
Sr. No Parameters Value

1 Ideal DC Voltage Source in Voltage 100

2 Load resistance (in ohms) 400

3 Load inductance (in H) .001

4 Load voltage Frequency (Hz) 50

The seven-level CHB is designed and
simulated similar to five-level CHB.
Here the DC value is 300 volts like
𝑣𝑚1=𝑣𝑚2= 𝑣𝑚3=100𝑣. The simulation
parameters are listed in table. The
values of the load for the inverter is
chosen as R=400Ω and L=0.001H.
Figure shows the load voltage, THD in
voltage waveform, load current results
without filter. This inverter produces
symmetrical levels in load voltage
waveform. The THD of load voltage is
shown 22.04% in figure 5.7. It is
observed that higher order harmonics
contributes to THD significantly. But
this can be filtered out easily.
Simulation model for 7-level Flying Capacitor multi-level inverter
Simulation parameters
Important Elements for 5-level Flying Capacitor Inverter

Sr. No Parameters Value

1 Ideal DC Voltage Source in Voltage 600

2 Load resistance (in ohms) 400

3 Load inductance (in H) .001

4 Load voltage Frequency (Hz) 50

5 Switching Frequency (KHz) 5

6 Individual Capacitor values (F) .01

Output voltage and current waveform of 7 level Flying
Capacitor Inverter
Simulation Model for 7-level Diode Clamped multi-level inverter
Simulation parameters
Important Elements for 7-level Diode Clamped Inverter

Sr. No Parameters Value

1 Ideal DC Voltage Source in Voltage 600

2 Load resistance (in ohms) 400

3 Load inductance (in H) .001

4 Load voltage Frequency (Hz) 50

5 Switching Frequency (KHz) 5

6 Source Capacitor values (F) .01

7 Source resistance (ohms) 10

Output voltage and current waveform of 7 level Flying Capacitor
Inverter
From FFT analysis of the three topologies we get the
total harmonic distortion (THD) as follows:
%age THD of 5-level and 7-level for different multi level inverter

33.98 34.11
32.02 32.04

28.61
27.58

24.84

22.04 22.31 21.81

20.77 20.56

5-level H-BRIDGE 7-level H-BRIGE 5-level FLYING CAPACITOR 7-level FLYING CAPACITOR 5-level DIODE CLAMPED 7-level DIODE CLAMPED

%age THD voltage %age THD current

 Conclusion
A detailed Multi-Level Inverter is presented and from the simulations
and the results, 7-level multilevel inverter had given more efficient
performance in terms of the power factor, THD and its efficiency than
5-level multilevel inverter and the Cascaded H-Bridge Inverter
topology has advantage over the other two as it requires less number
of components as compared to the other two types of inverters and so
its overall weight and price is also less and as the level of voltage and
current increases DCMLI is superior in case of THD compared to
CHMLI and FCMLI in which the DCMLI produce 21.81% THD
while CHMLI and FCMLI produce 22.04% and 24.84% respectively
for output voltage in case of 7 level inverter. In this thesis, we are
considering simulations of three main topologies in multi-level
inverter.
 Future Work

This thesis can be extended further by increasing the number of levels in

multilevel inverter.

IC’s can be used to generate gating pulses directly rather than designing them by

using comparators and NOT gates.

By using IC’s, complexity in designing gate pulses can be reduced.

It also is more suitable for the purpose of integrating PV arrays and grid system.
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THANK
YOU