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Microcomputer & Interfacing: 8086 Microprocessor

The document discusses the 8086 microprocessor, including its pinouts, signal descriptions, and modes of operation. It operates at 5, 8, or 10 MHz and uses a bus cycle mechanism. The pinouts and signals are described for both minimum and maximum modes. Memory-mapped I/O and isolated I/O are two methods for interfacing I/O devices to the 8086.

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Mikiyas Tewodroes
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42 views

Microcomputer & Interfacing: 8086 Microprocessor

The document discusses the 8086 microprocessor, including its pinouts, signal descriptions, and modes of operation. It operates at 5, 8, or 10 MHz and uses a bus cycle mechanism. The pinouts and signals are described for both minimum and maximum modes. Memory-mapped I/O and isolated I/O are two methods for interfacing I/O devices to the 8086.

Uploaded by

Mikiyas Tewodroes
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Microcomputer & Interfacing

Lecture 2

 8086 Microprocessor

BY: Tsegamlak Terefe


Objective

 Pin outs & Signal Description


 Interfacing

BY: Tsegamlak Terefe


Pin outs & Signal Description
 8086 is a 40 pin DIP packaged microprocessor which can operate
in two modes known to be maximum & minimum modes of
operation.

 Max Mode: in this mode the 8086 processor is accompanied by


another co-processor.

 Min Mode: in this mode the 8086 processor will be a stand


alone microprocessor.

BY: Tsegamlak Terefe


Pin outs & Signal Description
 Three clock mode of operation with 33% duty cycle.
• 5MHz,8MHz,10MHz

 Have Bus cycles which is a mechanism used to multiplex


address and data busses. The bus cycle is made of four µP
clock cycles.

BY: Tsegamlak Terefe


Pin outs & Signal Description

 Requires +5V power supply.

 For more than 10 outputs per pin buffering is required.

BY: Tsegamlak Terefe


Pin outs & Signal Description

BY: Tsegamlak Terefe


Pin outs & Signal Description
common to Max and Min
 The address/data Bus AD0-AD15 : This are time multiplexed
address/data bus. Address will be available on T1 while data
will be available on T2-T4 .

 This lines will become tri stated if the buss is needed for DMA/
hold is acknowledged.
 Address/ Status lines A16-A19/S3-S6 : Time multiplexed status
and address bus. On T1 an address is available on A 16-A19
while status is available on the rest of the bus cycles.

BY: Tsegamlak Terefe


Pin outs & Signal Description
common to Max and Min
 S6 is always 0, S5 shows Interrupt(IF),S3 & S4 show which
segment is being accessed.

 /RD: when this signal is 0 the data bus is receptive to data from
I/0 or Memory.

BY: Tsegamlak Terefe


Pin outs & Signal Description
common to Max and Min
 Ready: This pin used to insert a wait cycle in to the timing of
the processor. Putting this pin at 0 level will insert wait cycles.
 INTR: Setting this pin to high will cause a hardware interrupt if
and only if IF (S4)Is high. Interrupts will be allowed after the
instruction at hand completes execution.
 /Test: This is a pin associated with a wait instruction. If pin is
set to low wait is executed as NOP else the processor waits
until pin becomes low.
 NMI: This pin is similar to INTER except that IF is not checked if
pin is set to high.
BY: Tsegamlak Terefe
Pin outs & Signal Description
common to Max and Min
 RESET: If this pin is set to high will cause the processor to reset. It will
require 4 clock periods for the processor to rest. After reset the
processor start executing instructions at FFFF0H.
 CLK: This pin is used as a clocking pin for the processor.
 VCC: This pin is used to power up the processor.
 GND: Is used as a return path for the power supply of the processor.
 MN/(/MX): This pin used to select minimum /maximum mode. If set to
high processor is at minimum mode of operation.
 /BHE/S7: This pin used as a bus high enable which will make the most
significant data bits (D7-D15) available if set to low. S7 is always high.

BY: Tsegamlak Terefe


Pin outs & Signal Description
Minimum mode
 M/(/IO): This pin will indicate if the processor address bus
contain a memory of an I/O address .
 /WR : This will indicate if the processor is outputting data to a
memory of I/O device.
 /INTR: This pin acknowledges to an interrupt request at the
INTR pin. This pin is also used to output the interrupt vector
number on the data bus.
 ALE: This pin will indicate that the bus holds an address . The
pin will not float to a hold acknowledgment.

BY: Tsegamlak Terefe


Pin outs & Signal Description
Minimum mode
 DT/(/R): This pin is used to indicate if the data bus is
transmitting or receiving. This pin is used to enable external
buffers.
 DEN: activates external data bus buffer.

 HOLD: is used to request for DMA.


 HOLDA: is used to acknowledge a hold request.
 /SS0: Is used to indicate the function of current bus cycle with
the combination of DT/(/R) and M/(/IO).

BY: Tsegamlak Terefe


Pin outs & Signal Description
Minimum mode

BY: Tsegamlak Terefe


Pin outs & Signal Description
Maximum mode
 /S0,/S1,/S2 : shows the function of the current bus cycle.

 /R0,/GT0,/R1,/GT1 : This pin will function as a Bi-direction


access request and grant for DMA.

 /LOCK: This pin is used to lock peripherals off the system.

 QS1, QS0 : This bits will indicate the status of the internal queue.

BY: Tsegamlak Terefe


Pin outs & Signal Description
Maximum mode

BY: Tsegamlak Terefe


I/O
 Two ways to interface input out devices are available for the
processor
 Memory Mapped I/o
 Isolated I/o
 Memory Mapped I/O : The I/O devices use some portion of the
available 1MB memory range.

 In this mode there are no special instructions to transfer data


between the processor and the I/O devices.

BY: Tsegamlak Terefe


I/O
 Isolated I/O: In this mode of interfacing I/O devices will have
separate memory available for them.
 For the 8086 I/O is addressed either in 8 bit (Fixed I/O) or 16
bit (Variable I/O).
 Hence, 64KB of memory is needed for interfacing I/O devices.
 DX is used to hold 16 bit port address for I/O.

BY: Tsegamlak Terefe

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