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Microprocessor & Microcontroller: Unit - Iii Timer0 (Atmega8) Dr. J. Siva

Timer/Counter0 is an 8-bit timer module that counts up from 0 to 255 and then overflows back to 0. It can generate precise time delays by counting clock cycles. The timer speed can be adjusted by selecting a prescale value to divide the oscillator frequency, allowing delays from microseconds to seconds. The timer value and flags are accessed via registers to configure timeouts and respond to interrupts.
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0% found this document useful (0 votes)
24 views

Microprocessor & Microcontroller: Unit - Iii Timer0 (Atmega8) Dr. J. Siva

Timer/Counter0 is an 8-bit timer module that counts up from 0 to 255 and then overflows back to 0. It can generate precise time delays by counting clock cycles. The timer speed can be adjusted by selecting a prescale value to divide the oscillator frequency, allowing delays from microseconds to seconds. The timer value and flags are accessed via registers to configure timeouts and respond to interrupts.
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Microprocessor &

Microcontroller
Unit – III
Timer0(ATmega8)
Dr. J. Siva

1
8-bit Timer/Counter0
• Timer/Counter0 is a general purpose, single channel, 8-bit
Timer/Counter module
• The counting direction is always up (incrementing)
• The counter simply overruns when it passes its maximum
8-bit value (MAX = 0xFF) and then restarts from the
bottom (0x00)
• In normal operation the Timer/Counter Overflow Flag
(TOV0) will be set in the same timer clock cycle as the
TCNT0 becomes zero
• A new counter value can be written anytime
• Max delay time =
(Max. Count+1) × (1/Fosc ) × Prescale value =
Timer0 Block Diagram
Timer/Counter Control Register – TCCR0
Timer/Counter (TCNT0)

Timer Interrupt Mask Register (TIMSK)

Timer Interrupt Flag Register (TIFR)


Delay Calculation w.o. Prescalar
• Required delay = 200 μs Fosc = 1 MHz

• Time for one clock cycle = (1/Fosc ) = 1 / 1MHz = 1μs


 
• Required count =
Required delay / Time for one clock cycle = 200 μs/1 μs = 200

• Initial count =
Maximum count +1 - Required count = 255 + 1 – 200 = 56
Delay Calculation with Prescalar
• Required delay = 500 μs Fosc = 1 MHz

• Time for one clock cycle = (1/Fosc ) × Prescale value =1x8= 8 μs


 
• Required count =
Required delay / Time for one clock cycle = 500/8 = 62

• Initial count =
Maximum count +1 - Required count = 255+1-62 = 194
= 0xC2

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