INSTRUCTION SET OF 8085

MICROPROCESSOR INSTRUCTIONS

• Every microprocessor has its own instruction set.

• Based on the design of the ALU and the decoding
unit, the microprocessor manufacturers generally
list out the instruction set for the every
microprocessor manufactured.
• The instruction set consists of both the assembly
language mnemonics and the corresponding
machine code.

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 MICROPROCESSOR INSTRUCTIONS
• The purpose of an instruction set is to facilitate
the development of efficient programs by
users/programmers.
• The instruction set is based on the architecture
of the processor.
• So, to understand the instruction set of a
processor, it is necessary to understand the
basic architecture of the microprocessor and
the user accessible registers in it.
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 MICROPROCESSOR INSTRUCTIONS
• An instruction is a binary bit pattern that can be
decoded inside a microprocessor to perform a
specific function.
• The assembly language mnemonics are the codes
for these binary patterns so that the user can easily
understand the function performed by these
instructions.
• The entire group of instructions is called the
instruction set, and this determines the
functionalities the microprocessor can perform.
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 MICROPROCESSOR INSTRUCTIONS
• Intel 8085 processor has its own set of
instructions listed both in mnemonics and
machine code, also called as object code.
• As 8085 is an 8-bit processor, the machine
codes for the instructions are also 8-bits wide.

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MICROPROCESSOR INSTRUCTIONS
An instruction is a binary pattern designed for a
microprocessor to perform a specific function.
The entire group of instructions that a microprocessor
supports is called Instruction Set.
8085 has 246 different patterns and 74 instructions.
Each instruction is represented by an 8-bit binary value.
These 8-bits of binary value is called Op-Code or
machine code or Instruction Byte.

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 MICROPROCESSOR INSTRUCTIONS
• The microprocessor instruction can be classified based
on many parameters such as the functionality, length
and operand addressing.
• Instructions can be classified into five categories based
on the functionality provided by the instructions.
• a) Data Transfer (copy) operations,
• b) Arithmetic operations,
• c) Logical operations,
• d) Branching operations
• e) Machine-control operations
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MICROPROCESSOR INSTRUCTIONS
• Based on the length of the instructions, the
instruction set can be classified into following
types:
• a) One-byte instructions,
• b) Two-byte instructions and
• c) Three-byte instructions etc.

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INSTRUCTION CLASSIFICATION
BASED ON FUNCTIONALITY

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 Classification of Instruction Set

• Data Transfer Instruction

• Arithmetic Instructions
• Logical Instructions
• Branching Instructions
• Machine Control Instructions
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 Data Transfer Instructions
• These instructions move data between
registers, or between memory and registers.
• These instructions copy data from source to
destination.
• While copying, the contents of source are not
modified or destroyed.

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 Data Transfer Instructions
Opcode Operand Description
MOV Rd, Rs Copy from source to destination.
M, Rs
Rd, M

This instruction copies the contents of the source register into

the destination register.

The contents of the source register are not altered.

If one of the operands is a memory location, its location is

specified by the contents of the HL registers.

Example: MOV B, C or MOV B, M

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 Data Transfer Instructions
Opcode Operand Description
MVI Rd, Data Move immediate 8-bit data
M, Data

The 8-bit data is stored in the destination register or

memory.

If the operand is a memory location, its location is

specified by the contents of the H-L pair registers.

Example: MVI B, 33H or MVI M, 57H

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 Data Transfer Instructions
Opcode Operand Description
LDA 16-bit address Load Accumulator

The contents of a memory location, specified by a 16-bit

address in the operand, are copied to the accumulator.

The contents of the source are not altered.

Example: LDA 2034H

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 Data Transfer Instructions
Opcode Operand Description
LDAX B/D Register Pair Load accumulator indirect

The contents of the designated register pair point to a memory

location.

This instruction copies the contents of that memory location into the
accumulator.

The contents of either the register pair or the memory location are not
altered.

Example: LDAX B or LDAX D

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 Data Transfer Instructions
Opcode Operand Description
LXI Reg. pair, 16-bit Load register pair immediate
data

This instruction loads 16-bit data in the register pair.

Example: LXI H, 2034 H

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 Data Transfer Instructions
Opcode Operand Description
STA 16-bit address Store accumulator direct

The contents of accumulator are copied into the memory

location specified by the operand.

Example: STA 2500 H

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 Data Transfer Instructions
Opcode Operand Description
STAX Reg. pair Store accumulator indirect

The contents of accumulator are copied into the memory

location specified by the contents of the register pair.

Example: STAX B

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 Data Transfer Instructions
Opcode Operand Description
XCHG None Exchange H-L with D-E

The contents of register H are exchanged with the

contents of register D.

The contents of register L are exchanged with the

contents of register E.

Example: XCHG

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 Data Transfer Instructions
Opcode Operand Description
OUT 8-bit port address Copy data from accumulator to a port with 8-bit
address

The contents of accumulator are copied into the I/O

port.

Example: OUT 78 H

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 Data Transfer Instructions
Opcode Operand Description
IN 8-bit port address Copy data to accumulator from a port with 8-bit
address

The contents of I/O port are copied into accumulator.

Example: IN 8C H

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 Arithmetic Instructions
• These instructions perform the operations
like:
– Addition

– Subtract

– Increment

– Decrement

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 Arithmetic Instructions
Opcode Operand Description
ADD R Add register or memory to accumulator
M

The contents of register or memory are added to the contents of

accumulator.

The result is stored in accumulator.

If the operand is memory location, its address is specified by H-L pair.

All flags are modified to reflect the result of the addition.

Example: ADD B or ADD M

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 Arithmetic Instructions
Opcode Operand Description
ADC R Add register or memory to accumulator with
M carry

The contents of register or memory and Carry Flag (CY) are added to
the contents of accumulator.

The result is stored in accumulator.

If the operand is memory location, its address is specified by H-L pair.

All flags are modified to reflect the result of the addition.

Example: ADC B or ADC M

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 Arithmetic Instructions
Opcode Operand Description
ADI 8-bit data Add immediate to accumulator

The 8-bit data is added to the contents of

accumulator.

The result is stored in accumulator.

All flags are modified to reflect the result of the

addition.

Example: ADI 45 H 35
 Arithmetic Instructions
Opcode Operand Description
ACI 8-bit data Add immediate to accumulator with carry

The 8-bit data and the Carry Flag (CY) are added to the
contents of accumulator.

The result is stored in accumulator.

All flags are modified to reflect the result of the addition.

Example: ACI 45 H
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 Arithmetic Instructions
Opcode Operand Description
SUB R Subtract register or memory from accumulator
M

The contents of the register or memory location are subtracted from

the contents of the accumulator.

The result is stored in accumulator.

If the operand is memory location, its address is specified by H-L pair.

All flags are modified to reflect the result of subtraction.

Example: SUB B or SUB M

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 Arithmetic Instructions
Opcode Operand Description
SBB R Subtract register or memory from accumulator
M with borrow

The contents of the register or memory location and Borrow Flag (i.e.
CY) are subtracted from the contents of the accumulator.

The result is stored in accumulator.

If the operand is memory location, its address is specified by H-L pair.

All flags are modified to reflect the result of subtraction.

Example: SBB B or SBB M

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 Arithmetic Instructions
Opcode Operand Description
SUI 8-bit data Subtract immediate from accumulator

The 8-bit data is subtracted from the contents of the

accumulator.

The result is stored in accumulator.

All flags are modified to reflect the result of subtraction.

Example: SUI 45 H
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 Arithmetic Instructions
Opcode Operand Description
SBI 8-bit data Subtract immediate from accumulator with
borrow

The 8-bit data and the Borrow Flag (i.e. CY) is subtracted
from the contents of the accumulator.

The result is stored in accumulator.

All flags are modified to reflect the result of subtraction.

Example: SBI 45 H
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 Arithmetic Instructions
Opcode Operand Description
INR R Increment register or memory by 1
M

The contents of register or memory location are incremented

by 1.

The result is stored in the same place.

If the operand is a memory location, its address is specified by

the contents of H-L pair.

Example: INR B or INR M

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 Arithmetic Instructions
Opcode Operand Description
INX R Increment register pair by 1

The contents of register pair are incremented by 1.

The result is stored in the same place.

Example: INX H

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 Arithmetic Instructions
Opcode Operand Description
DCR R Decrement register or memory by 1
M

The contents of register or memory location are decremented

by 1.

The result is stored in the same place.

If the operand is a memory location, its address is specified by

the contents of H-L pair.

Example: DCR B or DCR M

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 Arithmetic Instructions
Opcode Operand Description
DCX R Decrement register pair by 1

The contents of register pair are decremented by 1.

The result is stored in the same place.

Example: DCX H

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 Logical Instructions
• These instructions perform logical operations on data stored
in registers, memory and status flags.

• The logical operations are:

– AND
– OR
– XOR
– Rotate
– Compare
– Complement

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 AND, OR, XOR
• Any 8-bit data, or the contents of register, or
memory location can logically have
– AND operation

– OR operation

– XOR operation

with the contents of accumulator.

• The result is stored in accumulator.
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 Rotate
• Each bit in the accumulator can be shifted
either left or right to the next position.

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 Compare
• Any 8-bit data, or the contents of register, or
memory location can be compares for:
– Equality

– Greater Than

– Less Than

with the contents of accumulator.

• The result is reflected in status flags.
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 Complement
• The contents of accumulator can be
complemented.
• Each 0 is replaced by 1 and each 1 is replaced
by 0.

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 Logical Instructions
Opcode Operand Description
ANA R Logical AND register or memory with
M accumulator

The contents of the accumulator are logically ANDed with the contents of register
or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the contents of H-L
pair.
S, Z, P are modified to reflect the result of the operation.
CY is reset.
Example: ANA B or ANA M.
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 Logical Instructions
Opcode Operand Description
ANI 8-bit data Logical AND immediate with accumulator

The contents of the accumulator are logically ANDed with the

8-bit data.
The result is placed in the accumulator.

S, Z, P are modified to reflect the result.

CY is reset.

Example: ANI 86H.

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 Logical Instructions
Opcode Operand Description
ORA R Logical OR register or memory with accumulator
M

The contents of the accumulator are logically ORed with the contents of the register or
memory.

The result is placed in the accumulator.

If the operand is a memory location, its address is specified by the contents of H-L pair.

S, Z, P are modified to reflect the result.

CY and AC are reset.

Example: ORA B or ORA M.

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 Logical Instructions
Opcode Operand Description
ORI 8-bit data Logical OR immediate with accumulator

The contents of the accumulator are logically ORed with the 8-bit
data.
The result is placed in the accumulator.

S, Z, P are modified to reflect the result.

CY and AC are reset.

Example: ORI 86H.

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 Logical Instructions
Opcode Operand Description
XRA R Logical XOR register or memory with
M accumulator

The contents of the accumulator are XORed with the contents of the register
or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the contents
of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY and AC are reset.
Example: XRA B or XRA M.
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 Logical Instructions
Opcode Operand Description
XRI 8-bit data XOR immediate with accumulator

The contents of the accumulator are XORed with the 8-

bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: XRI 86H.
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 Logical Instructions
Opcode Operand Description
RLC None Rotate accumulator left

Each binary bit of the accumulator is rotated left by one

position.
Bit D7 is placed in the position of D0 as well as in the Carry flag.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RLC.

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Logical Instructions (continued...)
• RLC (Rotate Accumulator Left) instruction
Format: RLC

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 Logical Instructions
Opcode Operand Description
RRC None Rotate accumulator right

Each binary bit of the accumulator is rotated right by one

position.
Bit D0 is placed in the position of D7 as well as in the Carry flag.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RRC.

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 Logical Instructions
Opcode Operand Description
RAL None Rotate accumulator left through carry

Each binary bit of the accumulator is rotated left by one position

through the Carry flag.
Bit D7 is placed in the Carry flag, and the Carry flag is placed in
the least significant position D0.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RAL.
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Logical Instructions (continued...)
RAL (Rotate Accumulator Left through Carry) instruction
Format: RAL

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 Logical Instructions
Opcode Operand Description
RAR None Rotate accumulator right through carry

Each binary bit of the accumulator is rotated right by one

position through the Carry flag.
Bit D0 is placed in the Carry flag, and the Carry flag is placed in
the most significant position D7.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RAR.
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 Logical Instructions
Opcode Operand Description
CMA None Complement accumulator

The contents of the accumulator are complemented.

No flags are affected.
Example: CMA.

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 Logical Instructions
Opcode Operand Description
CMP R Compare register or memory with accumulator
M

The contents of the operand (register or memory) are

compared with the contents of the accumulator.

Both contents are preserved .

The result of the comparison is shown by setting the flags

as follows:

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 Logical Instructions
Opcode Operand Description
CMP R Compare register or memory with accumulator
M

if (A) < (reg/mem): carry flag is set

if (A) = (reg/mem): zero flag is set

if (A) > (reg/mem): carry and zero flags are reset.

Example: CMP B or CMP M

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 Logical Instructions
Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator

The 8-bit data is compared with the contents of

accumulator.

The values being compared remain unchanged.

The result of the comparison is shown by setting the flags

as follows:

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 Logical Instructions
Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator

if (A) < data: carry flag is set

if (A) = data: zero flag is set

if (A) > data: carry and zero flags are reset

Example: CPI 89H

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 Branching Instructions
• The branching instruction alter the normal
sequential flow.

• These instructions alter either unconditionally

or conditionally.

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 Branching Instructions
Opcode Operand Description
JMP 16-bit address Jump unconditionally

The program sequence is transferred to the memory

location specified by the 16-bit address given in the
operand.
Example: JMP 2034 H.

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 Branching Instructions
Opcode Operand Description
Jx 16-bit address Jump conditionally

The program sequence is transferred to the memory

location specified by the 16-bit address given in the
operand based on the specified flag of the PSW.
Example: JZ 2034 H.

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 Jump Conditionally
Opcode Description Status Flags
JC Jump if Carry CY = 1

JNC Jump if No Carry CY = 0

JP Jump if Positive S=0

JM Jump if Minus S=1

JZ Jump if Zero Z=1

JNZ Jump if No Zero Z=0

JPE Jump if Parity Even P=1

JPO Jump if Parity Odd P=0

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 Branching Instructions
Opcode Operand Description
CALL 16-bit address Call unconditionally

The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand.
Before the transfer, the address of the next instruction after
CALL (the contents of the program counter) is pushed onto
the stack.
Example: CALL 2034 H.

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 Branching Instructions
Opcode Operand Description
RET None Return unconditionally

The program sequence is transferred from the subroutine

to the calling program.
The two bytes from the top of the stack are copied into
the program counter, and program execution begins at
the new address.
Example: RET.
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 Control Instructions
• The control instructions control the operation
of microprocessor.

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 Control Instructions
Opcode Operand Description
NOP None No operation

No operation is performed.

The instruction is fetched and decoded but no operation
is executed.
Example: NOP

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 Control Instructions
Opcode Operand Description
HLT None Halt

The CPU finishes executing the current instruction and

halts any further execution.
An interrupt or reset is necessary to exit from the halt
state.
Example: HLT

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