Binary Adders and

Subtractors

Prof. Jagannadha Naidu K

Assistant Professor (Senior)
SENSE, VIT University.

ECE103-Digital Logic Design 1

 Overview
 Addition and subtraction of binary data is fundamental
 Need to determine hardware implementation

 Represent inputs and outputs

 Inputs: single bit values, carry in

 Outputs: Sum, Carry

 Hardware features
 Create a single-bit adder and chain together

 Same hardware can be used for addition and subtraction

with minor changes
 Dealing with overflow
 What happens if numbers are too big?

ECE103-Digital Logic Design 2

Half Adder
Add two binary numbers
• A0 , B0 -> single bit inputs
• S0 -> single bit sum
• C1 -> carry out

A0
A0 B0 S0 C1 S0
B0
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1 C1
Dec Binary
1 1
+1 +1
2 10
ECE103-Digital Logic Design 3
Multiple-bit Addition
Consider single-bit adder for each bit position.

A3 A2 A1 A 0 B3 B2 B1 B0

A 0 1 0 1 B 0 1 1 1

Ci+1 Ci
1 1 1
A 0 1 0 1 Ai
B 0 1 1 1 +Bi
Si
1 1 0 0
Each bit position creates a sum and carry

ECE103-Digital Logic Design 4

Full Adder
Full adder includes carry in Ci
Notice interesting pattern in Karnaugh map.

Ci Ai Bi Si Ci+1 A i Bi
Ci 00 01 11 10
0 0 0 0 0 1 1
0
0 0 1 1 0
0 1 0 1 0 1 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
Si
1 1 0 0 1
1 1 1 1 1

ECE103-Digital Logic Design 5

Full Adder
Now consider implementation of carry out
Two outputs per full adder bit (Ci+1, Si)

Ci Ai Bi Si Ci+1 A i Bi
Ci 00 01 11 10
0 0 0 0 0
0 0 1 1 0 0 1
0 1 0 1 0
0 1 1 0 1
1 1 1 1
1 0 0 1 0
1 0 1 0 1
1
1
1
1
0
1
0
1
1
1
Ci+1

Note: 3 inputs
ECE103-Digital Logic Design 6
Full Adder
Now consider implementation of carry out
Minimize circuit for carry out - Ci+1

A i Bi
Ci Ai Bi Si Ci+1 Ci 00 01 11 10

0 0 0 0 0 0 1
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1 1 1 1 1
1 0 0 1 0
1
1
0
1
1
0
0
0
1
1
Ci+1
1 1 1 1 1
Ci+1 = Ai & Bi
+ Ci & Bi
+ Ci & Ai

ECE103-Digital Logic Design 7

Full Adder
Full adder made of several half adders

Si = Ci xor (Ai xor Bi)

Ci+1 = Ai & Bi + Ci & (Ai xor Bi)

Ci

Ai Si
Bi

C i+1

Half-adder Half-adder

ECE103-Digital Logic Design 8

Full Adder
Hardware repetition simplifies hardware design

Ci
Si
half-adder
Ai S C
half-adder C i+1
Bi
C

A full adder can be made from

two half adders (plus an OR gate).

ECE103-Digital Logic Design 9

Full Adder
Putting it all together
• Single-bit full adder
• Common piece of computer hardware
Ai Bi

C Full Adder Ci
i+1

Si
Block Diagram

ECE103-Digital Logic Design 10

Half Subtractor

ECE103-Digital Logic Design 11

Full Subtractor

ECE103-Digital Logic Design 12