4.

0 : FIELD EFFECT
TRANSISTOR (FET)
LEARNING OUTCOME:
4.1 Understand the basic principles of JFET
4.1.1 Outline physical structure and schematic symbol of JFET
  4.1.2 Outline I-V characteristics
  4.1.3 Discus operating regions of JFET
4.1 Field Effect Transistor ( FET )
Two types of FETs :
i. Junction field-effect transistor (JFET) and
ii. The metal-oxide-semiconductor field-effect transistor
(MOSFET)

It is a component or voltage controlled device

4.1.1 JUNCTION FIELD EFFECT TRANSISTOR (JFET)
- JFET is unipolar devices, since only one type of majority carrier
(either electron or hole) is used.
- JFET is Voltage control device, since gate voltage control the
drain current.

- Terminals : Drain(D), Source(S) and Gate(G).

- Types : n-channel JFET and p-channel JFET.
 4.1.1 Physical structure and schematic symbol…

n-channel p-channel

Physical structure
Schematic symbol Physical structure Schematic symbol
n-channel JFET p-channel JFET
 Terms

VGS refers to the voltage applied between the Gate and the Source
while
VDS refers to the voltage applied between the Drain and the Source.
IS refers to source current , ID refers to drain current.
 4.1.2 I-V Characteristics of JFET

Ohmic area
- VGS = 0V, ID increases
- Ohmic area or ON region because here the channel behaves as a resistor:
the flow of current depends on the resistance of the semiconductor material.
Pinch-off voltage
A point where increasing the voltage will not increase the current
Breakdown Region
The voltage between the Drain and the Source,(VDS ) is high enough to causes the
JFET's resistive channel to break down and pass uncontrolled maximum current.
4.1.3 The difference betweenFET dan Transistor Dwipolar (BJT)

BIPOLAR
JFET AND MOSFET
TRANSISTOR
Three Three terminals: drain,
TERMINAL terminal:collector,emitter source and gate
and base For MOSFET: drain,
source, gate.

CURRENT FLOW BIPOLAR: hole and UNIPOLAR: Hole or

electron are involved in electrons are involved in
current flow current flow
CONTROL Current control device Voltage control device

The similarities between JFET and Bipolar transistor

-Amplifier
-Switching devices
-Impedance matching circuits
LEARNING OUTCOME

4.2 Understand the basic principles of MOSFET

  4.2.1 Define MOSFET
4.2.2 Differentiate between NMOS and PMOS
  4.2.3 Draw the physical structures and schematic symbols for both
MOSFETs
  4.2.4 Explain with the aid of a diagram, the operation difference in:
a. Depletion-mode MOSFET (D- MOSFET)
b. Enhancement-mode (E- MOSFET)
  4.2.4 Sketch the I-V characteristics for NMOS and PMOS
4.2.6 Identify the operating regions of MOSFET
a. Linear / active region
b. Saturation region
 4.2 MOSFET
(metal-oxide semiconductor FET)
4.2.1 Definition of MOSFET
A type of device which is coated with oxide materials between the
terminal gate and the channel. Oxide layer has resulted in high
impedance input

Two types of commonly used MOSFET:-

i. Depletion –mode MOSFET (D- MOSFET)
ii. Enhancement-mode MOSFET (E- MOSFET)
MOSFET
4.2.2 Differentiation between NMOS and PMOS
NMOS PMOS
i. Metal oxide semiconductors are made i. ~ on n-type substrates
on p-type substrates
ii. Active carrier are electrons (migrate ii. Active carrier are holes (migrate
between S and D contacts) between S and D contacts)
iii. Derived from n-channel metal-oxide iii. Derived from p-channel metal-oxide
semiconductor semiconductor
iv. Positive bias voltage at the gate must iv. Negative bias voltage at the gate
be applied to create a channel. must be applied to create a channel.
 4.2.3 Physical structures & schematic symbols for NMOS & PMOS

Figure a(i) Figure a(ii)

a(i) Structure E-MOSFET, N-Channel (NMOS)

a(ii) Symbol E-MOSFET, N-Channel (NMOS)

b(i) Structure E-MOSFET, P-Channel (PMOS)

b(ii) Symbol E-MOSFET, P-Channel(PMOS)

Figure b(i) Figure b(ii)

 4.2.3 Depletion–mode MOSFET ( D MOSFET )
N-Channel P-Channel

Figure b(i) Figure b(ii)

Figure a(i) Figure a(ii)

a(i) Structure D-MOSFET, N-Channel b(i) Structure D-MOSFET, P-Channel

a(ii) Symbol D-MOSFET, N-Channel b(ii) Symbol D-MOSFET, P-Channel

4.2.4 a) D-MOSFET
D-MOSFET has a narrow channel which connects drain terminal (D)
and source(S) as shown in figure a(i) and figure b(i).
The drain of a D-Mosfet n-channel should be biased and more positive
than the source. So, current ID flows from D to S
-If the gate terminal is applied with negative bias voltage, depletion region
will be formed. (figure a)
-Negative voltage at the gate will push free electrons (majority carrier) into
the N-channel and pull the holes from substratum(p-material) to form a
depletion region.
-Recombination will occur and cause the number of free electrons at the N-
channel decreases.
-Thus, the conductivity of channel reduced and channel resistance
increased. Consequently, the flow ID decreased.
- As the voltage at the gate becomes more negative(VGS<0), the number of
electrons in n-channel will reduce, and the same goes to value of ID .At a
certain level, (VGS(off)), free electrons in channel will be fully depleted and no
current flows(ID=0),

D-MOSFET
 Figure 4.26 b below the enhancement region of D-
MOSFET.
-Gate is applied with a positive voltage.
-The number of free electrons at N-channel will
increase and channel conductivity will also increase.
With an additional voltage at the gate, current ID will
be increased due to the additional of free electrons
and may exceed the value of IDSS

D-MOSFET
4.2.4 b) E-MOSFET
E MOSFET do not have N or P channels physically between D and S
terminals. This will cause the collector current (ID) cannot flow if VGS=0.
Hence, to enable current ID to flow, a channel must be formed.

a(i) Structure E-MOSFET, N-Channel

a(ii) Symbol E-MOSFET, N-Channel
Figure a(i) Figure a(ii)

b(i) Structure E-MOSFET, P-Channel

Figure b(i) Figure b(ii) b(ii) Symbol E-MOSFET, P-Channel
-E MOSFET N-channel Positive bias voltage at the gate must be
applied to create a channel. So, current ID can flow when the
voltage is applied at the drain-source terminal ( VDS).
-N-channel is formed because positive voltage at the gate will pull
free electrons from a P-material substratum close to the gate.(fig. i)
In other words, the E-MOSFET is enhanced with a positive value or
voltage VGS in order to form a channel and current flow.

E-MOSFET
N CHANNEL

Fig. i Fig. ii
ID will only flow when VGS is beyond the threshold voltage value due
to the presence of a silicon dioxide layer.
In other words, the E-MOSFET is enhanced with a positive value or
voltage. This threshold voltage is labeled as VGS(Th) or VT . (Fig. ii)
 E-MOSFET P CHANNEL

For E MOSFET P- channel  Negative bias voltage should be

supplied at the gate to create a channel.
4.2.4 NMOS and PMOS

E-MOSFET N-CHANNEL

E-MOSFET P-CHANNEL
Differences betweeen e-mosfet and d-mosfet?...

E- mosfet :
•Known as “enhancement" mosfet.
•normally non-conducting but conducts when the channel is enhanced
by applying a voltage to the gate and pulling carriers into the channel.

D- mosfet :
•Known as "depletion" mosfet.
•normally conducts but becomes more non-conducting as carriers are
depleted or pulled out of the channel by applying a voltage.
 4.3 Understand the basic principles of JFET amplifier
4.3.1 Function of FET in amplifier
- provide an excellent voltage gain with the added
advantages of a high input impedance.
- Because of their high input impedance and other
characteristics JFETs are often preferred over BJTs for
certain types of applications
4.3.2 Relation the function as amplifier to the linear /
active operating region.
 - the voltage VGG provides the necessary-bias between gate and
source of the JFET. The signal to be amplified is VS. The V-I
characteristics of the JFET is shown below.
- On the output, a load line corresponding to VDD = 40V and VDSQ
= 20V and IDQ = 2.70mA
4.3.3 Comparison between Common Drain Amplifier…, Common source

Amplifier and Common Gate Amplifier…

Drain is the grounded terminal Gate is the grounded terminal

source is the grounded terminal
4.3.5 Construct the DC load line (malvino)

Here is the process for finding the Q point of any self-biased JFET.
1. Multiply IDSS (current from drain to source with a shorted
gate) by RS (source resistor) to get VGS for the second point
2. Plot the second point (IDSS, VGS)
3. Draw a line through the origin and the second point
4. Read the coordinates of the intersection point.

Selecting the source resistor.

Fig above shows a self-bias line is drawn through the point
with coordinates IDSS and VGS(off). The point of intersection is
not at the exact middle, but it is relatively close to the middle
of the transconductance curve. The source resistance that
produces this self-bias line is given by.
RS = - VGS(off)/ IDSS
An easy way to remember this is to substitute VP for –VGS(off).
Then you get RS = VP / IDSS
This is the same as RDS, the drain resistance in the ohmic
region of an ideal JFET.

Example 14-2
A self-biased JFET has the transconductance curve shown
in fig. 14-5. Use the graphical solution to find the Q point
for an RS of 470Ω .

Solution:-
Since IDSS = 10 mA, the voltage for the second point is
VGS = -(10 mA) (470 Ω ) = - 4.7 V
4.3.6 : Reading data sheets

Breakdown ratings

VDS is the voltage between the drain and the source.

VDG the voltage from the Drain to the gate.
VGS is the voltage from the Gate to Source

There is a safety factor,

Notice that the maximum forward gate current rated at 10mA.
(Normally, the gate is reverse-biased. The data sheet includes
this forward rating in case the gate is forward-biased for any
reason. There is no reason for forward-biasing the gate,
unless it is rare and unusual application)
 Reading data sheets(cont’ed)

IDS and VGS(off)

Two of the most important pieces of information on the data

sheet of a depletion-mode device are the maximum drain
current and the gate-source cutoff voltage.

IDSS represents the maximum drain current with a JFET, and

VGS(off) represents the gate-source voltage needed o turn off
the drain current. Also important, the pinchoff voltage Vp has
the same magnitude as VGS(off).
 4.4 MOSFET AS SWITCHES
 MOSFET switches use the MOSFET channel as a low–on-resistance
switch to pass analog signals when on, and as a high impedance when
off. Signals flow in both directions across a MOSFET switch.
 In this application the drain and source of a MOSFET exchange places
depending on the voltages of each electrode compared to that of the
gate.
• For a simple MOSFET without an integrated diode, the source is the
more negative side for an N-MOS or the more positive side for a P-
MOS.
• All of these switches are limited on what signals they can pass or stop
by their gate-source, gate-drain and source-drain voltages, and source-
to-drain currents; exceeding the voltage limits will potentially damage
the switch.
MOSFET CHARACTERISTIC
CURVE
 1. Cut-off Region
 Here the operating conditions of the transistor are zero input gate
voltage ( VIN ), zero drain current IDand output
voltage VDS = VDD Therefore the MOSFET is switched "Fully-OFF".

2. Saturation Region
• Here the transistor will be biased so that the maximum amount of gate
voltage is applied to the device which results in the channel
resistance RDS(on) being as small as possible with maximum drain current
flowing through the MOSFET switch. Therefore the MOSFET is switched
"Fully-ON".
4.4.1 N-MOS as switch

• The input and Gate are grounded (0v)

• Gate-source voltage less than threshold voltage VGS < VTH
• MOSFET is "fully-OFF" (Cut-off region)
• No Drain current flows ( ID = 0 )
• VOUT = VDS = VDD = "1"
• MOSFET operates as an "open switch"

Then we can define the "cut-off region" or "OFF mode" of a MOSFET

switch as being, gate voltage,VGS < VTH and ID = 0. For a P-channel
MOSFET, the gate potential must be negative.
• The input and Gate are connected to VDD
• Gate-source voltage is much greater than threshold
voltage VGS > VTH
• MOSFET is "fully-ON" (saturation region)
• Max Drain current flows ( ID = VDD / RL )
• VDS = 0V (ideal saturation)
• Min channel resistance RDS(on) < 0.1Ω
• VOUT = VDS = 0.2V (RDS.ID)
• MOSFET operates as a "closed switch"

Then we can define the "saturation region" or "ON mode" of a

MOSFET switch as gate-source voltage,VGS > VTH and ID = Maximum.
P-channel MOSFET Switch
4.4.3 APPLICATION MOSFET AS
SWITCH
 In this circuit arrangement an Enhancement-mode N-
channel MOSFET is being used to switch a simple lamp
"ON" and "OFF" (could also be an LED). The gate input
voltage VGS is taken to an appropriate positive voltage
level to turn the device and therefore the lamp either fully
"ON", ( VGS = +ve ) or at a zero voltage level that turns
the device fully "OFF", ( VGS = 0).
 If the resistive load of the lamp was to be replaced by an
inductive load such as a coil, solenoid or relay a
"flywheel diode" would be required in parallel with the
load to protect the MOSFET from any self generated
back-emf.
 In a P-channel device the conventional flow of drain current is
in the negative direction so a negative gate-source voltage is
applied to switch the transistor "ON". This is achieved
because the P-channel MOSFET is "upside down" with its
source terminal tied to the positive supply +VDD. Then when
the switch goes LOW, the MOSFET turns "ON" and when the
switch goes HIGH the MOSFET turns "OFF".

 This upside down connection of a P-channel enhancement

mode MOSFET switch allows us to connect it in series with a
N-channel enhancement mode MOSFET to produce a
complementary or CMOS switching device as shown across a
dual supply.