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Unit V - Decoders To Adders

The document discusses various types of decoders, encoders, multiplexers, demultiplexers, adders and their implementations using common integrated circuits. It explains serial and parallel adders, binary coded decimal adders, priority encoders, decoder drivers and implementations of logic functions using multiplexers. Common ICs discussed include 74138, 74148, 74151, 74157, 7442, 7483 and their equivalent TTL, CMOS and HC families.

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040-Nishanth
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70 views

Unit V - Decoders To Adders

The document discusses various types of decoders, encoders, multiplexers, demultiplexers, adders and their implementations using common integrated circuits. It explains serial and parallel adders, binary coded decimal adders, priority encoders, decoder drivers and implementations of logic functions using multiplexers. Common ICs discussed include 74138, 74148, 74151, 74157, 7442, 7483 and their equivalent TTL, CMOS and HC families.

Uploaded by

040-Nishanth
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Unit-V

Decoders
ENABLE inputs

• Some decoders have one or more enable inputs that are used to
control the
operation of the decoder
• common ENABLE line connected as a fourth input of each gate
• With this ENABLE line held HIGH, the decoder will function normally
• With ENABLE held LOW, however, all of the outputs will be forced to
the
LOW state regardless of the levels at the A, B, C inputs
3X8 Decoder
3X8 Decoder-IC 74ALS138
internal logic diagram and truth table
74ALS138 IC

Indicate the states of the 74ALS138 outputs for each of the


following sets of
inputs.
(a) E3 = E2 = 1, E1 = 0, A2 = A1 = 1, A0 = 0
(b) E3 = 1, E2 = E1 = 0, A2 = 0, A1 = A0 = 1
Implementation of 1 of 32 Decoder using
74ALS138

• Which output will be activated for A4A3A2A1A0 = 01101?


BCD-to-Decimal Decoders
7442/74LS42/74HC42
BCD-to-Decimal Decoder/Driver
7445

• The TTL 7445 is a BCD-to-decimal decoder/driver.


• The term driver is added to its description because this IC
has open-collector outputs that can operate
at higher current and voltage limits than a normal TTL
output.
• The 7445’s outputs can sink up to 80 mA in the LOW state,
and they can be pulled up to 30 V in the HIGH state.
• This makes them suitable for directly driving loads
such as indicator LEDs or lamps, relays, or DC motors.
BCD-TO-7-SEGMENT DECODER/DRIVERS
BCD-to-7- CC segment decoder/driver driving a common-anode 7-segment LED
display;
(b) segment patterns for all possible input codes.
ENCODERS
octal-to-binary (8-line-to-3-line) encoder.
Priority encoders

• Problem with the simple encoder circuit is when more than one
input is activated at one time.
• A modified version of this circuit, called a priority encoder,
includes the necessary logic to ensure that when two or more
inputs are activated, the output code will correspond to the
highest-numbered input.
• For example, when both A3 and A5 are LOW, the output code will
be 101 (5). Similarly, when A6, A2, and A0
are all LOW, the output code is 110 (6).
• The 74148, 74LS148, and 74HC148
are all octal-to-binary priority encoders.
74147 Decimal-to-BCD Priority encoder
Switch encoder

• Decimal-toBCD switch encoder


Multiplexers (data Selectors)
2X1 and 4X1 Mux
74ALS151-8X1 Mux
16X1 mux implementation using 74ALS/HC
151
Quad Two-input MuX (74ALS157/HC157)
• Implement function F=Σ(0,2,3,6) using
74HC151
• Implement function F=Σ(0,2,,6,10,13,15) using
only one 74HC151 and any additional gates
required
• Implement Full Adder using 74HC151
De-Multiplexer
1-Line-to-8-Line Demultiplexer
74ALS138 Decoder as De-Multiplexer
Parallel Binary Adder
INTEGRATED-CIRCUIT PARALLEL ADDER

• Several parallel adders are available as ICs.


• The most common is a four-bit parallel adder IC that contains
four interconnected FAs and the look-ahead carry circuitry
needed for high-speed operation.
• The 7483A, 74LS83A, 74LS283, and 74HC283 are all four-bit
parallel-adder chips.
Cascading parallel adders
2’s-Complement Circuits

• Parallel adder used to add and subtract numbers in 2’s-complement


system
• Parallel adder used to perform subtraction A - B using the 2’s-
complement system. The bits of the subtrahend (B) are
inverted, and C0 = 1 to produce the 2’s complement.
Combined Addition and Subtraction
1. Assume that ADD = 1 and SUB = 0. The SUB = 0 disables (inhibits)
AND gates 2, 4, 6, and 8, holding their outputs at 0. The ADD = 1 enables
AND gates 1, 3, 5, and 7, allowing their outputs to pass the B0, B1, B2, and B3 levels,
respectively.

2. The levels B0 to B3 pass through the OR gates into the four-bit parallel
adder to be added to the bits A0 to A3. The sum appears at the outputs
Σ0 to Σ3.
3. Note that SUB = 0 causes a carry C0 = 0 into the adder.

4. Now assume that ADD = 0 and SUB = 1. The ADD = 0 inhibits AND
gates 1, 3, 5, and 7. The SUB = 1 enables AND gates 2, 4, 6, and 8, so
that their outputs pass the B0, B1, B2, and B3 levels, respectively.
5. The levels B0 to B3 pass through the OR gates into the adder to be added
to the bits A0 to A3. Note also that C0 is now 1.
Thus, the B-register number has essentially been converted to its
2’s complement.
6. The difference appears at the outputs Σ0 to Σ3.
Serial Adder
It is used to add two binary It is used to add two binary numbers in

numbers in serial form. parallel form.

A parallel adder uses registers with

A serial adder uses shift registers. parallel loads.

It requires single full adder. It requires multiple full adders.

Ripple carry adder is used in parallel

Carry flip-flop is used in serial adder. adder.

Serial adder is a sequential circuit. Parallel adder is a combinational circuit.

In serial adder, propagation delay is In parallel adder, propagation delay is

less. present from input carry to output carry.

Number of required full adder is Number of required full adder is equal to

fixed i.e. one. the number of bits in the binary number.


BCD Adder
• BCD adder adds two BCD digits and produces a BCD digit. BCD number cannot be
greater than 9.
• The two given BCD numbers are to be added using the rules of binary addition.
• If sum is less than or equal to 9 and carry=0 then no correction is required. The
sum is correct and in the true BCD form.
• But if sum is invalid BCD or carry=1carry=1, then the result is wrong and needs
correction.
• The wrong result can be corrected by adding six (0110) to it.
• The 4 bit binary adder IC 7483 can be used to perform addition of BCD numbers.
• In this, if the four-bit sum output is not a valid digit, or if a carry  is generated
then decimal 6 (0110 binary) is to be added to the sum to get the correct result.
• BCD adders can be cascaded to add numbers several digits long by connecting
the carry-out of a stage to the carry-in of the next stage.
• The output of combinational circuit should be 1 if the sum produced by adder 1
is greater than 9 i.e. 1001. The truth table is as follows

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