Logical Circuits

Sequential Circuits
■ Combinational Logic:
■ Output depends only on current input
■ Able to perform useful operations
(add/subtract/multiply/…)
■ Has no memory

* Sequential Circuits
 Sequential Circuits (cont.)
■ Sequential Logic:
■ Output depends not only on current input
but also on past input values, e.g., design a
counter
■ Need some type of memory to remember
the past input values

* Sequential Circuits
 Sequential Circuits (cont.)
Circuits that Information Storing
we Circuits
have learned
so far

Timed “States”

* Sequential Circuits
 Sequential Logic: Concept
■ Sequential Logic circuits remember past
inputs and past circuit state.
■ Outputs from the system are
“fed back” as new inputs
■ With gate delay and wire delay
■ The storage elements are circuits that
are capable of storing binary
information: memory.

* Sequential Circuits
 Memory Storage Element
■ Example of Memory Storage elements
are
i. Latches
ii.Flipflops
Latches do not need clock signal for
the operation
Flipflops needs a clock signal for their
operation

* Sequential Circuits
 How do we store information
■ Two inverters can hold a bit
■ As long as power is applied

■ Storing a new memory

■ Temporarily break the feedback path

* Sequential Circuits
 Synchronous vs. Asynchronous

There are two types of sequential circuits:

■ Synchronous sequential circuit: circuit output
changes only at some discrete instants of
time. This type of circuits achieves
synchronization by using a timing signal called
the clock.
■ Asynchronous sequential circuit: circuit
output can change at any time (clockless).

* Sequential Circuits
 Clock Signal

Clock generator: Periodic train of clock pulses

Different duty cycles

* Sequential Circuits
Synchronous Sequential Circuits:
Flip flops as state memory

■ The flip-flops receive their inputs from the

combinational circuit and also from a clock signal
with pulses that occur at fixed intervals of time,
as shown in the timing diagram.
* Sequential Circuits
 SR Latch (NAND version)

0 S’ S’ R’ Q
Q 1
Q’
0
0 1 0 Set
Q’ 0
0 1
1 R’ 1 0
1 1
X Y
00
NAND
1
01 1
10 1
11 0
* Sequential Circuits
 SR Latch (NAND version)

1 S’ S’ R’ Q
Q 1
Q’
0
0 1 0
0 1 Set
Q’ 0
1 R’ 1 0 1 0
1 1 Hold
X Y
00
NAND
1
01 1
10 1
11 0
* Sequential Circuits
 SR Latch (NAND version)

1 S’ S’ R’ Q
Q 0
Q’
0
0 1 0
0 1 Set
0 1
Q’ 1
0 R’ 1 0 1 0
Reset
1 1 Hold
X Y
00
NAND
1
01 1
10 1
11 0
* Sequential Circuits
 SR Latch (NAND version)

1 S’ S’ R’ Q
Q 0
Q’
0
0 1 0
0 1 Set
0 1
Q’ 1
1 R’ 1 0 Reset
1 0
1 1 0 1
Hold
Hold
X Y
00
NAND
1
01 1
10 1
11 0
* Sequential Circuits
 SR Latch (NAND version)

0 S’ S’ R’ Q
Q 1
Q’
0 1 1 Disallowed
0 1 0
0 1 Set
0 1
Q’ 1
0 R’ 1 0 1 0
Reset
1 1 0 1
Hold
Hold
X Y
00
NAND
1
01 1
10 1
11 0
* Sequential Circuits
 Flip-Flops
■ Latches are “transparent” (= any change
on the inputs is seen at the outputs
immediately).
■ This causes synchronization problems.
■ Solution: use latches to create flip-
flops that can respond (update) only on
specific times (instead of any time).
■ Types: RS flip-flop and D flip-flop

* Sequential Circuits
 Master-Slave FF configuration
using SR latches

* Sequential Circuits
 Master-Slave FF configuration
using SR latches (cont.)
S R CLK Q Q’
•When C=1, master is enabled and
0 0 1 Q0 Q0’ Store stores new data, slave stores old
0 1 1 0 1 Reset data.
1 0 1 1 0 Set •When C=0, master’s state passes
1 1 1 1 1 to enabled slave, master not
Disallowed sensitive to new data (disabled).
X X 0 Q0 Q0’ Store

* Sequential Circuits
 Characteristic Tables
■ Defines the logical properties of a flip-
flop (such as a truth table does for a
logic gate).
■ Q(t) – present state at time t
■ Q(t+1) – next state at time t+1

* Sequential Circuits
 Characteristic Tables (cont.)

SR Flip-Flop
S R Q(t+1) Operation
0 0 Q(t) No change/Hold
0 1 0 Reset
1 0 1 Set
1 1 ? Undefined/Invalid

* Sequential Circuits
 Sequential Circuit Analysis
■ Analysis: Consists of obtaining a suitable description
that demonstrates the time sequence of inputs,
outputs, and states.
■ Logic diagram: Boolean gates, flip-flops (of any kind),
and appropriate interconnections.
■ The logic diagram is derived from any of the
following:
■ Boolean Equations (FF-Inputs, Outputs)
■ State Table
■ State Diagram

* Sequential Circuits
 State Table Characteristics
■ State table – a multiple variable table with the
following four sections:
■ Present State – the values of the state variables for
each allowed state.
■ Input – the input combinations allowed.
■ Next-state – the value of the state at time (t+1) based
on the present state and the input.
■ Output – the value of the output as a function of the
present state and (sometimes) the input.
■ From the viewpoint of a truth table:
■ the inputs are Input, Present State
■ and the outputs are Output, Next State

* Sequential Circuits
 Example 1: State Table
■ The state table can be filled in using the next state and output
equations:
■ A(t+1) = A(t)x(t) + B(t)x(t)
■ B(t+1) =A (t)x(t);
■ y(t) =x (t)(B(t) + A(t))

Present State Input Next State Output

A(t) x(t) A(t+1) y(t)
B(t)
0 0 B(t+1)
0 0 0
0 1 0 1 0
0 0 0 0 1
1
0 1 1 1 0
1 0 0 0 1
0
1 1 1 0 0
0
1 0 0 0 1
* 1 Sequential Circuits 1 1 0 PJF -023
 State Diagrams
■ The sequential circuit function can be represented in
graphical form as a state diagram with the following
components:
■ A circle with the state name in it for each state
■ A directed arc from the Present State to the Next State
for each state transition
■ A label on each directed arc with the Input values which
causes the state transition, and
■ A label:
■ On each circle with the output value produced, or
■ On each directed arc with the output value produced.

* Sequential Circuits
 Example 1: State Diagram
x=0/ x=0/ x=1/
■ Which type? y=0 y=1 y=0
■ Diagram gets AB
00 x=0/ 10
confusing for
y=1
large circuits x=1/
■ For small circuits,
y=0 x=1/
usually easier to x=0/ y=0
understand than y=1
the state table 01 11
x=1/
y=0

* Sequential Circuits
Example of state diagram of SR latch

* Sequential Circuits