CHAPTER 4

INPUT/OUTPUT
1
Computer
Architecture and Organization
CONTENT

 Why I/O Unit

 External Devices

 Input Output Techniques

 I/O Module Function

 Programmed

 Interrupt driven

 Direct Memory Access (DMA)

2
GENERIC MODEL OF I/O
MODULE

3
INPUT/OUTPUT PROBLEMS

 Wide variety of peripherals

 Delivering different amounts of data

 At different speeds

 In different formats

 All slower than CPU and RAM

 Need I/O modules

4
 EXTERNAL DEVICES
 Provide a means of exchanging Three categories:
data between the external  Human readable
environment and the computer  Suitable for communicating with
 Attach to the computer by a the computer user
link to an I/O module  Video display terminals (VDTs),
 The link is used to exchange printers
control, status, and data between  Machine readable
the I/O module and the external
device  Suitable for communicating with
equipment
 Peripheral device  Magnetic disk and tape systems,
 An external device connected to an sensors and actuators
I/O module
 Communication
 Suitable for communicating with
remote devices such as a terminal,
a machine readable device, or
another computer 5
EXTERNAL DEVICE BLOCK
DIAGRAM

6
 Most common means of
computer/user interaction
KEYBOARD/MONITOR User provides input through the
keyboard
International Reference
Alphabet (IRA) The monitor displays data provided by
the computer
 Basic unit of exchange is the
character Keyboard Codes
 Associated with each character is a code
 Each character in this code is represented  When the user depresses a key it generates an
by a unique 7-bit binary code electronic signal that is interpreted by the
 128 different characters can be represented
transducer in the keyboard and translated into
the bit pattern of the corresponding IRA code
 Characters are of two types:  This bit pattern is transmitted to the I/O module
 Printable in the computer
 Alphabetic, numeric, and special characters
 On output, IRA code characters are transmitted
that can be printed on paper or to an external device from the I/O module
displayed on a screen
 Control  The transducer interprets the code and sends the
required electronic signals to the output device
 Have to do with controlling the printing or either to display the indicated character or
displaying of characters perform the requested control function
 Example is carriage return
 Other control characters are concerned with
communications procedures
7
I/O MODULE FUNCTION
 Control & Timing
 Coordinates the flow of traffic between internal resources and external
devices
 CPU Communication
 Involves command decoding, data, status reporting, address recognition

 Device Communication
 Involves commands, status information, and data

 Data Buffering
 Performs the needed buffering operation to balance device and memory
speeds
 Error Detection
 Detects and reports transmission errors

8
9
INPUT OUTPUT TECHNIQUES
 Programmed I/O
 Data are exchanged between the processor and the I/O module
 Processor executes a program that gives it direct control of the I/O operation
 When the processor issues a command it must wait until the I/O operation is
complete
 If the processor is faster than the I/O module this is wasteful of processor time

 Interrupt-driven I/O
 Processor issues an I/O command, continues to execute other instructions, and
is interrupted by the I/O module when the latter has completed its work
 Direct memory access (DMA)
 The I/O module and main memory exchange data directly without processor
involvement

10
 THREE
TECHNIQUES
FOR INPUT OF A
BLOCK OF DATA

11
PROGRAMMED I/O
 CPU has direct control over I/O
 Sensing status
 Read/write commands
 Transferring data

 CPU waits for I/O module to complete operation

12
PROGRAMMED I/O - DETAIL
 CPU requests I/O operation
 I/O module performs operation
 I/O module sets status bits
 CPU checks status bits periodically
 I/O module does not inform CPU directly
 I/O module does not interrupt CPU
 CPU may wait or come back later

13
 I/O COMMANDS
 There are four types of I/O commands that an I/O module may
receive when it is addressed by a processor:
1) Control
- used to activate a peripheral and tell it what to do
2) Test
- used to test various status conditions associated with an I/O module
and its peripherals
3) Read
- causes the I/O module to obtain an item of data from the peripheral
and place it in an internal buffer
4) Write
- causes the I/O module to take an item of data from the data bus and
subsequently transmit that data item to the peripheral

14
INTERRUPT DRIVEN I/O
 Overcomes CPU waiting
 No repeated CPU checking of device
 I/O module interrupts when ready

15
INTERRUPT DRIVEN I/O
BASIC OPERATION
 CPU issues read command
 I/O module gets data from peripheral whilst CPU does other work
 I/O module interrupts CPU
 CPU requests data
 I/O module transfers data

16
SIMPLE
INTERRUPT
PROCESSING

17
CPU VIEWPOINT
 Issue read command
 Do other work
 Check for interrupt at end of each instruction cycle
 If interrupted:-
 Save context (registers)
 Process interrupt
 Fetch data & store

 See Operating Systems notes

18
DESIGN ISSUES
 How do you identify the module issuing the interrupt?
 How do you deal with multiple interrupts?
 i.e. an interrupt handler being interrupted

19
IDENTIFYING INTERRUPTING
MODULE (1)
 Different line for each module
 PC
 Limits number of devices

 Software poll
 CPU asks each module in turn
 Slow

20
IDENTIFYING INTERRUPTING
MODULE (2)
 Daisy Chain or Hardware poll
 Interrupt Acknowledge sent down a chain
 Module responsible places vector on bus
 CPU uses vector to identify handler routine

 Bus Master
 Module must claim the bus before it can raise interrupt
 e.g. PCI & SCSI

21
MULTIPLE INTERRUPTS
 Each interrupt line has a priority
 Higher priority lines can interrupt lower priority lines
 If bus mastering only current master can interrupt

22
DIRECT MEMORY ACCESS

 Interrupt driven and programmed I/O require active CPU intervention

 Transfer rate is limited

 CPU is tied up

 DMA is the answer

23
DMA FUNCTION
 Additional Module (hardware) on bus
 DMA controller takes over from CPU for I/O

24
TYPICAL DMA MODULE
DIAGRAM

25
DMA OPERATION
 CPU tells DMA controller:-
 Read/Write
 Device address
 Starting address of memory block for data
 Amount of data to be transferred

 CPU carries on with other work

26
DMA TRANSFER
CYCLE STEALING
 DMA controller takes over bus for a cycle
 Transfer of one word of data
 Not an interrupt
 CPU does not switch context

 CPU suspended just before it accesses bus

 Slows down CPU but not as much as CPU doing transfer

27
DMA AND INTERRUPT
BREAKPOINTS DURING AN
INSTRUCTION CYCLE

28
ASIDE
 What effect does caching memory have on DMA?
 What about on board cache?
 Hint: how much are the system buses available?

29
 DMA CONFIGURATIONS (1)

 Single Bus, Detached DMA controller

 CPU is suspended twice

30
 DMA CONFIGURATIONS (2)

 Single Bus, Integrated DMA controller

 CPU is suspended once

31
 DMA CONFIGURATIONS (3)

 Separate I/O Bus

 CPU is suspended once

32