8051 Interrupts: MC & Es Class 09 - 25 August September 2023
8051 Interrupts: MC & Es Class 09 - 25 August September 2023
INTERRUPTS
The 8051 microcontroller can recognize five different events that cause
the main program to interrupt from the normal execution. These five
sources of interrupts in 8051are:
Timer 0 overflow interrupt- TF0
Timer 1 overflow interrupt- TF1
External hardware interrupt- INT0
External hardware interrupt- INT1
Serial communication interrupt- RI/TI
TIMER INTERRUPTS
When a timer/counter overflows, the
corresponding Timer flag ,TFO or TF1 is set to 1.
ETO and EXO are similar to ET1 & EX1 but operate for 0 counter part.
INTERRUPT PRIORITY
Internal RAM
External RAM
Internal special function Registers
Internal & External ROM
FINALLY
MOV MOVX MOVC
PUSH&POP
XCH
28 DIFFERENT MNEMONICS
COPY THE DATA
3 MAIN TYPES
1.IMMEDIATE DATA METHOD
MOV A,#25H // load 25H in to A
MOV R7,#07H // load the decimal value 07Hinto R7
MOV R4,#62 // load the decimal value 62 into R4.
MOV A,#0AAH : zero before A
MOV DPTR,#4532H // DPTR=4532H
CAUTION
NO IMMEDIATE DATA AS DESTINATION