The Von Neumann

Model
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The Stored Program Computer

1943: ENIAC
• Presper Eckert and John Mauchly -- first general electronic computer.
(or was it John V. Atananasoff in 1939?)
• Hard-wired program -- settings of dials and switches.
1944: Beginnings of EDVAC
• among other improvements, includes program stored in memory
1945: John von Neumann
• wrote a report on the stored program concept,
known as the First Draft of a Report on EDVAC
The basic structure proposed in the draft became known
as the “von Neumann machine” (or model).
• a memory, containing instructions and data
• a processing unit, for performing arithmetic and logical operations
• a control unit, for interpreting instructions
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Von Neumann Model

M EM ORY
MAR MDR

INPUT OUTPUT
Ke yb o a rd M o n it o r
Mous e PROCES S ING UNIT P rin t e r
Sca nne r LED
Dis k ALU TEMP Dis k

CON TROL UNIT

PC IR
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Memory
k x m array of stored bits (k is usually 2n)
Address
• unique (n-bit) identifier of location 0000
0001
Contents 0010
0011 00101101
• m-bit value stored in location 0100
0101
0110
•
Basic Operations: •
•
1101 10100010
LOAD 1110
• read a value from a memory location 1111

STORE
• write a value to a memory location
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Interface to Memory
How does processing unit get data to/from memory?
MAR: Memory Address Register
M EM OR Y
MDR: Memory Data Register
MAR MDR
To read a location (A):
1. Write the address (A) into the MAR.
2. Send a “read” signal to the memory.
3. Read the data from MDR.
To write a value (X) to a location (A):
1. Write the data (X) to the MDR.
2. Write the address (A) into the MAR.
3. Send a “write” signal to the memory.
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Processing Unit
Functional Units
• ALU = Arithmetic and Logic Unit
• could have many functional units.
some of them special-purpose PROCES S ING UN IT
(multiply, square root, …)
• LC-2 performs ADD, AND, NOT ALU TEMP
Registers
• Small, temporary storage
• Operands and results of functional units
• LC-2 has eight register (R0, …, R7)
Word Size
• number of bits normally processed by ALU in one instruction
• also width of registers
• LC-2 is 16 bits
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Input and Output

Devices for getting data into and out of computer
memory
INPUT OUTPUT
Ke yb o a rd M o n it o r
Each device has its own interface, Mouse
Sca nne r
P rin t e r
LED
usually a set of registers like the Dis k Dis k

memory’s MAR and MDR

• LC-2 supports keyboard (input) and console (output)
• keyboard: data register (KBDR) and status register (KBSR)
• console: data register (CRTDR) and status register (CRTSR)

Some devices provide both input and output

• disk, network
Program that controls access to a device is
usually called a driver.
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Control Unit
Orchestrates execution of the program

CONTR OL UNIT
PC IR

Instruction Register (IR) contains the current instruction.

Program Counter (PC) contains the address
of the next instruction to be executed.
Control unit:
• reads an instruction from memory
 the instruction’s address is in the PC
• interprets the instruction, generating signals
that tell the other components what to do
 an instruction may take many machine cycles to complete
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Instruction Processing

Fetch instruction from memory

Decode instruction

Evaluate address

Fetch operands from memory

Execute operation

Store result
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Instruction
The instruction is the fundamental unit of work.
Specifies two things:
• opcode: operation to be performed
• operands: data/locations to be used for operation

An instruction is encoded as a sequence of bits.

(Just like data!)
• Often, but not always, instructions have a fixed length,
such as 16 or 32 bits.
• Control unit interprets instruction:
generates sequence of control signals to carry out operation.
• Operation is either executed completely, or not at all.

A computer’s instructions and their formats is known as its

Instruction Set Architecture (ISA).
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Example: LC-2 ADD Instruction

LC-2 has 16-bit instructions.
• Each instruction has a four-bit opcode, bits [15:12].
LC-2 has eight registers (R0-R7) for temporary storage.
• Sources and destination of ADD are registers.

“Add the contents of R2 to the contents of R6,

and store the result in R6.”
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Example: LC-2 LDR Instruction

Load instruction -- reads data from memory
Base + offset mode:
• add offset to base register -- result is memory address
• load from memory address into destination register

“Add the value 6 to the contents of R3 to form a

memory address. Load the contents stored in
that address to R2.”
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Instruction Processing: FETCH

Load next instruction (at address stored in PC)
from memory F
into Instruction Register (IR).
• Load contents of PC into MAR. D
• Send “read” signal to memory.
• Read contents of MDR, store in IR.
EA

Then increment PC, so that it points to OP

the next instruction in sequence.
• PC becomes PC+1.
EX

S
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Instruction Processing: DECODE

First identify the opcode.
• In LC-2, this is always the first four bits of instruction. F
• A 4-to-16 decoder asserts a control line corresponding
to the desired opcode. D

Depending on opcode, identify other operands EA

from the remaining bits.
• Example:
OP
 for LDR, last six bits is offset
 for ADD, last three bits is source operand #2
EX

S
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Instruction Processing: EVALUATE ADDRESS

For instructions that require memory access,
compute address used for access. F

Examples: D
• add offset to base register (as in LDR)
• add offset to PC (or to part of PC) EA
• add offset to zero
OP

EX

S
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Instruction Processing: FETCH OPERANDS

Obtain source operands needed to
perform operation. F

Examples: D
• load data from memory (LDR)
• read data from register file (ADD) EA

OP

EX

S
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Instruction Processing: EXECUTE

Perform the operation,
using the source operands. F

Examples: D
• send operands to ALU and assert ADD signal
• do nothing (e.g., for loads and stores) EA

OP

EX

S
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Instruction Processing: STORE

Write results to destination.
(register or memory) F

Examples: D
• result of ADD is placed in destination register
• result of memory load is placed in destination register EA
• for store instruction, data is stored to memory
 write address to MAR, data to MDR OP
 assert WRITE signal to memory

EX

S
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Instruction Processing Summary

Instructions look just like data -- it’s all interpretation.

Three basic kinds of instructions:

• computational instructions (ADD, AND, …)
• data movement instructions (LD, ST, …)
• control instructions (JMP, BRnz, …)

Six basic phases of instruction processing:

F  D  EA  OP  EX  S
• not all phases are needed by every instruction
• phases may take variable number of machine cycles
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Driving Force: The Clock

The clock is a signal that keeps the control unit moving.
• At each clock “tick,” control unit moves to the next
machine cycle -- may be next instruction or
next phase of current instruction.
Clock generator circuit:
• Based on crystal oscillator
• Generates regular sequence of “0” and “1” logic levels
• Clock cycle (or machine cycle) -- rising edge to rising edge

“1”
“0”
Machine time
Cycle
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Instructions vs. Clock Cycles

MIPS vs. MHz
• MIPS = millions of instructions per second
• MHz = millions of clock cycles per second