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N-Bit Parallel Addersub

The document discusses the design of parallel n-bit adders and subtractors. It explains that an n-bit adder requires n full adders connected in series, with the carry out of each full adder connecting to the next's carry in. An n-bit subtractor can be made from half and full subtractors or full adders with a complemented input. The document also notes that an n-bit adder/subtractor can be made from a single circuit by providing the 2's complement of one input to allow subtraction.

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varshini yogarajan
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48 views

N-Bit Parallel Addersub

The document discusses the design of parallel n-bit adders and subtractors. It explains that an n-bit adder requires n full adders connected in series, with the carry out of each full adder connecting to the next's carry in. An n-bit subtractor can be made from half and full subtractors or full adders with a complemented input. The document also notes that an n-bit adder/subtractor can be made from a single circuit by providing the 2's complement of one input to allow subtraction.

Uploaded by

varshini yogarajan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Design of data path circuits:

N-bit Parallel
Adder/subtractor
N-bit Adder
• To add two n-bit binary numbers, we will require n-number of full adders.
• The addition of LSB bits can be done by using any half-adder or a full-
adder with Cin terminal grounded, but in practical parallel adders, we use
a full-adder at the least significant stage also to facilitate cascading.
• The carry-out of each full adder is also connected to the carry-in of the
next full adder in the higher-order.
• A parallel adder adds two numbers in parallel form and produces the sum
bits as parallel outputs.
• In two numbers, one is addend and the other is augend and both are
added parallelly to get the sum.
N-bit Subtractor
• A Parallel Subtractor is a digital circuit capable of finding the
arithmetic difference between two binary numbers that are greater
than one bit in length by operating on corresponding pairs of bits in
parallel.
• The parallel subtractor can be designed in several ways including a
combination of half and full subtractors, all full subtractors, or all full
adders with subtrahend complement input.
N-bit Parallel Adder/Subtractor
• We have seen a parallel adder and parallel subtractor circuit built using a cascaded
combination of full adders.
• However always from the point of optimization, we prefer using a single circuit to
accomplish multiple kinds of operations.
• This means in our case, we have to think whether it is possible to perform both n bit
addition as well as n bit subtraction using a single digital circuit i.e. a parallel adder or
subtractor circuit.
• The answer is yes. This is because, the subtraction process of binary numbers is
nothing but their 2’s complement addition.
• Hence the design of parallel adder when manipulated in a way so as to provide the 2’s
complement of the number whenever necessary can be used as a parallel adder-cum-
subtractor. One such design accomplished using the XOR gates is as shown by Figure.
Another way of implementation

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