Chapter 3 - Flip-Flop
Chapter 3 - Flip-Flop
3
LEARNING OUTCOME
• Types of Flip-flop
• Operation of each type of flip-flop.
• JK flip-flop to construct T flip-flop
and D flip-flop.
TYPES OF FLIP-FLOP
SR
JK
D
T
SR FLIP-FLOP
S Q S Q
CLK CLK
CLK is CLK is
activated by a R Q activated by a R Q
positive going negative going
transition transition
PGT NGT
CLOCKED SR FLIP-FLOP
S
A
C Q
CLK
D Q
B
R
CLOCKED SR FLIP-FLOP
S R Q(t+1) Operation
0 0 Qt hold
0 1 0 reset
1 0 1 set
1 1 1 invalid
EXAMPLE 1
SET
S Q
CLK
R CLR
Q
EXAMPLE 1
CLK 1 2 3 4 5 6
(b) R
(c) Q
JK FLIP-FLOP
J Q
CP
K Q
JK FLIP-FLOP
J A
C Q
clk
K D Q
B
JK FLIP-FLOP
CLK J K OUTPUT
0 0 Hold
0 1 Reset
1 0 Set
1 1 Togol
TIMING DIAGRAM
CLK
Q
EXAMPLE
The waveforms in figure (a) below are applied to the
J, K, and clock inputs are indicated. Determine the Q
output, assuming that the flip-flop is initially
RESET.
SET
J Q
CLK
K CLR
Q
EXAMPLE
CLK 1 2 3 4 5
(a) K
(b) Q No
Toggle Change Reset Set Set
JK FLIP-FLOP WITH
ASYNCHRONOUS INPUT
• For the clocked flip-flops that we have been
studying, the inputs have been referred to as
control inputs.
• These inputs are also called synchronous input,
because their effect on the flip-flop output is
synchronized with the CLK input.
• As we have seen, the synchronous control inputs
must be used in conjunction with a clock signal to
trigger the flip-flop.
JK FLIP-FLOP WITH
ASYNCHRONOUS INPUT
J PRE
Q
CLK
K CLR Q
TRUTH TABLE OF JK FLIP-FLOP
WITH AN ASYNCHRONOUS INPUT
INPUT OUTPUT
OPERATION Asynchronous Synchronous Qt+1
preset clear J K Clk
Asynchronous set 0 1 x x x 1
Asynchronous reset 1 0 x x x 0
Invalid 0 0 x x x t+1 (invalid)
hold 1 1 0 0 Qt
reset 1 1 0 1 0
set 1 1 1 0 1
toggle 1 1 1 1 t
EXAMPLE
EXAMPLE 1
EXAMPLE 2
T FLIP-FLOP
T Q T
J Q
CLK
Q K Q
T FLIP-FLOP
T Q
CP
Q
T FLIP-FLOP
Q T Q (t+1)
0 0 0
0 1 1
1 0 1
1 1 0
T FLIP-FLOP
EXAMPLE 1
EXAMPLE 2
D FLIP-FLOP
D Q D J Q
CP
Q
K Q
D FLIP-FLOP
D
Q
CP
(clo ck puls e)
Q
D FLIP-FLOP
CLK D Q Operation
0 1 0 start
↑ 1 1 store 1
0 0 Q no change
↑ 0 0 store 0
D FLIP-FLOP