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ENT4212 Lecture3

The document discusses different families of logic gates used in digital electronics, their characteristics and parameters. It describes logic gate families like diode logic (DL), resistor-transistor logic (RTL), diode-transistor logic (DTL), transistor-transistor logic (TTL), emitter-coupled logic (ECL), and MOS/CMOS logic. It also covers topics like fan-in, fan-out, propagation delay, noise margins, adders, and issues related to diode logic.

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Kalindu Liyanage
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17 views

ENT4212 Lecture3

The document discusses different families of logic gates used in digital electronics, their characteristics and parameters. It describes logic gate families like diode logic (DL), resistor-transistor logic (RTL), diode-transistor logic (DTL), transistor-transistor logic (TTL), emitter-coupled logic (ECL), and MOS/CMOS logic. It also covers topics like fan-in, fan-out, propagation delay, noise margins, adders, and issues related to diode logic.

Uploaded by

Kalindu Liyanage
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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ENT 4212 –

PROGRAMMMMABLE
DIGITAL
ELECTRONICS
R D RASANGIKA
B. SC. (SPECIAL) APPLIED ELECTRONICS
WUSL
LOGIC
FAMILIES
There are several different families of logic gates. Each family has its capabilities
and limitations, its advantages and disadvantages.
1. Diode Logic (DL)
2. Resistor-Transistor Logic (RTL)
3. Diode-Transistor Logic (DTL)
4. Transistor-Transistor Logic (TTL)
5. Emitter-Coupled Logic (ECL)
6. MOS/CMOS Logic
The most important are TTL and CMOS
• TTL (Transistor-Transistor Logic), made of bipolar transistors
It is called transistor–transistor logic because the logic
function and amplification are performed by transistors
• CMOS (Complementary Metal Oxide Semiconductor)
made from MOSFET transistors
In the modern world, CMOS is the dominate technology used
to construct digital circuit components, especially large-scale
integrated circuits
CHARACTERISTICS OF AN IDEAL LOGIC FAMILY

The ideal logic family should have or be:


• Low power
• High speed
• Easy to use
• Many/different logics functions
• Clear voltage levels for 0 (LOW) and 1
(HIGH
CHARACTERISTIC PARAMETERS OF LOGIC
FAMILIES
• HIGH-LEVEL INPUT CURRENT, IIH.
• LOW-LEVEL INPUT CURRENT, IIL
• HIGH-LEVEL OUTPUT CURRENT, IOH
• LOW-LEVEL OUTPUT CURRENT, IOL
• HIGH-LEVEL INPUT VOLTAGE, VIH
• LOW-LEVEL INPUT VOLTAGE, VIL
• HIGH-LEVEL OUTPUT VOLTAGE, VOH
• LOW-LEVEL OUTPUT VOLTAGE, VOL
• PROPAGATION DELAY
• POWER DISSIPATION
FAN-
IN
• Fan-in can be defined as the number of standard loads drawn by an input to
ensure reliable operation of the gate.
• A two input AND gate has a fan-in of 2. A NOT gate always has a fan-in of one.
• The fan-in has some effect on the delay offered by a gate. Normally the delay
increases as a quadratic function of fan-in.
FAN
OUT
• THE FAN-OUT OF A GATE SPECIFIES THE NUMBER OF STANDARD LOADS THAT CAN BE
CONNECTED TO THE OUTPUT OF THE GATE WITHOUT DEGRADING ITS NORMAL
OPERATION.
• THE FAN-OUT IS THE NUMBER OF INPUTS OF A LOGIC FUNCTION THAT CAN BE DRIVEN FROM
A SINGLE OUTPUT WITHOUT CAUSING ANY FALSE OUTPUT.
PROBLE
M
• A STANDARD TTL GATE HAS THE FOLLOWING PARAMETERS. IOH = 400 ΜA, IIH = 40 ΜA, IOL
=16 MA AND IIL = 1.6 MA. COMPUTE THE FAN OUT.
POWER
DISSIPATION
THE POWER DISSIPATION PARAMETER FOR A LOGIC FAMILY IS SPECIFIED IN TERMS OF POWER CONSUMPTION PER GATE.

• VCC - SUPPLY VOLTAGE

• ICC - SUPPLY CURRENT

• ICCH - HIGH-LEVEL SUPPLYCURRENT

• ICCL - LOW-LEVEL SUPPLY CURRENT

 CMOS FAMILY POWER DISSIPATION IS DEPENDENT ON THE FREQUENCY OF OPERATION.


IMPORTANCE OF POWER DISSIPATION

1.Power dissipation of a circuit or system defines battery life. The greater the power
dissipation, the shorter the battery life.
2.Power dissipation is proportional to the heat generated by the chip or system. Excessive
heat dissipation may increase operating temperature and cause gate circuitry to drift out
of its normal operating range

Ps - Static Power Dissipation : Power consumed when the gate is at logic high or logic low
(or when the clock is turned off).
Pd - Dynamic Power Dissipation : The power dissipated during input and output
transitions.

Total P = Ps +Pd
RISE TIME/FALL TIME AND
DELAYS
• RISE TIME, TR. - THIS IS THE TIME THAT ELAPSES BETWEEN 10 AND 90 % OF THE FINAL SIGNAL LEVEL WHEN THE SIGNAL
IS MAKING A TRANSITION FROM LOGIC LOW TO LOGIC HIGH.
• FALL TIME, TF . - THIS IS THE TIME THAT ELAPSES BETWEEN 90 AND 10 % OF THE SIGNAL LEVEL WHEN IT IS MAKING HIGH
TO
LOW TRANSITION.

Gate Delay
The gate delay is also known as the propagation delay. This is the delay caused by signal traveling through the
gate.
• The propagation delay is measured at midpoints
• Delay may not be the same for both transitions
• The maximum frequency of operation of the gate can be hindered by excessive delays
RISE TIME/FALL TIME AND
DELAYS
Wire Delay
Gates are connected together with wires and this wires do delay the signal they
carry.
also called as flight time

Wire delays become very signification with increase in frequency


NOISE
MARGIN
When a digital signal is transmitted over a medium spurious electrical signal can induce
noise. The noise margin is computed using the voltage levels of the input signal and
output signal.
VOH,min : The minimum output voltage in HIGH state . VOH,min is 2.4 V for TTL and 4.9 V for CMOS.
VOL,max : The maximum output voltage in LOW state . VOL,max is 0.4 V for TTL and 0.1 V for CMOS.
VIH,min : The minimum input voltage guaranteed to be recognized as logic 1. VIH,min is 2 V for TTL and 3.5V for CMOS.
VIL,max : The maximum input voltage guaranteed to be recognized as logic 0. VIL,max is 0.8 V for TTL and 1.5 V for CMOS.
IOH,min : The maximum current the output can source in HIGH state while still maintaining the output voltage above
VOH,min. IOL,max : The maximum current the output can sink in LOW state while still maintaining the output voltage below
VOL,max.
II,max : The maximum current that flows into an input in any state (1µA for CMOS).

Low noise margin LNM=VIL,max − VOL,max.


High noise margin HNM=VOH,min −
VIH,min
VOH,min : The minimum output voltage in HIGH state
. VOL,max : The maximum output voltage in LOW
state .
VIH,min : The minimum input voltage guaranteed to
be recognized as logic 1.
VIL,max : The maximum input voltage guaranteed to
be recognized as logic 0.
IOH,min : The maximum current the output can source in HIGH state while still maintaining the output voltage above
VOH,min. IOL,max : The maximum current the output can sink in LOW state while still maintaining the output voltage
below VOL,max.
II,max : The maximum current that flows into an input in any state (1µA for CMOS).

Low noise margin LNM=VIL,max − VOL,max.


High noise margin HNM=VOH,min −
VIH,min.

NM = min {HNM, LNM}


COMBINATIONAL CIRCUIT
PROBLEM
• HOW DO YOU IMPLEMENT A THREE-INPUT EX-NOR FUNCTION USING ONLY TWO-INPUT EX-
NOR GATES?
ADDER
What is Adder? S
In electronics an adder is digital circuit that perform addition of numbers. In modern
computer adder reside in the arithmetic logic unit (ALU).

Adders are important not only in the computer but also in many types of
digital systems in which the numeric data are processed.

Types of adders
• Half adder
• Full adder
HALF
ADDER
The half adder accepts two binary digits on its inputs and produce two binary
digits Outputs a sum bit and a carry bit.
FULL
ADDER
The full adder accepts two inputs bits and an input carry and generates a sum output
and an output carry
The full-adder is usually a component in a cascade of adders, which add 8, 16,
32,etc. amount of binary numbers.

Question: Derive the output logic and the truth table for the full
adder
FULL
S = A ⊕ B ⊕ Cin ADDER
C = A*B + Cin *(A ⊕
B)
Half adder vs Full
adder HALF ADDER
PARAMETERS FULL ADDER
Definition Half Adder is Full Adder is a
combinational logic combinational circuit
circuit which adds two which adds three 1-bit
1-bit digits. digits.
Carry Addition Carry generated from Carry generated from
previous addition is previous addition is
not added in next added in the next
step. step.
Hardware components It consists of one EX-OR It consists of two EX-
gate and one AND OR, two AND gate and
gate. one OR gate.

Applications Calculators, computers, Multiple bit addition,


digital measuring digital processors etc.
devices etc.
DIODE
• IN DL (DIODE LOGIC), ONLY DIODELOGIC
AND RESISTORS ARE USED FOR IMPLEMENTING A
PARTICULAR LOGIC. DIODE CONDUCTS ONLY WHEN IT IS FORWARD BIASED.

Input is raised to +5 volts

Silicon diodes introduce a forward voltage drop of 0.65-


0.7V

Hence VQ ≈ 4.35V

Voltage above +3.5 volts shall be logic 1, and any


Voltage below +1.5 volts shall be logic 0
• DL AND GATE
In comparison with the OR gate the diodes have been reversed and the resistor is set to pull the output voltage up
to a logic 1 state.

If and only if All 3 inputs set to 5V , VQ is 5V.


ISSUES RELATED TO
• Diode Logic suffers from DL
voltage degradation from one stage to the next.
• Diode Logic only permits the OR and AND functions.
• Diode Logic is used extensively but not in integrated circuits.
RESISTOR TRANSISTOR LOGIC
(RTL)

In RTL (resistor transistor logic), all the logic are implemented using resistors and transistors. One
basic thing about the transistor (NPN), is that HIGH at input causes output to be LOW (i.e. like a
inverter). In the case of PNP transistor, the LOW at input causes output to be HIGH.

Advantage: Disadvantage:
•Less number of Transistors •High Power Dissipation
•Low Fan In
DIODE TRANSISTOR LOGIC
(DTL)
THE BASIC CIRCUIT ELEMENT IN DTL DIGITAL LOGIC FAMILY IS THE NAND GATE
THE CONSTRUCTION OF THISGATE IS THE COMBINATION OF DIODE LOGIC AND GATE AND THE
TRANSISTOR IN ITS INVERTER CONFIGURATION

Cutoff analysis
Assume at least one of the inputs A,B, or C is at 0.2
V transistor is in the cutoff region

Saturation analysis
If all the inputs to the gate are at logic 1 (5V)
transistor is in saturation.

Base discharge resistor


All the inputs are at logic 1 and suddenly one input drops to logic
0 Resistor provides the discharge path (-2V to increase rate of
discharge)
THANK
YOU!

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