UNIT IV

DIGITAL ELECTRONICS
 Number system

A number system specifies how values are represented.

Human uses DECIMAL Number System. There are ten
digits in Decimal Number System: 0,1,2,3,4,5,6,7,8,9
Digital Computers use Binary Numbers, which have only
two digits: 0,1 There are other number systems,
including: Octal and Hexadecimal
Radix Number Systems
Each number system has a number of different digits
which is called the radix or the base of the number
system.

• Decimal Base = 10
• Binary Base = 2
• Octal Base = 8
• Hexadecimal (Hex) Base = 16
 Decimal Number System
Base (Radix) 10
Digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
e.g. 747510

The magnitude represented by a digit is decided by

the position of the digit within the number.
1000 100 10 1
7 4 7 5

For example the digit 7 in the left-most position of

7475 counts for 7000 and the digit 7 in the second
position from the right counts for 70.
 Binary Number System
Base (Radix) 2
Digits 0, 1
e.g. 11102
8=23 4=22 2=21 1=20

1 1 1 0
The digit 1 in the third position from the right
represents the value 4 and the digit 1 in the fourth
position from the right represents the value 8.
 Octal Number System
Base (Radix) 8
Digits 0, 1, 2, 3, 4, 5, 6, 7
e.g. 16238
512=83 64=82 8=81 1=80

1 6 2 3

The digit 2 in the second position from the right

represents the value 16 and the digit 1 in the fourth
position from the right represents the value 512.
 Hexadecimal Number System
Base (Radix) 16
Digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
A, B, C, D, E, F
e.g. 2F4D 16
4096=163 256=162 16=161 1=160

2 F 4 D

The digit F in the third position from the right represents

the value 3840 and the digit D in the first position from
the right represents the value 1.
Binary Arithmetic

• Addition

•Complements
•Subtraction
Binary Addition
0 (b) 0
(a)
+0 +1
0 1

(c) 1 (d) 1
+0 +1
1 10
Carry Bit
 Binary Addition Examples
(a) 1011 (b) 1010 (c) 1011
+ 1100 + 100 + 101
10111 1110 10000

(d)
101 (e) 10011001
+ 1001 + 101100
1110 11000101
 Binary Complement
(1s Complement) Operation
1 0
0 1
Example

110010110

001101001
 Two’s Complement
The Two’s complement of a binary number is
obtained by first complementing the number and
then adding 1 to the result.

1001110
0110001 One’s Complement
+ 1
0110010 Two’s Complement
 Binary Subtraction
Binary subtraction is implemented by adding the Two’s
complement of the number to be subtracted.

Two’s
Example complement
of 1001
1101 1101
-1001 +0111
10100
If there is a carry then it is ignored. Thus, the
answer is 0100.
Binary Codes
A binary code is a group of n bits that assume up
to 2n distinct combinations of 1’s and 0’s with
each combination representing one element of the
set that is being coded.

• BCD – Binary Coded Decimal

• ASCII – American Standard Code for
Information Interchange
 BCD – Binary Coded Decimal
Decimal BCD
Number Number
When the decimal numbers are
represented in BCD, each decimal 0 0000
digit is represented by the 1 0001
equivalent BCD code. 2 0010
3 0011
Example :BCD Representation of 4 0100
Decimal 6349 5 0101
6 3 4 9 6 0110
7 0111
0110 0011 0100 1001 8 1000
9 1001
ASCII
Number ASCII Letter ASCII

0 A
0110000 1000001
1 B
0110001 1000010
2 C
0110010 1000011
3 D
0110011 1000100
4 E
0110100 1000101
5 F
ASCII Continued.
Letter ASCII Letter ASCII
J S
1001010 1010011
K T
1001011 1010100
L U
1001100 1010101
M V
1001101 1010110
N W
1001110 1010111
O X
 Logic Gates

• Binary information is represented in digital

computers by physical quantities called signals.

• Two different electrical voltage levels such as 3

volts and 0.5 volts may be used to represent binary 1
and 0.

• Binary logic deals with binary variables and with

operations that assume a logical meaning.
 Logic Gates Contd…

• A particular logic operation can be described in an

algebraic or tabular form.

•The manipulation of binary information is done by

the circuits called logic gates which are blocks of
hardware that produce signals of binary 1 or 0 when
input logic requirements are satisfied.
 Logic Gates Contd…
• Each gate has a distinct graphics symbol and it’s
operation can be described by means of an algebraic
expression or in a form of a table called the truth table.

• Each gate has one or more binary inputs and one

binary output.
Logic Gates
AND
OR
NOT (Inverter)
NAND (Not AND)
NOR (Not OR)
XOR (Exclusive-OR)
Exclusive-NOR
 AND
A
Logic Gate: A*B Truth Table:
B
A B A*B
0 0 0
A B 0 1 0
Series Circuit:
1 0 0
1 1 1
A*B
 OR
A
Logic Gate: A+B Truth Table:
B

A
A B A+B
0 0 0
0 1 1
Parallel Circuit:
B 1 0 1
1 1 1
A+B
 NOT

Logic Gate: A A’ or A
(also called an inverter) Truth Table:

a A
0 1
1 0
Single-throw A
Double-pole
Switch: A’ or A
 n-input Gates
• Because + and * are binary operations, they can be cascaded
together to OR or AND multiple inputs.

A A
B A+B+C B ABC
C

A A
B A+B+C B ABC
C C
 n-bit Inputs
• For convenience, it is sometimes useful to think of the logic
gates processing n-bits at a time. This really refers to n
instances of the logic gate, not a single logic date with n-inputs.

1101100101
1101110111
0100110111

10001111 00001100
00111100

110001 001110
 Logic Circuits ≡ Boolean Expressions
• All logic circuits are equivalent to Boolean expressions and any boolean
expression can be rendered as a logic circuit.
• AND-OR logic circuits are equivalent to sum-of-products form.
• Consider the following circuits:

A y=aB+Bc
abc
B aBc
C A
B Y
y
C

Ab
y=abc+aBc+Ab
 NAND and NOR Gates
• NAND and NOR gates can greatly simplify circuit diagrams.
As we will see, can you use these gates wherever you
could use AND, OR, and NOT.
A B AB
0 0 1
NAND 0 1 1
x=A.B 1 0 1
1 1 0
A B AB
NOR 0 0 1

x=A+B 0 1 0
1 0 0
1 1 0
 XOR and XNOR Gates
• XOR is used to choose between two mutually exclusive inputs. Unlike
OR, XOR is true only when one input or the other is true, not both.
A B AB
XOR 0 0 0
0 1 1
x = AB 1 0 1
1 1 0

XNOR A B A B
0 0 1
x =A B
0 1 0
1 0 0
1 1 1
 Properties of NAND AND NOR
• NAND and NOR have special properties, but neither satisfies
the distributive or associative laws.
NAND NOR
x1=X x0=X
x  0=1 x  1=0
x  x=X x  x=X
x  y=X+Y x  y=XY
X  Y=x+y X  Y=xy
not (x  y)=xy not (x  y)=x+y

It should be clear by looking at these properties that

NAND and NOR are duals.
 NAND and NOR as Universal Logic Gates
• Any logic circuit can
be built using only
NAND gates, or only
NOR gates. They
are the only logic
gate needed.
• Here are the NAND
equivalents:
 NAND and NOR as Universal Logic Gates (cont)
• Here are the NOR
equivalents:
• NAND and NOR can
be used to reduce the
number of required
gates in a circuit.
 Half Adder
• Half adder is for addition of 2 single bits
• It has two 1-bit inputs and two 1-bit outputs The
inputs are the 2 bits to be added (a, b)
• The outputs are 1-bit sum (s) & 1-bit carry (c)
• The logic is:
 Half Adder

Binary Addition
The half adder adds 2 single-bit inputs
It cannot complete a full addition
Half Adder
 Full Adder

• To carry the addition, an adder with 3 inputs is

required. A Full Adder takes in 3
• inputs (a, b and ci) and produces 2 outputs (s, co) a &
b are the 2 bits to be added,
• ci is the carry input (carry over from the previous bit)
and co is the carry output (to
• the next bit)
Full Adder
Logic for Full Adder
 Full Adder
• The below implementation shows implementing the full adder with
AND-OR gates,
• instead of using XOR gates. The basis of the circuit below is from the
above Kmap.

Circuit-SUM
 Full Adder

Circuit-CARRY

Full adder can be built from 2 half adders

s = a „vƒn b „vƒn ci
co = ab+bci+aci
= ab+(a.bci+abci)+(abci+ab.ci)
= ab + abci + ci (a.b+ab.) = ab + ci (a „v b)
 Full Adder

Full adder can be built from 2 half adders

 Analog to Digital Converters
Representing a continuously varying physical
quantity by a sequence of discrete numerical
values.

03 07 10 14 09 02 00 04
 Conversion Methods

• Ladder Comparison
• Successive Approximation
• Slope Integration
• Flash Comparison
Ladder Comparison
 Single slope integration
20
•Charge a capacitor at constant

Voltage accross the capacitor

18
16
current 14
12
•Count clock ticks 10

•Stop when the capacitor voltage

8 Vin
6

matches the input 4

2
•Cannot achieve high resolution 0
0 2 4 6 8 10 12 14 16
-Capacitor and/or comparator Counting time Time

Start
Conversion Start
S Q Enable
Conversion

- R

Counter
N-bit Output
C
IN
+ Oscillator Clk
Successive Approximation
 Flash Comparison
•If N is the number of bits
in the output word….
•Then 2N comparators will
be required.
•With modern
icroelectronics this is
quite possible, but will be
expensive.
 Pro and Cons
• Successive Approximation
The Happy Medium ??
• Slope Integration & Ladder Approximation
Cheap but Slow
• Flash Comparison
Fast but Expensive
 Resolution

Suppose a binary number with N bits is to

represent an analog value ranging from 0 to A

There are 2N possible numbers

Resolution = A / 2N
 Quantization Noise
Each conversion has an average uncertainty of one-
half of the step size ½(A / 2N)

This quantization error places an upper limit on the

signal to noise ratio that can be realized.

Maximum (ideal) SNR ≈ 6 N + 1.8 decibels (N = # bits)

e.g. 8 bit → 49.8 db, 10 bit → 61.8 db
 Flip-Flop
Circuits whose outputs depends not only on the present
input value but also the past input value are known as
sequential logic circuits. The mathematical model of a
sequential circuit is usually referred to as a sequential
machine.

Figure 1. Block Diagram of Sequential Circuit.

 Clock Pulse Definition
Positive Pulse Negative Pulse

Positive Negative Negative Positive

Edge Edge Edge Edge

Edges can also be referred to as leading and trailing.

 SR Flip-Flop
SYMBOL CHARACTERISTICS TABLE

EXCITATION TABLE
CHARACTERISTICS EQUATION

Q(next) = S + R'Q

SR = 0
 JK Flip-Flop
SYMBOL CHARACTERISTICS TABLE

EXCITATION TABLE
CHARACTERISTICS EQUATION
 D Flip-Flop
SYMBOL CHARACTERISTICS TABLE

EXCITATION TABLE
CHARACTERISTICS EQUATION
 T Flip-Flop
SYMBOL CHARACTERISTICS TABLE

EXCITATION TABLE
CHARACTERISTICS EQUATION
 Registers and Counters
Register - a group of binary storage cells (flip-flops) suitable
for holding binary information.
An n-bit register is a group of n flip-flops.

Counter - a register that goes through a predetermined

sequence of states.

Memory - a collection of storage cells and circuitry to transfer

data in and out of memory.
- RAM, Random Access Memory: capable of both read and
write.
- ROM, Read Only Memory
 Counters
Counter - a sequential circuit which goes through a
sequence of state upon application of input pulses. Normally,
application of input counter is the clock pulse.
A binary counter with n ff can count from 0 to 2n -1
Example: - Design a 3 - bit binary counter using T flip - flops.

000
001 111
No input.
010 110 Present state is
output.
011 101
100
 Present State Next State Flip - Flop Inputs
ABC ABC TA TB TC
000 001 0 0 1
001 010 0 1 1
010 011 0 0 1
011 100 1 1 1
100 101 0 0 1
101 110 0 1 1
110 111 0 0 1
111 000 1 1 1
B B

0 0 1 0 0 1 1 0
A 0 0 1 0 A 0 1 1 0

TA= BC C C TB = C
 B

1 1 1 1
TC = 1
A 1 1 1 1

C
A B C

T Q T Q 1 T Q
A B C
CP CP CP
Q Q Q

Input
 Registers
Latch
A4 A3 A2 A1

Q Q Q Q
D D D D

CP
Gate I2 I1
Input I4 I3

4-bit register

The data at I1 - I4 is transferred (and held) to A1 - A4 upon

receiving a clock pulse. The data must be stable during the clock
pulse.
 Register
4-Bit Register With Parallel Load

CP - Reduces loading on master-clock. Causes FF to load on

negative edge of CP to overcome any propagation delays.

Clear - Buffer reduces loading.

Load - Buffer reduces loading. When load = 0, input is cut off;

S and R = 0

Inputs - Inverters on R inputs cause SR FF to become a DD FF.

 Shift Registers
Serial
Serial SO Input
Input D Q D Q D Q D Q

CP

Unidirectional shifting on the clock pulse, either Right or Left.

Small circle on CP input to FF indicates a shift on the negative

edge of the CP.