1 Course Material - All Chapter 04-01-2024
1 Course Material - All Chapter 04-01-2024
MICROCONTROLLERS
(BECE204L)
Dr. Satheesh Kumar S
Assistant Professor Sr. Gr2
School of Electronics Engineering
1
Module 3:
Microcontroller Architecture: Intel 8051
Microcontroller 8051 - Organization and Architecture, RAM-ROM Organization,
Machine Cycle, Instruction set: Addressing modes, Data Processing - Stack,
Arithmetic, Logical; Branching – Unconditional and Conditional, Assembly
programming.
References:
• Muhammed Ali Mazidi, Janice GillispieMazidi ,Rolin D Mc Kinlay ,The 8051 Microcontroller
and Embedded Systems Using Assembly and C , Second Edition ,2008 , Pearson Education
• The 8051 microcontroller : architecture, programming, and applications, Kenneth J. Ayala
Course Outcomes:
CO3: Comprehend the architectures and programming of 8051 microcontroller.
2
Microprocessor vs
Microprocessor
Microcontroller?
• A microprocessor is also known as a central processing unit in which numbers
of peripherals’ are fabricated on a single chip. It has ALU (arithmetic and logic
unit), a control unit, registers, bus systems and a clock to perform
computational tasks.
• Microprocessors are not made for a specific task as well as they are useful
where tasks are complex and tricky like the development of software, games,
and other applications that require high memory and where input and output
are not defined.
• Ex: A) Household devices: Complex home security, Home computers, Video
game systems and many more.
B) Transportation and Industrial Devices: Automobiles, trains, planes,
Computer servers, high tech medical devices, etc.
3
Microcontroller
• The microcontroller is designed for a specific task or to perform the assigned
task repeatedly. Once the program is embedded on a microcontroller chip, it
can’t be altered easily and you may need some special tools to reburn it.
• As per application, the process is fixed in microcontroller. Hence, the output
depends on the input given by the user or sensors or predefined inputs.
• Ex: Calculator, Washing Machine, ATM machine, Robotic Arm, Camera,
Printer, Microwave oven, Oscilloscope, Digital multimeter, ECG Machine, etc.
4
A microcontroller is a small and low-cost microcomputer, which is
designed to perform the specific tasks of embedded systems like
displaying microwave’s information, receiving remote signals, etc.
29
Differences Between Microprocessor And
MICROPROCESSOR MICROCONTROLLER
Microcontroller
1. 1.
8
Advantages of Microcontroller based
•
System
As the peripherals are integrated into a single chip, the overall
system
• As the peripherals are integrated with a microprocessor the
system is more reliable.
• Though microcontroller may have on chip ROM,RAM and I/O
ports, addition ROM, RAM I/O ports may be interfaced externally
if required.
• On chip ROM provide a
9
Why/how we choose a
Microcontroller
Three criteria in Choosing a Microcontroller:
1. Meeting the computing needs of the task efficiently and cost effectively.
• speed, the amount of ROM and RAM, the number of I/O ports and timers,
size, packaging, power consumption.
•easy to upgrade.
•cost per unit.
•Noise of environment.
2. Availability of software development tools
• assemblers, debuggers, C compilers, emulator, technical
simulator, support
3. Wide availability and reliable sources of the microcontrollers
10
Types of
Microcontrollers areMicrocontrollers
divided into various categories based on
bits, memory, architecture and instruction sets.
• Based on bits: 8-bit, 16-bit, 32-bit
• Based on memory: External memory microcontroller, Embedded
memory microcontroller
• Based on instruction set: CISC, RISC
11
Types of
Based on bits:
Microcontrollers
8-bit microcontroller
• This type of microcontroller is used to execute arithmetic and
logical operations like addition, subtraction, multiplication
division, etc.
• For example, Intel 8031 and 8051 are 8 bits microcontroller.
12
16-bit microcontroller
• This type of microcontroller is used to perform arithmetic and
logical operations where higher accuracy and performance is
required.
• For example, Intel 8096 is a 16-bit microcontroller.
32-bit microcontroller
• This type of microcontroller is generally used in automatically
controlled appliances like automatic operational machines,
medical appliances, etc.
13
Based on memory:
External memory microcontroller
• This type of microcontroller is designed in such a way that they
do not have a program memory on the chip.
• Hence, it is named as external memory microcontroller.
• For example: Intel 8031 microcontroller.
Embedded memory microcontroller
• This type of microcontroller is designed in such a way that the
microcontroller has all programs and data memory, counters and
timers, interrupts, I/O ports are embedded on the chip.
• For example: Intel 8051 microcontroller.
14
Based on instruction set:
CISC
• CISC stands for Complex Instruction Set Computer.
• It allows the user to insert a single instruction as an alternative to
many simple instructions.
•Ex: JZ TEMP - if the number in the accumulator is not 0, jump to the address
marked as TEMP;
ADD A,R3 - add R3 and accumulator;
CJNE A,#20,LOOP - compare accumulator with 20. If they are not equal, jump to
the address marked as LOOP;
RISC
• RISC stands for Reduced Instruction Set Computers.
• It reduces the operational time by shortening the clock cycle per
instruction. 15
Basic technical jargons and concepts
in Microprocessor/controller
Microprocessor (µp) - General purpose
Microcontroller (µc) - Application specific
Memory array and addressing: 2n=Memory size
Where n= address bus size
Word – Equal to processor capacity
Von Neumann Architecture – Same memory space for code
and data
Harvard Architecture – Different spaces for code and data
Basic technical jargons and concepts
in Microprocessor/controller
18
Block Diagram Of 8051
Microcontroller
19
Features of 8051 microcontroller
• 8-bit ALU, Accumulator and 8-bit Registers; hence it is an 8-bit microcontroller
• 8-bit data bus - It can access 8 bits of data in one operation
• 16-bit address bus - It can access 216 memory locations - 64 KB (65536 locations) each
of RAM and ROM
• On-chip RAM - 128 bytes (data memory)
• On-chip ROM - 4 Kbyte (program memory)
• Four byte bi-directional input/output port
• UART (serial port)
• Two 16-bit Counter/timers: T0 and T1.
• Two-level interrupt priority: 2 external & 3 internal interrupt sources.
• Oscillator and clock circuits.
• Operating frequency: 11.04962 MHz (can vary up to 16MHz in some versions of
8051)
Address Bus (RAM)
25
Internal Data Memory and Special Function Register (SFR) Map
26
Pin diagram of 8051
Microcontroller
27
What is port
• “Port” refers to a group ?of pins on a microcontroller which can be
accessed simultaneously. (8051µC has 4-ports of 8-bits each
namely P0-P3)
• Physically, port is assigned with a register/memory location
to store the data temporarily while transferring through it.
• Ports can be programmed as output or input ports by sending
00H (all 0’s) or FFH (all 1’s) initially. By default all ports acts are
input ports.
• Due to functionality, some pins have two fold roles.
• All port pins can be designated as input or output, according to
the needs of a device that's being connected to it.
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Pin Description of 8051
microcontroller
P0.0- P0.7(AD0-AD7) :
• No external memory
• The port 0 pins multiplexed with lower order address/data
pins if the microcontroller is accessing external memory
otherwise acts as general purpose i/o ports.
• Performs dual functions
29
Pin Description of 8051
microcontroller
P1.0- P1.7 :
• These 8-pins are dedicated for Port1 to perform
input or output port operations.
• Doesn’t perform dual functions.
30
Port-1 Internal structure
Pin Description of 8051
microcontroller
P2.0- P2.7(A8-A15) :
• The port2 pins are multiplexed with the higher order address
pins when the microcontroller is accessing external memory
otherwise they act as i/o pins.
32
Pin Description of 8051
P3.0- P3.7 microcontroller
:
• These 8-pins are meant for i/o operations and also for some
control operations like Read, Write, Timer0, Timer1, INT0,
INT1, RxD and TxD
33
Port programming
Data transfer through ports: Example 2 (Bit addressing)
Write an 8051 ALP to complement P1.2 continually with some delay.
BACK: CPL P1.2 ;complement P1.2
ACALL DELAY ;calling delay program (routine) to create time delay between each complement.
CPL P1.2
ACALL DELAY
SJMP BACK
---time delay program-------the following code is to create delay between every
complement (toggle) of P1.2 bit. A delay is required to notice the change (complement). A
random amount of delay will be created by decrementing the randomly loaded R3 value to
zero.
DELAY: MOV R3,#200 ; 200 is a decimal number. Its hexa decimal equivalent will be saved in R3.
HERE: DJNZ R3,HERE ; Decrement R3 (Any bank register R0-R7 can be used here) and remain here till it becomes
ZERO.
RET ; Return to main program where it left while calling (absolute
call i.e. ACALL) delay routine.
Pin Description of 8051
RXD: microcontroller
• 10th pin is RXD (serial data receive pin) which is for serial input.
• Through this input signal microcontroller receives data for serial
communication.
TXD:
• 11th pin is TXD (serial data transmit pin) which is serial
output pin.
• Through this output signal microcontroller transmits data
for serial communication.
36
Pin Description of 8051
microcontroller
INT0′ and INT1′ :
• 12th and 13th pins are for External Hardware Interrupt-0
(INT0) and Interrupt-1 (INT1) respectively.
• When this interrupt is activated, 8051 gets interrupted from
hardware connected to these pins.
• When interrupt comes, 8051 serves the interrupt based on
their priority. (INT0 is with highest priority)
• To serve the interrupt, the processor needs to run a program
called interrupt service routine (ISR) which is stored in fixed
memory locations (in memory) for particular interrupt.
• The interrupt vector address value of the INT0 and INT1 are
0003H and 0013H respectively. 37
Pin Description of 8051
T0 and T1: microcontroller
• 14th and 15th pin are for Timer 0 and Timer 1 external input.
• They can be connected with 16 bit timer/counter.
WR’:
• 16th pin is for external memory write i.e. it write data to
the external memory.
RD’:
• 17th pin is for external memory read i.e. it read data
from external memory.
38
Pin Description of 8051
microcontroller
XTAL2 and XTAL1:
• 18th and 19thpin these pins are connected to an
external oscillator which is generally a quartz crystal oscillator.
Frequency of operation is 11.0592 MHz. (it may vary up to
16MHz in some versions of 8051)
39
Pin Description of 8051
VCC: microcontroller
• This pin provides power supply voltage i.e. +5 Volts
to the circuit.
GND:
• This pin is connected to the ground.
• It has to be provided with 0V power supply.
• Hence it is connected to the negative terminal of the
power supply.
40
Pin Description of 8051
RST: microcontroller
• The RESET pin is an input pin and it is an active high pin.
• When a high pulse is applied to this pin the microcontroller will
reset and terminate all activities.
• Upon reset all the registers except stack pointer (SP)
register will reset to 0000H Value and SP register will reset
to
07H value.
41
Pin Description of 8051
EA'/ microcontroller
•VPPThis
: pin is connected to ground when microcontroller is accessing
the program code stored in the external memory and
connected to Vcc (+5V) when it is accessing the
program code in the on chip memory.
42
Pin Description of 8051
PSEN’ : microcontroller
• This is an output pin which is active low.
• It will be activated (zero) when the microcontroller is accessing
the program code stored in the external ROM. This pin is
connected to the OE (Output Enable) pin of the external ROM.
43
Pin Description of 8051
ALE /PROG:microcontroller
• This is an output pin, which is active high.
• When 8051 is connected to external memory, ALE becomes high
to de-multiplex the memory address which is available on port 0.
(Port 0 provides both address and data on time sharing basis i.e
address and data are multiplexed port 0 .
• This ALE pin will demultiplex the address and data bus .
• During flash programming i.e. Programming of EPROM, this
pin acts as program pulse input (PROG).
44
Architecture of 8051
microcontroller
45
• RAM address register and Program address register:
- RAM address register is an 8-bit register.
- Program address register is an 16-bit register.
RAM address register is used to carry the address of the internal RAM (size of 128 Bytes-
address range from 00H – 7FH) location which is currently under access.
Program address register is used to carry the address of the internal ROM (size of 4 kB Bytes-
address range from 000H – FFFH) location which is currently under access.
• The DPTR can be used as a single 16-bit register or two 8-bit registers (as DPL and DPH).
• DPTR doesn’t have a physical Memory Address but the DPL (Lower Byte of DPTR) and DPH
(Higher Byte of DPTR) have separate addresses in the special function registers (SFR)
Memory Space. DPL = 82H and DPH = 83H.
46
Data pointer (DPTR)
47
Stack Pointer (SP)
• SP or Stack Pointer points out to the top of the Stack and it indicates the next data to be
accessed. Stack Pointer can be accessed using PUSH, POP, CALL and RET Instructions. The
Stack Pointer is an 8-bit register and upon reset, the Stack Pointer is initialized with 07H.
• When writing a new data byte into the stack, the SP (Stack Pointer) is automatically
incremented by 1 and the new data is written at an address SP+1. When reading data
from stack, the data is retrieved from the Address in SP and after that the SP is
decremented by 1 (SP-1).
48
Stack operation in 8051
STACK:
It is a part of RAM in which data will store temporarily during execution of program.
STACK work on last in first out principle.
To store and retrieve data during program execution in stack, push and pop instructions
are used.
PUSH:
its used to store data into stack.
POP:
to retrieve data from stack.
SP:
Stack pointer is 8 bit register which store the address of the stack location up to which it
is filled (top of the stack).
By default stack pointer contain 07h. This means Bank 1 of the internal RAM acts as
default stack area. The stack area can be relocated to general purpose RAM area by
changing the address present in the SP to appropriate value which comes under the
address range of general purpose area. 49
Stack operation in 8051
PUSH: --- SP value will be pre incremented automatically.
In PUSH operation, stack pointer (SP) will be incremented first and then content of register
or memory will store on that stack location which shown in SP.
The stack memory location which is available for access is called top of the stack, whose
address is shown by SP register.
Examples:
PUSH 0H; SP will be incremented by one and then the content of R0 (memory address 00H)
register store into 08H location.
As the default SP value is 07H, it will become 08H after incrementing first time.
PUSH 1H; SP will be incremented by one and then the content of R1 (memory address 01H)
register store into 09H location.
PUSH 31H; SP will be incremented again by one and the content of memory location with
address 31H stored into 0AH location.
50
Stack operation in 8051
POP: --- SP value will be post decremented automatically.
In POP operation, data will be retrieved first and then stack pointer decreased by one.
Examples:
POP 20H: The content of the top of the stack will be copied into memory location with
address 20h, then stack pointer (SP) will be decreased by 1.
Note: For the PUSH and POP instructions, we must specify the direct address
of the register/memory location being pushed or popped.
51
A or Accumulator (ACC)
• The Accumulator or Register A is the most important and most used 8051 Microcontroller
Special Function Register (SFR). The Register A is located at the address E0H in the SFR
memory space. The Accumulator is used to hold the data for almost all the ALU Operations.
52
B (Register B)
• The B Register is used along with the ACC in Multiplication and Division operations.
These two operations are performed on data that are stored only in Registers A and B.
During Multiplication Operation, one of the operand (multiplier or multiplicand) is stores
in B Register and also the higher byte of the result.
• In case of Division Operation, the B Register holds the divisor and also the remainder of
the result. It can also be used as a General Purpose Register for normal operations and is
often used as an Auxiliary Register by Programmers to store temporary results.
53
Program Status Word (PSW) : (Also called flag register)
• The PSW or Program Status Word Register is also called as Flag Register and is one of the
important SFRs. The PSW Register consists of Flag Bits, which help the programmer in
checking the condition of the result and also make decisions.
• Flags are 1-bit storage elements that store and indicate the nature of the result that is
generated by execution of certain instructions. The following image shows the contents
of the PSW Register.
54
The following table describes the function of each
flag.
55
Program Status Word (PSW): Address=D0H
56
CY:
• This is known as carry flag. This says whether there is a carry out of MSB or not.
E.g: 1000 1101 & 1011 1001, Let’s add both bytes
= 0011 0110 There is a carry out of MSB. Therefore in this case CY=1.
AC:
• This flag stands for an auxiliary carry. It is given as 1 whenever there is a carry from LN to HN.
LN and HN stands for lower nibble and higher nibble. As byte stands for 8 bits, similarly nibble
stands for 4 bits. Lower nibble is 0-3 bits and higher nibble is 4-7 bits.
• If seen in the above example there was a carry from 3rd bit to 4th bit. So in the above case
AC=1.
PARITY:
• If there are even number of 1s in the result then the parity will be zero, and if there are odd
number of 1s then , parity=1
Eg= 1010 1101 , here there are 5 ones, therefore parity =1
Reserved:
• This is a don’t care flag. It has nothing to do with.
57
OV: • The operations for signed and unsigned numbers are the same, but
signed numbers overflow between bit 6 and 7, while unsigned
This is an overflow flag.
numbers overflow between bit 7 and 8.
There are two types numbers • The OV flag represents the overflow into bit 7, while the CY flag
•Signed represents the overflow into bit 8. So, for a signed operation, you'd
•Unsigned check the OV flag, while for an unsigned operation you'd check the
CY flag after the operation. https://electronics.stackexchange.com/
Unsigned:
This is a 8 bit positive number which ranges from 0 to 255. In hexadecimal it’s range is from
00 to FF. In the OV flag, it has nothing to do with unsigned numbers. Only signed numbers are
considered in the OV flag.
Signed:
This is also a 8-bit number which is equally distributed among +ve and -ve numbers. By
considering MSB , it is decided whether it is a positive or negative number. If MSB=1 , it is a
negative number or else a positive number.
Eg: 1011 0011 is -ve
0111 1001 is +ve
So it’s positive range is from 0 to 127 [ 00 to 7F (in hexadecimal ) ], it consists of 128 +ve values.
It also has 128 negative numbers ranging from -1 to -128 [ -01 to -80 ( in hexadecimal ) ].
55
F0 :
• This is a user defined bit flag, where users can store any data.
RS1 and RS0 :
• Internal RAM of 8051 is 128 bytes out of which 32 bytes are stored in registers ( 8085, 8086
has 7,8 registers only ). These all 32 registers are divided into 4 banks, each bank has 8
registers starting from R0 to R7.
• Let’s assume there is an operation that should be performed on R1, then how it decides
from which bank the register is selected?
• This is performed based on banks
• By setting the values of RS1 and RS0 , we can select the register.
•This instruction stands for RS1 = 1 , and RS0 = 0, which means bank 2.
59
Internal memory
- Internal RAM
(Data memory)
Stack (default)
60
Internal Memory Here, * indicates the
- SFR (Special bit-addressable SFRs
function registers)
memory
Note: SFR memory is a separate memory
space available on-chip (internally).
It wont come under internal ROM
(code memory) or
Internal RAM (data memory).
61
Special Function Registers
(SFR)
Here, * indicates the
bit-addressable SFRs
62
Special Function Registers
(SFR)
Here, * indicates the bit-addressable SFRs
76
Widely used Register set of 8051
SP DPH DPL
PSW
DPTR
A
B
PC
R0
R1
R2
R3
R4
R5
R6
R7
Write a program to copy the value 55H into RAM memory locations 40H to 45H using
(a) direct addressing mode, (b) register indirect addressing mode without a loop, and
(c) with a loop.
Solution:
(a)
MOV A,#55H ;load A with value 55H
MOV 40H,A ;copy A to RAM location 40H
MOV 41H,A ;copy A to RAM location 41H
MOV 42H,A ;copy A to RAM location 42H
MOV 43H,A ;copy A to RAM location 43H
MOV 44H,A ;copy A to RAM location 44H
Example 5-3
Write a program to copy the value 55H into RAM memory locations 40H to 45H using
(a) direct addressing mode, (b) register indirect addressing mode without a loop, and
(c) with a loop.
Solution:
(b) MOV A,#55H ;load A with value 55H
MOV R0,#40H ;load the pointer. R0=40H
MOV @R0,A ;copy A to RAM location R0 points to
INC R0 ;increment pointer. Now R0=41H
MOV @R0,A ;copy A to RAM location R0 points to
INC R0 ;increment pointer. Now R0=42H
MOV @R0,A ;copy A to RAM location R0 points to
INC R0 ;increment pointer. Now R0=43H
MOV @R0,A ;copy A to RAM location R0 points to
INC R0 ;increment pointer. Now R0=44H
MOV @R0,A
Example 5-3
Write a program to copy the value 55H into RAM memory locations 40H to 45H using
(a) direct addressing mode, (b) register indirect addressing mode without a loop, and
(c) with a loop.
Solution:
(c)
MOV A,#55 ;A=55H
MOV R0,#40H ;load pointer. R0=40H, RAM address
MOV R2,#05 ;load counter, R2=5
AGAIN: MOV @R0,A ;copy 55H to RAM location R0 points to
INC R0 ;increment R0 pointer
DJNZ R2,AGAIN ;loop until counter = zero
Example 5-4
Solution:
CLR A ;A=0
MOV R1,#60H ;load pointer. R1=60H
MOV R7,#16 ;load counter, R7=16 (10 in hex)
AGAIN: MOV @R1,A ;clear RAM location R1
points to
INC R1 ;increment R1 pointer
DJNZ R7,AGAIN ;loop until counter = zero
Example 5-5
Write a program to copy a block of 10 bytes of data from RAM locations starting
at 35H to RAM locations starting at 60H.
Solution:
Note: For the PUSH and POP instructions, we must specify the direct address of the register/memory
location being pushed or popped.
(Note: if a hexa decimal number is starting with an alphabet, a
ZERO (0) should be appended in front of it)
ORG 0H In this question, it is not asked to relocate the stack and not
MOV R6,#25H asked to select the register bank. So, by default, BANK-1 will
MOV R1,#12H act as stack (range from 08H-0FH). BANK-0 acts as default
register bank. So, the registers (R0-R7) used in this program
MOV R4,#0F3H will be considered from BANK-0.
PUSH 6H
PUSH 1H In this program, the contents of R6 (06H), R1 (01H), R4 (04H)
are pushed in to stack locations 08H, 09H, and 0AH
PUSH 4H respectively. After this, top of the stack will be 0AH (can be
POP 33H seen as SP=09H). Then the contents of the top of the stack (i.e.
HERE: SJMP HERE contents of the 0AH location) will be poped in to memory
location whose address is 33H. After POP operation, the SP
END value will be decremented to 09H. (Which will now act as top
of the stack.)
8051 ALP example 3 (stack operation)
Example for data swapping (reversing)
Write an ALP to load given values into each of registers R0 - R4, then push each of these
register contents in to the stack and pop them back. Examine the stack and the SP register after
the execution of each instruction.
ORG 0000H PUSH 2 In this program, default stack location
i.e. BANK-1 will be available.
MOV R0, #25H PUSH 3
For default stack, SP=07H (initially).
MOV R1, #35H PUSH 4
All the registers such as R0-R7 used in
POP 0H this program are selected from default
MOV R2, #45H
POP 1H bank i.e. BANK-0.
MOV R3, #55H
POP 2H BANK-0 address range is from 00H to 07H named as R0 to
MOV R4, #65H R7 respectively, as given below
POP 3H 00H=R0; 01H=R1; 02H=R2; 03H=R3; 04H=R4; 05H=R5;
PUSH 0 POP 4H 06H=R6; 07H=R7;
PUSH 1 END
8051 ALP example 4 (stack operation)
Write an 8051 assemble language program (ALP) by considering following conditions while writing the
program.
(a) Relocate the stack to general purpose (scratch pad) RAM area; (b) select BANK-3 registers by writing
appropriate value in to PSW; (c) Load the R0 to R4 registers of the selected bank with data 0DH, F2H, 0BH,
05H, and 08H, respectively. (d) PUSH the contents of the registers R0-R4 in to stack. (e) POP the contents of
the stack in to R3 to R7 registers. (Observe the SP value after every PUSH and POP operation.)
ORG 0000H
MOV SP, #36H ; The SP is loaded with 36H to relocate the stack with in the range of scratch pad RAM area (30H to FFH).
MOV PSW, #18H ; RS1 and RS0 bits of PSW are set to ‘1’ to select BANK-3 (R0-R7 of BANK-3 will be selected).
MOV R0, #0DH See PSW format for more details. It will be 00011000=18H
MOV R1, #0F2H
MOV R2, #0BH
MOV R3, #05H
MOV R4 #08H
PUSH 18H
PUSH 19H POP 1CH BANK-3 address range is from 18H to 1FH named as R0 to R7 respectively,
PUSH 1AH POP 1DH as given below
PUSH 1BH POP 1EH 18H=R0; 19H=R1; 1AH=R2; 1BH=R3; 1CH=R4; 1DH=R5; 1EH=R6;
PUSH 1CH POP 1FH 1FH=R7;
POP 1BH END
ORG 0000H
8051 ALP example 5 (Data transfer between ROM and RAM)
MOV A, #00H
Write a program to transfer a string of data "VIT UNIVERSITY"
from code memory (ROM) space starting at address 200H to data MOV DPTR, #0200H ; starting ROM address
memory (RAM) locations starting at 40H. MOV R1, #0EH ; length of string
In this program, assembler directive ORG is used twice. Both MOV R0, #40H ; starting RAM address
ORG will be executed in parallel. LOOP: CLR A
One ORG is used to define the starting address location (here MOVC A,@A+DPTR
0000H) from which this program need to be stored in ROM. MOV @R0, A
Another ORG defines the starting address location (here 200H)
INC DPTR
where given string is stored in ROM.
INC R0
String length i.e number of characters in the given string is ; Decrement R1 once
DJNZ R1, LOOP
14=0EH and back to loop if R1
HERE: SJMP HERE is non zero.
String is a group of characters. ‘Space’ is also a character. All the
characters will be translated in to equivalent ASCII codes and ORG 0200H
stored in the memory. DB "VIT UNIVERSITY"
Find out to which by each of the following bits belongs. Give the address of the RAM byte
in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH
(d) SETB 28H, (e) CLR 12, (f) SETB 05
Bit addressing in internal RAM (data memory)
Bit address
Example program6 – Bit addressing
Find out to which by each of the following bits belongs. Give the address of the RAM byte
in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH
(d) SETB 28H, (e) CLR 12, (f) SETB 05
Example program7 – Bit addressing
Assume all RAM locations are cleared before running this program. Simulate the code and find
out the result.
ORG 0H
SETB 92H 2nd Bit address of port-1
SETB 93H 3rd Bit address of port-1
MOV C,P1.2
MOV 6,C 6H is the Address from Bit addressable area
MOV C,P1.3
MOV 7,C 7H is the Address from Bit addressable area
END
Bit addressing of ports
Machine cycle of 8051
• Machine cycle is a measure (unit) of calculating the time taken by the 8051 to complete
an instruction.
• The time taken to complete any instruction is measured in terms of machine cycle or
instruction cycle. In 8051 one machine cycle consists 12 clock cycles.
• A clock cycle is the time period of the square wave which is generated by the crystal
oscillator connected to XTAL pins of 8051.
• Which means, machine cycle frequency = 1/12 of the clock frequency
Time period of a 8051 machine cycle for 11.0592 MHz crystal (clock) frequency:
Machine cycle frequency = 11.0592M/12 = 921.6 kHz;
Time period of machine cycle is 1/921.6 kHz = 1.085μs
Time delay calculation with Machine cycle
• For 8051 system of 11.0592 MHz, see the below list to find how
long 8051 takes to execute each of the following instruction.
(a) MOV R3,#55 (b) DEC R3 (c) DJNZ R2 target (d) LJMP (e) SJMP
(f) NOP (g) MUL AB
Machine cycles Time to execute
(a) 1 1x1.085μs = 1.085μs
(b) 1 1x1.085μs = 1.085μs
(c) 2 2x1.085μs = 2.17μs
(d) 2 2x1.085μs = 2.17μs
(e) 2 2x1.085μs = 2.17μs
(f) 1 1x1.085μs = 1.085μs
(g) 4 4x1.085μs = 4.34μs
Calculation of execution time with Machine cycle
• Find the time (delay) taken by 8051 for the execution of following
program, if the crystal (clock) frequency is 11.0592MHz.
MOV R3,#250 1
HERE: NOP 1 In this program, number of machine
cycles consumed by each instruction is
NOP 1 listed.
NOP 1 A value of 250 (which is in decimal form)
NOP 1 is loaded in to R3.
The hexa decimal equivalent of decimal
DJNZ R3,HERE 2 number 250 will be loaded in to R3.
Solution: 250 (Decimal) = FA (Hexa)
The time delay inside HERE loop is
[250(1+1+1+1+2)]x1.085μs = 1627.5μs.
Considering the instruction outside the loop we have
1627.5μs + (1 x 1.085μs) = 1630.755μs
Time delay calculation with Machine cycle
• Find the size of the delay created by delay routine (sub program) in following program, if
the crystal frequency is 11.0592MHz.
MOV A,#55H
AGAIN: MOV P1,A
ACALL DELAY ; calling delay program (routine)
CPL A
SJMP AGAIN
---delay program (routine) to generate delay-------An amount of delay will be created by
decrementing the loaded R3 value to zero.
DELAY: MOV R3,#200 ; 200 is a decimal number. Its hexa decimal equivalent will be saved in R3.
HERE: DJNZ R3,HERE ; Decrement R3 (Any bank register R0-R7 can be used here) and remain here till it becomes
ZERO.
RET
; Return to main program where it left while calling (absolute
call i.e. ACALL) delay routine.
References:
• Muhammed Ali Mazidi, Janice GillispieMazidi ,Rolin D Mc Kinlay ,The 8051 Microcontroller
and Embedded Systems Using Assembly and C , Second Edition ,2008 , Pearson Education
• The 8051 microcontroller : architecture, programming, and applications, Kenneth J. Ayala
Course Outcomes:
CO4: Deploy the implementation of various peripherals such as general purpose input/
output, timers, serial communication, LCD, keypad and ADC with 8051
microcontroller 2
Instruction set of 8051
DATA TRANSFER ARITHMETIC LOGICAL
MOV – Move with internal RAM ADD ANL – Logical AND
(data memory)
MOVC – Move with Code ADDC – Add with Carry ORL – Logical OR
memory (ROM)
MOVX – Move with external SUBB – Subtract XRL – Logical XOR
memory with Borrow
PUSH – push data in to stack INC - Increment CLR - Clear
POP– pop data from stack DEC - Decrement CPL - Complement
XCH – Exchange the contents of MUL – Multiplication RL – Rotate left the content of the operand.
two operands (Only A and B registers are allowed as operands with
MUL and DIV instructions)
Only direct addressing is allowed DIV – Division RLC – Rotate left the content of the operand
in PUSH and POP Examples: MUL AB, DIV AB. along with carry flag.
No comma required between A and B
DAA – Decimal Adjust Accumulator. (used in BCD RR– Rotate right the content of the operand.
arithmetic)
RRC– Rotate right the content of the operand
along with carry flag.
RLA– Rotate left the content of the Accumulator.
SWAP – Swap the lower and higher nibbles of
the operand.
Instruction set of 8051
• TCON and TMOD registers are used for timer/counter control and mode selection.
C/T’ Configure for the Counter operations Configure for the Timer operations
Gate (G) Timer0 or Timer1 will be in RunMode when Timer0 or Timer1 will be in RunMode when
TRX bit of TCON register is high. TRX bit of TCON register is high
and INT0 or INT1 is high.
8-bit timer/counter, 16-bit 8-bit auto reload timer/counter; Split mode, Timer split
with 5-bit pre-scaler. timer/counter THx holds a value which is to be in to two separate 8-bit
(Total 13-bits in use) reloaded into TLx each time it timers.
overflows.
Timers-Counters in 8051 µC – Generating delay using Timers
DELAY generated by timer=(Max.value –Initial value+1)*(Time period of one machine cycle)
• max. value = maximum count value a timer/counter can reach (based on selected
mode in TMOD register)
• Initial value= the value we need to load into timer to the get the required delay.
• +1 is required in the above equation as timer increments one more time (to roll over to
Zero) after reaching its maximum value. After rollover, the timer will stop and TF
(timer overflow) flog in TCON (Timer control) register is Set. For example, see below.
NOTE: 8051 timers works at a rate of 1/12 of the CLK (XTAL) frequency (equal
to machine cycle frequency).
• If XTAL frequency is 11.0592MHz, then the delay required/generated for each
count (pulse) is as follows,
(11.0592MHz/12)=926kHz=1.085µsec
Generating delay using Timers- Example program-1
Find the delay generated by timer 0 in the following code. Do not include the overhead due to
instructions.
ORG 0H
Loading TMOS
for mode CLR P2.3 ;Clear P2.3
selection MOV TMOD,#01 ;Timer 0, 16-bit mode (mode-1) is selected
Loading initial BACK: MOV TL0,#3EH ;TL0=0, the low byte By default, operating
value. MOV TH0,#0B8H ;TH0=0, the high byte frequency of the timer is
CPL P2.3 ;Complement P2.3 same as machine cycle
Start timer-0
SETB TR0 ;Start timer 0 frequency as it is
Wait till timer-0 AGAIN: JNB TF0,AGAIN ;Monitor TF0 counting the machine
stops (overflow) cycles to generate delay.
CLR TR0 ;Stop the timer 0 So, the delay generated
Clear TR and TF CLR TF0 ;Clear TF0 flag by the timer for each tick
as the timer
created required
SJMP BACK is equal to the time period
delay. END of the machine cycle.
Solution: Assume, XTAL frequency is 11.0592MHz. Then, time period of one machine cycle is 1.085µs.
(FFFFH – B83E + 1) = 47C2H (18370 in decimal)
18370 × 1.085 µs = 19.93145 ms
Generating delay using Timers- Example program-2
In the following program, Calculate the frequency of the square wave generated on pin P1.5. Assume XTAL
frequency is 22MHz. Also consider the delay caused by instruction overhead.
Machine Cycles Since it is asked to consider the instruction
MOV TMOD,#01H overhead (time delay caused by the execution
HERE: MOV TL0,#0F2H 2 of the instructions), we need to add this delay
MOV TH0,#0FFH 2 with timer generated delay for frequency
CPL P1.5 1 calculation.
ACALL DELAY 2 By default, operating
SJMP HERE 2 frequency of the timer is same
DELAY: Timer runs for 14 steps as machine cycle frequency as
SETB TR0 1 to reach overflow/roll it is counting the machine
AGAIN: JNB TF0,AGAIN 14 over, as it’s initial value cycles to generate delay. So,
is FFF2H.
CLR TR0 1 the delay generated by the
Max. FFFFH + 1 for roll
CLR TF0 1 over
timer for each tick is equal to
RET 2 the time period of the machine
Total= 28 machine cycles. cycle.
Solution
To get a more accurate timing, we need to add the clock cycles due to the other instructions in the
loop (along with the clock cycles taken by timer).
Note: XTAL frequency is given as 22MHz to calculate the time period of one machine cycle.
Generating delay using Timers- Example program-2
Solution:
To get a more accurate timing, we need to add the clock cycles due to the other instructions in
the loop (along with the clock cycles taken by timer).
Note: XTAL frequency is given as 22MHz to calculate the time period of one machine cycle.
T = 2 × 28 × 0.545 µs = 30.52 µs and f = 32.765 kHz
Unused bits
PCON is an 8-bit special function register (SFR) accommodated in SFR memory area with an
address 87H. It is not bit addressable.
SMOD
This bit if set (1), it will double the baud rate of serial communication.
GF0 and GF1: These are general purpose flag bits.
Idle mode
• When IDL bit of the PCON register is set, the microcontroller turns off the CPU unit while
peripheral units such as serial port, timers and interrupt system continue operating
normally.
• In Idle mode, the state of all registers and I/O ports remains unchanged.
• To exit the Idle mode, it is necessary to enable and execute any interrupt or reset.
• It is recommended that, first three instructions to be executed after coming out of Idle mode
are NOP instructions to stabilize the microcontroller and prevents undesired changes on the
Power control register (PCON) of 8051
• If EA = 1, interrupts are enabled and will be responded to, if their corresponding bits in IE
register are high;
• If EA = 0, no interrupt will be responded to, even if the associated bit in the IE register is
high.
Enable/disable Interrupts in 8051
• Pin 12 (P3.2) and pin 13 (P3.3) of the 8051, designated as INT0 and INT1, are used as
external hardware interrupts
• There are two activation levels for the external hardware interrupts (INT0 and INT1).
Level trigged - In the level-triggered mode, INT0 and INT1 pins are normally high. So,
If a low-level signal is applied to them, it triggers the interrupt.
Edge trigged – Set IE0/IE1 bit (TCON.1/TCON.3) to enable edge triggering for
INT0/INT1
8051-Interrupt Priority Upon Reset
8051- Modifying the default Interrupt Priority
Interrupt Priority (IP) Register (Bit-addressable)
D7 D0
-- -- PT2 PS PT1 PX1 PT0 PX0
• Interrupt vector table is an index of memory addresses where, the starting address of the
interrupt service routines (ISRs) are saved.
• When an interrupt request comes, microcontroller search the interrupt vector table to find
the address of the starting memory location of the required ISR.
• So that, corresponding ISR will be executed to serve the interrupt request.
Interrupt Vector Table of 8051 µC
Programming using Interrupts-Example1
Discuss what happens if interrupts INT0, TF0, and INT1 are activated at the same time.
Assume priority levels were set by the power-up reset and the external hardware interrupts
are edge triggered.
Solution:
priority levels were set by the power-up reset means default priority levels.
If these three interrupts are activated at the same time, their statuses are saved internally.
Then the 8051 checks all five interrupts according to the sequence listed in the default
priority order. If any is activated, it services it in sequence.
Therefore, when the above three interrupts are activated, INT0 (external interrupt- IE0) is
serviced first, then timer 0 (TF0), and finally INT1 (external interrupt- E1).
Programming using Interrupts-Example2
(a) Program the IP register to assign the highest priority to INT1(external interrupt 1), then
(b) discuss what happens if INT0, INT1, and TF0 are activated at the same time. Assume the
interrupts are edge-triggered.
Solution:
(a) MOV IP,#00000100B ;IP.2=1 assign INT1 higher priority. The instruction SETB IP.2 also
will do the same thing as the above line since IP is bit-addressable.
(b) The instruction in Step (a) assigned a higher priority to INT1 than the others; therefore,
when INT0, INT1, and TF0 interrupts are activated at the same time, the 8051 services INT1
first, then it services INT0, then TF0.
The instruction in Step (a) makes both the INT0 and TF0 bits in the IP register 0. As a result,
the sequence in default priority order is followed which gives a higher priority to INT0 over
TF0.
Programming using Interrupts-Example3
Assume that after reset, the interrupt priority is set by the instruction MOV IP,#00001100B.
Discuss the sequence in which the interrupts are serviced.
Solution:
The instruction “MOV IP #00001100B” (B is for binary) assigned INT1 and timer 1 (TF1) to a
higher priority level compared with the rest of the interrupts. However, INT1 and timer 1 (TF1)
both are set, they are prioritized as per the default priority order (INT1 gets highest priority and
TF1 gets second priority). The priorities of the remaining interrupts are rearranged by
following the default priority order.
Finally, the updated priorities are as follows.
External Interrupt 1 (INT1) : Highest Priority
Timer Interrupt 1 (TF1) : Second Priority
External Interrupt 0 (INT0) : rearranged as per default.
Timer Interrupt 0 (TF0) : rearranged as per default.
Lowest Priority Serial Communication (RI+TI) : rearranged as per default.
D7 D0
Interrupt priority (IP) register: -- -- PT2 PS PT1 PX1 PT0 PX0
Level triggering/Edge triggering of External Interrupts-
INT0 and INT1
Low-level triggering:
• On RESET, IT0 (TCON.0) and IT1 (TCON.2) are both low, making external
interrupts (INT0 and INT1) low-level triggered by default.
Minimum Duration of the low level required to consider the Low Level-Triggered
Interrupt is 4-machine cycles. (1 machine cycle=1.085µs if XTAL = 11.0592 MHz)