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Unit 1complete

The document provides information about the course "Computer Organization & Architecture" taught by Mr. Mayur Jagdale. It discusses the course outcomes and reference books. It also summarizes key topics that will be covered in the course, including the basic structure of a computer with functional blocks like the CPU, memory, input and output units. The CPU contains the control unit, ALU, and registers. Common register types are described like the program counter, instruction register, and accumulator.

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mayur jagdale
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0% found this document useful (0 votes)
41 views

Unit 1complete

The document provides information about the course "Computer Organization & Architecture" taught by Mr. Mayur Jagdale. It discusses the course outcomes and reference books. It also summarizes key topics that will be covered in the course, including the basic structure of a computer with functional blocks like the CPU, memory, input and output units. The CPU contains the control unit, ALU, and registers. Common register types are described like the program counter, instruction register, and accumulator.

Uploaded by

mayur jagdale
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Computer Organization &Architecture

(CSIT-404)

B.Tech, 4th Sem CSIT

Mr. Mayur jagdale


COURSE OUTCOMES:
REFERENCE BOOKS:
1. Morris Mano , “Computer System Organization ”PHI
2. Alan Clements: “Computer Organization and
Architecture”, Cengage Learning
3. Subrata Ghosal: “Computer Architecture and
Organization”, Pearson
4. William stalling ,“Computer Architecture and
Organization”, PHI
5. M. Usha, T.S. Shrikant: “Computer System Architecture
and Organization”, Willey 6.Chaudhuri, P.Pal: “Computer
Organization and Design”, PHI
 7.Sarangi:
“Computer Organization and Architecture”,
Mc-Graw Hills
Computer Organization Vs Computer
Architecture
Unit-I
Basic Structure of Computer
In computer science and engineering computer
architecture is the practical art of selecting and
interconnecting hardware components to create computers
that meet functional, performance and cost goals and the
formal modeling of those systems.
The functional blocks in a computer are of four types:

1. Central Processing Unit


2. Memory
3. Input Unit
4. Output Unit
STRUCTURE OF DESKTOP COMPUTERS
Data Path
Control Signals
Auxillary Storage
(Backing Storage)
To Supplement main storage

Memory
Output
Input
Unit
Unit

Control Unit ALU

Registers

Processor
CENTRAL PROCESSING UNIT (CPU)
 The CPU or the microprocessor (or simply processor) is
referred as the brain of a computer system.
 CPU consists of three main subsystems, the Control Unit
(CU), the Arithmetic Logic Unit (ALU), and the
Registers.
 Speed of the computer system is defined by the
architecture of the processor being used.
ARITHMETIC LOGIC UNIT
 The ALU contains electronic circuits necessary to
perform arithmetic and logical operations.
 The arithmetic operations are ADD, SUBSTRACT,
MULTIPLY, DIVIDE, etc.
 The logical operations include COMPARE, SHIFT,
ROTATE, AND, OR, etc
 The control unit analyses each instruction in the program
and sends the relevant signals to all other units – ALU,
Memory, Input unit and Output unit
COMMUNICATION INSIDE A COMPUTER
CONTROL UNIT
 It is responsible for directing and coordinating most of the
computer system activities.
 It does not execute instructions by itself. It tells other parts of
the computer system what to do.
 It determines the movement of electronic signals between the
main memory and arithmetic logic unit as well as the control
signals between the CPU and input/output devices.
 According to instruction, control unit issues signals to other
units.
 After instruction is executed, the result of the instruction is
stored in memory or stored temporarily in the registry, so that
this can be used by the next instruction.
 The results of a program are taken out of the computer
through the output unit.
REGISTER
 Group of flip flop used to store a word(data)
 Flip flop is nothing but hardware

 High speed temporary storage for holding data,address


and instructions
 Registers are a type of computer memory built directly
into the processor or CPU (Central Processing Unit) that
is used to store and manipulate data during the execution
of instructions. A register may hold an instruction, a
storage address, or any kind of data (such as a bit
sequence or individual characters).
 Register may be 8/16/32/128 bit depending on its use

 1 flip flop hold one bit (0 and 1)


GENERAL REGISTER ORGANIZATION
 CPU Registers – General Purpose Registers
Special Purpose Registers
General Purpose Registers: these components are general
use memory storage in the CPU that can be accessed
very fast (as compared to RAM); they are created from
combining latches with a decoder.
Special Purpose Registers: these components are
dedicated memory storage in the CPU that can be
accessed very fast.(Execution time)
FIVE REGISTERS ARE SHOWN:
 Program Counter (PC)
 Instruction Register (IR)

 Memory address register (MAR)

 Memory data register(MDR)

 Accumulator.

Program Counter (PC): The Program Counter keeps track


of the memory address of the next instruction to be
fetched and executed.
Instruction Register (IR): The Instruction Register holds
the currently fetched instruction being executed.
Memory Address Register (MAR): it holds the address of
the location to be accessed from memory.
Memory data register(MDR): A register used for holding
information (either program words or data words) that is in
the process of being transferred from the memory to the
central processor, or vice versa.

Accumulator: This is the most frequently used register


used to store data taken from memory. It is in different
numbers in different microprocessors.
Other types of registers

1 Accumulator AC An accumulator is the most


often utilized register, and it
is used to store information
taken from memory.

2 Memory address registers MAR Address location of memory


is stored in this register to be
accessed later. It is called by
both MAR and MDR
together

3 Memory data registers MDR All the information that is


supposed to be written or the
information that is supposed
to be read from a certain
memory address is stored
here
4 General-purpose register GPR Consist of a series of registers
generally starting from R0
and running till Rn - 1. These
registers tend to store any
form of temporary data that is
sent to a register during any
undertaking process.
More GPR enables the
register to register
addressing, which increases
processing speed.

5 Instructions registers IR Instruction registers hold the


information about to be
executed. The immediate
instructions received from the
system are fetched and stored
in these registers.
Once the instructions are
stored in registers, the
processor starts executing the
set instructions, and the PC
will point to the next
instructions to be executed
6 Program counter PC These registers are utilized in
keeping the record of a
program that is being
executed or under execution.
These registers consist of the
memory address of the next
instruction to be fetched.
PC points to the address of the
next instruction to be fetched
from the main memory when
the previous instruction has
been completed successfully.
Program Counter (PC) also
functions to count the number
of instructions.
The incrementation of PC
depends on the type of
architecture being used. If we
use a 32-bit architecture, the
PC gets incremented by 4
every time to fetch the next
instruction.

7 Condition code registers These have different flags


that depict the status of
operations. These registers
set the flags accordingly if
the result of operation caused
zero or negative
8 Temporary registers TR Holds temporary data

9 Input registers INPR Carries input character

10 Output registers OUTR Carries output character

11 Index registers BX We use this register to store


values and numbers included in
the address information and
transform them into effective
addresses. These are also called
base registers.
These are used to change
operand address at the time of
execution, also stated as BX

12 Memory buffer register MBR MBR - Memory buffer


registers are used to store data
content or memory commands
used to write on the disk. The
basic functionality of these is
to save called data from
memory.
MBR is very similar to MDR

13 Stack control registers SCR Stack is a set of location


memory where data is stored
and retrieved in a certain order.
Also called last in first out
( LIFO ), we can only retrieve
a stack at the second position
only after retrieving out the
14 Flag register FR Flag registers are used to
indicate a particular
condition. The size of the
registered flag is 1 - 2 bytes,
and each registered flag is
furthermore compounded into
8 bits. Each registered flag
defines a condition or a flag.
The data that is stored is split
into 8 separate bits.
Basic flag registers -
Zero flags
Carry flag
Parity flag
Sign flag
Overflow flag.

15 Segment register SR Hold address for memory

16 Data register DX Hold memory operand


CONTROL WORD
 Control address means the address of a particular control
word. This address is stored in control address register
just like MAR in instruction cycle. The address of the
next microinstruction to be performed is provided by
micro sequencer just like program counter (PC) in
instruction cycle.
 Number of cycles = Number of microinstructions (Basic
assumption is 1 microinstruction takes 1 cycle to
operate) = 6
 Hence total number of microinstructions = 215 * 6 =
1290
STACK ORGANIZATION
 Stack is a linear data structure.
 It uses Last in First out (LIFO) access method which
is the most popular access method in most of the CPU.
 Stack is a part of register unit or memory unit with a
resistor that holds the address for the Stack
 A register is used to store the address of the topmost
element of the stack which is known as Stack pointer
(SP).
THE MAIN TWO OPERATIONS THAT ARE
PERFORMED ON THE OPERATORS OF
THE STACK ARE PUSH AND POP. THESE
TWO OPERATIONS ARE PERFORMED
FROM ONE END ONLY
 Push –This operation results in inserting one operand at the
top of the stack and it decrease the stack pointer register.
 POP-This operation results in deleting one operand from the
top of the stack and it increase the stack pointer register

• In a 64-word stack, the stack pointer contains 6 bits because


26 = 64.

First, the SP is set to 0, EMTY is set to 1, and FULL is set to 0.
Now, as the stack is not full (FULL = 0), a new element is inserted
using the push operation.
o The push operation is executed as follows

SP←SP + 1 It can increment stack pointer

K[SP] ← DR It can write element on top of the


stack

If (SP = 0) then (FULL ← 1) Check if stack is full

EMTY ← 0 Mark the stack not empty


 A new element is deleted from the stack if the stack is not empty
(if EMTY = 0). The pop operation includes the following
sequence of micro-operations −

DR←K[SP] It can read an element from the top of


the stack

SP ← SP – 1 It can decrement the stack pointer

If (SP = 0) then (EMTY ← 1) Check if stack is empty

FULL ← 0 Mark the stack not full


INSTRUCTION FORMAT
 A computer performs a task based on the instructions
provided. Instructions in computers are comprised of
groups called fields.
 These fields contain different information for computers
which are all written in 0s and 1s.
 Each field has a different significance or meaning, based
on which a CPU decides what to perform
 The most common fields are:
 The operation field specifies the operation to be
performed, like addition.
 Address field which contains the location of the operand,
i.e., register or memory location.
 Mode field which specifies how operand is to be
founded.
 Computer perform task on the basis of instruction
provided. A instruction in computer comprises of groups
called fields. These field contains different information
as for computers every thing is in 0 and 1 so each field
has different significance on the basis of which a CPU
decide what so perform. The most common fields are:
 Operation field which specifies the operation to be
performed like addition
Address field which contain the location of operand, i.e., register
or memory location.
 Mode field which specifies how operand is to be founded. A
instruction is of various length depending upon the number of
addresses it contain. Generally CPU organization are of three
types on the basis of number of address fields: 1. Single
Accumulator organization 2. General register organization 3.
Stack organization In first organization operation is done
involving a special register called accumulator. In second on
multiple registers are used for the computation purpose. In third
organization the work on stack basis operation due to which it
does not contain any address field. It is not necessary that only a
single organization is applied a blend of various organization is
mostly what we see generally
TYPES OF INSTRUCTION FORMAT

 There are 4 types of instruction fomat


 Zero Address Instructions:These instructions do not
specify any operands or addresses.
 One Address Instructions:These instructions specify
one operand or address.
 Two Address Instructions:These instructions specify
two operands or addresses, which may be memory
locations or registers.
 Three Address Instructions:These instructions specify
three operands or addresses, which may be memory
locations or registers.
I/O SYSTEM BUS
 A group of wires called bus is used to provide necessary
signals for communication between modules
 Each component should be able to communicate with
other for proper execution of instructions and
information flow.
 A bus is a shared transmission medium, it must only be
used by one device at a time and when used to connect
major computer components (CPU, memory, I/O) is
‘called a system bus.
DATA BUS:
 As the name suggests, data bus is used for transmitting
the data / instruction from CPU to memory/IO and vice-
versa.
 It is bi-directional.

• The width of a data bus refers to the number of bits


(electrical wires) that the bus can carry at a time.
• Each line carries 1 bit at a time. So, the number of lines
in data bus determine how many bits can be transferred
parallely.
• The width of data bus is an important parameter because
it determines how much data can be transmitted at one
time.
• The wider the bus width, faster would be the data flow
on the data bus and thus better would be the system
performance.
 Examples-
• A 32-bit bus has thirty two (32) wires and thus can
transmit 32 bits of data at a time.
• A 64-bit bus has sixty four (64) wires and thus can
transmit 64 bits of data at a time.
CONTROL BUS:
 As the name suggests, control bus is used to transfer the
control and timing signals from one component to the
other component.
 The CPU uses control bus to communicate with the
devices that are connected to the computer system
 The CPU transmits different types of control signals to
the system components
 It is bi-directional.
 Typical control signals hold by control bus-
• Memory read – Data from memory address location to
be placed on data bus.
• Memory write – Data from data bus to be placed on
memory address location.
• I/O Read – Data from I/O address location to be placed
on data bus.
• I/O Write – Data from data bus to be placed on I/O
address location.
 Example-

 When CPU wants to read or write data, it sends the


memory read or memory write control signal on the
control bus to perform the memory read or write
operation from the main memory. Similarly, when the
processor wants to read from an I/O device, it generates
the I/O read signal
ADDRESS BUS:
•As the name suggests, address bus is used to carry address
from CPU to memory/IO devices.
•It is used to identify the particular location in memory.

•It carries the source or destination address of data i.e.


where to store or from where to retrieve the data.
•It is uni-directional.

•The width of address bus determines the amount of


physical memory addressable by the processor.
•In other words, it determines the size of the memory that
the computer can use.
•The wider is the address bus, the more memory a
computer will be able to use.
 Example-
 When CPU wants to read or write data, it sends the
memory read or memory write control signal on the
control bus to perform the memory read or write
operation from the main memory and the address of the
memory location is sent on the address bus.
 If CPU wants to read data stored at the memory location
(address) 4, the CPU send the value 4 in binary on the
address bus.
REGISTER TRANSFER LANGUAGE:
 Symbolic natation used to describe the micro operations
transfer among register is called a register transfer
language
 Registers are a type of computer memory built directly
into the processor or CPU (Central Processing Unit) that
is used to store and manipulate data during the execution
of instructions.
 Micro-operations : The operation executed on the data
store in registers are called microoperations. They are
detailed low-level instructions used in some designs to
implement complex machine instructions.
 Example- Shift , Count , Clear , Load (Operations)
 The Register Transfer Language is the symbolic representation
of notations used to specify the sequence of micro-operations.
 In a computer system, data transfer takes place between
processor registers and memory and between processor
registers and input-output systems. These data transfer can be
represented by standard notations given below:
 Notations R0, R1, R2..., and so on represent processor
registers.
 The addresses of memory locations are represented by names
such as LOC, PLACE, MEM, etc.
 Input-output registers are represented by names such as DATA
IN, DATA OUT and so on.
 The content of register or memory location is denoted by
placing square brackets around the name of the register or
memory location.
BUS TRANSFER:
 A digital computer has many registers and it is necessary
to provide data path between them to transfer
information from one register to another. There will be
excess number of wires and controlling of those wires
make circuit complex.
 A bus consists of a set of common lines, one for each bit
of register, through which binary information is
transferred one at a time. Control signals determine
which register is selected by the bus during a particular
register transfer.
 The common bus scheme can be implemented in two
ways.
⦁ Using multiplexers.
⦁ Using tri-state bus buffers
USING MULTIPLEXER
 A common bus can be generated using a multiplexer. It
facilitates in choosing the source register to place the binary
data on the bus. The bus register has input and output gating
controlled by control signals. The diagram demonstrates the
input and output gating of registers.
• Ri is the register and Rin and Rout are the input and output
gating signals of Ri.
• Z is the register and Zin and Zout are the input and output
gating signal of register Z.
• Y is the register and Yin and Yout are the input and output
signals of Y.
TRANSFER FROM REGISTER TO BUS USING
MULTIPLEXERS FOR 4 REGISTER:
USING TRI-STATE BUS BUFFERS:
 A three-state bus buffer is an integrated circuit that
connects multiple data sources to a single bus. The open
drivers can be selected to be either a logical high, a
logical low, or high impedance which allows other
buffers to drive the bus
 Tri-state buffers are commonly used in bus-based
systems, where multiple devices are connected to the
same bus and need to share it
 tri-state buffers at the input side are control by a
common control signal Rin. When Rin is active the n-bit
data from the common bus is loaded into the register.
MEMORY TRANSFER:
 A memory is a collection of storage cells each cell store
l-bit of information.
 The memory stores binary information in groups of bits
called words. To access information from a particular
word from main memory each word in the main memory
has distinct address.
 This allows accessing any word from the main memory
by specifying corresponding address.
 The transfer of information from a memory word to the
outside environment is called a read operation. Ex-
DR ← M [AR]
 The transfer of new information to be stored into the
memory is called a write operation.
Ex-M [AR] ← R1
 There are two memory operations in memory transfer
• Read Operation: It is the transfer of the data from memory to
the outside environment.
• Write Operation: It is the transfer of the new data to be stored
to the memory.
 Let us have a look at some of the registers and abbreviations
used for memory:
• MBR: MBR stands for memory buffer register. It is also
known as (Memory Data Register) MDR. It stores the data
being transferred to and from memory.
• MAR: The Memory Address Register(MAR) is the CPU
register used to store the memory’s address at which the data is
stored and fetched. It is often represented as AR(Address
Register). M represents the memory word.
 Read Operation
 The transfer of data from the Address Register into the Memory
Buffer Register is known as the Read Operation.
 The read operation is represented by MBR ← [AR] M . It states
that the Memory Unit M is transferred from [AR] representing
Address register to Memory Buffer Register (MBA).
 Write Operation

 Write Operation is the transfer of new data into the memory.

 The write operation is denoted by [AR] M ← R1. It states that


the Memory M from Register R1 is transferred to Address
Register([AR]).
MICRO INSTRUCTION FORMAT
 A microinstruction format includes 20 bits in total. They
are divided into four elements as displayed in the figure.

o F1, F2, F3 are the micro-operation fields. They determine


micro-operations for the computer.
CD is the condition for branching. They choose the status bit
conditions.
o BR is the branch field. It determines the type of branch.
o AD is the address field. It includes the address field
whose length is 7 bits.
o The micro-operations are divided into three fields of three
bits each. These three bits can define seven different micro-
operations. In total there are 21 operations as displayed in
the table.
 Condition Field : A condition field includes 2 bits. They are
encoded to define four status bit conditions. As stated in the
table, the first condition is always a 1, with CD = 0. The
symbol that can indicate this condition is ‘U’. The table
displays the multiple condition fields and their summary in
an easy manner.
 Branch Field : The BR (branch) field includes 2 bits. It can
be used by connecting with the AD (address) field. The
reason for connecting with the AD field is to select the
address for the next microinstruction. The table illustrates
the various branch fields and their functions.
ADDRESSING MODES:
 Addressing modes in computer architecture refer to the
techniques and rules used by processors to calculate the
effective memory address or operand location for data
operations.
 They define how instructions specify the source or
destination of data within the system’s memory or
registers.
 Addressing modes play a crucial role in determining the
efficiency and flexibility of memory access and operand
manipulation
 Each addressing mode has its own set of rules and
mechanisms, allowing programmers to optimize memory
utilization and enhance overall system performance.
TYPES OF ADDRESSING MODES:
 (1) Implied Mode
 (2) Immediate Mode

 (3) Register Mode

 (4) Register Indirect Mode

 (5) Auto increment or Auto decrement Mode

 (6) Direct Address Mode

 (7) Indirect Address Mode

 (8) Relative Address Mode

 (9) Indexed Addressing Mode

 (10)Base Register Addressing Mode


(1) Implied mode: In implied addressing the operand is specified
in the instruction itself. In this mode the data is 8 bits or 16 bits
long and data is the part of instruction . Zero address instruction are
designed with implied addressing mode.
Example - For example, the instruction ‘‘complement
accumulator’’

(2) Immediate Mode: In this mode data is present in address field


of instruction .Designed like one address instruction format. Note :
Limitation in the immediate mode is that the range of constants are
restricted by size of address field.
Example -
(3) Register mode: In register addressing the operand is placed in
one of 8 bit or 16 bit general purpose registers. The data is in the
register that is specified by the instruction. Here one register
reference is required to access the data.
Example -

4) Register Indirect Mode: In this mode the instruction specifies


a register in the CPU that contains the address of the operand and
not the operand itself.
Example –
Add R1, (R2)+ // OR R1 = R1 +M[R2] R2 = R2 + d
(5) Auto increment or Auto decrement Mode: After execution of every
instruction from the data in memory it is necessary to increment or
decrement the register. This is done by using the increment or decrement
instruction. Given upon its sheer necessity some computers use special
mode that increments or decrements the content of the registers
automatically
Example- Add R1, (R2)+ // OR
R1 = R1 +M[R2]
R2 = R2 - d
(6) Direct Address Mode: In this mode the operand resides in memory
and its address is given directly by the address field of the instruction such
that the affective address is equal to the address part of the instruction.
Example-
(7) Indirect Address Mode: Unlike direct address mode, in this
mode give the address field gives the address where the effective
address is stored in memory. The instruction from memory is
fetched through control to read is address part to access memory
again to read the effective address.
Example-

(8) Relative Address Mode: This mode is applied often with


branch type instruction where the branch address position is relative
to the address of the instruction word itself.
Example-
(9) Indexed Addressing Mode: In this mode the effective address
is obtained by adding the content of an index register to the address
part of the instruction. The index register is a special CPU register
that contains an index value and can be incremented after its value
is used to access the memory.
•Index register stores an index value

•Address field of instruction defines

starting address (base address) of


data array in memory.
Example-

(10)Base Register Addressing Mode: Base register addressing


mode is used to implement inter segment transfer of control . In this
mode effective address is obtained by adding base register value to
address field value
Example-
INSTRUCTION
 An instruction comprises of groups called fields. These fields
include:
-The Operation code (Opcode) field which specifies the operation
to be performed.
-The Address field which contains the location of the operand,
i.e., register or memory location.
-The Mode field which specifies how the operand will be located.
A BASIC COMPUTER HAS THREE TYPES OF
INSTRUCTIONS:

(1)Memory - reference instruction


(2)Register - reference instruction
(3)Input-Output instruction

(1)Memory - reference instruction : In Memory-


reference instruction, 12 bits of memory is used to specify
an address and one bit to specify the addressing mode 'I’.
(2)Register - reference instruction : The Register-reference
instructions are represented by the Opcode 111 with a 0 in the
leftmost bit (bit 15) of the instruction.

(3)Input-Output instruction: Just like the Register-reference


instruction, an Input-Output instruction does not need a reference
to memory and is recognized by the operation code 111 with a 1 in
the leftmost bit of the instruction. The remaining 12 bits are used
to specify the type of the input-output operation or test performed
FETCH AND EXECUTION CYCLE(INSTRUCTION
CYCLE)

A program residing in the memory unit of a computer consists of


a sequence of instructions. These instructions are executed by the
processor by going through a cycle for each instruction.
The sequence of steps in which instructions are loaded from
memory & executed is called instruction cycle.
The instruction cycle (also known as the fetch–decode–execute
cycle, or simply the fetch-execute cycle) is the cycle that the
central processing unit (CPU) follows from boot-up until the
computer has shut down in order to process instructions. It is
composed of three main stages: the fetch stage, the decode stage,
and the execute stage.
Each step in the sequence is referred to as a phase.
Fundamentally, there are 6 phases:
FETCH (instruction) - This phase obtains the next instruction
from memory and stores it in the IR. The address of the next
instruction to be executed is stored in the PC register. Proceeds in
the following manner
DECODE - In this phase the instruction stored in PC is examined
in order to decide what portion of the micro architecture needs to
be involved in the execution of the instruction. For example, for a
4- bit opcode, this can be implemented as a 4-to-16 decoder.
EVALUATE ADDRESS - This phase Compute the address of the
memory location that is needed to process the instruction. Some
instructions do not need this phase, e.g., instructions that work
directly with the registers and do not require any operands to be
loaded or stored form memory
⦁FETCH OPERANDS - In this phase, the source operands needed
to carry out the instruction are obtained from memory.
⦁EXECUTE - In this phase instruction is carried out. Some
instructions may not require this phase, e.g., data movement
instructions for which all the work is actually done in the FETCH
OPERANDS Phase 6.
the control unit begins the next an instruction cycle basic involves
three sub cycles.
Fetch

Decode

Execute

The fetch phase reads the next instruction from memory into the
CPU. The decode phase interprets the opcode by decoding it. The
execute phase performs the indicated operation.
CONTROL UNIT
 A control unit, or CU, is circuitry within a computer's processor
that directs operations. It instructs the memory, logic unit, and
both output and input devices of the computer on how to
respond to the program's instructions. CPUs and GPUs are
examples of devices that use control units.
 The control signals are generated in the control unit and provide
control inputs for the multiplexers in the common bus, control
inputs in processor registers, and micro-operations for the
accumulator. There are two major types of control
organization:

 (1) Hardwired control unit


 (2) Micro-programmed control unit
(1) Hardwired control unit:The Hardwired Control
organization involves the control logic to be implemented
with gates, flip-flops, decoders, and other digital circuits.
• A Hard-wired Control consists of two decoders, a sequence
counter, and a number of logic gates.
• An instruction fetched from the memory unit is placed in
the instruction register (IR).
• The component of an instruction register includes; I bit, the
operation code, and bits 0 through 11.
• The operation code in bits 12 through 14 are coded with a 3
x 8 decoder.
• The outputs of the decoder are designated by the symbols
D0 through D7.
• The operation code at bit 15 is transferred to a flip-flop
designated by the symbol I.
• The operation codes from Bits 0 through 11 are applied to
the control logic gates.
• The Sequence counter (SC) can count in binary from 0
through 15.
(2) Micro-programmed control unit:
•The Microprogrammed Control organization is implemented by
using the programming approach
•In Microprogrammed Control, the micro-operations are performed
by executing a program consisting of micro-instructions.
•The following image shows the block diagram of a
Microprogrammed Control organization.
• The Control memory address register specifies the address of
the micro-instruction.
• The Control memory is assumed to be a ROM, within which all
control information is permanently stored.
• The control register holds the microinstruction fetched from the
memory.
• The micro-instruction contains a control word that specifies one
or more micro-operations for the data processor.
• While the micro-operations are being executed, the next address
is computed in the next address generator circuit and then
transferred into the control address register to read the next
microinstruction.
• The next address generator is often referred to as a micro-
program sequencer, as it determines the address sequence that is
read from control memory.
MICROPROGRAM SEQUENCER
 The address is used by a microprogram sequencer to decide
which microinstruction has to be performed next.
Microprogram sequencing is the name of the total procedure.
The addresses needed to step through a control store’s
microprogram are created by a sequencer, also known as a
microsequencer.
 The microcode for the control memory should be generated by
the inventor once the configuration of the computer is settled.
The generation of code is known as microprogramming.
 There are various points to be treated while designing the
microprogram sequencer are −
(1)Size of the microinstruction
(2) Time of address generation
CONTROL MEMORY
 A control memory is a part of the control unit. Any
computer that involves microprogrammed control
consists of two memories. They are the main memory
and the control memory. Programs are usually stored in
the main memory by the users. Whenever the programs
change, the data is also modified in the main memory.
They consist of machine instructions and data.
 The control memory consists of microprograms that are
fixed and cannot be modified frequently. They contain
microinstructions that specify the internal control signals
required to execute register micro-operations.
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