Lecture03-Computer Architecture 1 and Assembly Language
Lecture03-Computer Architecture 1 and Assembly Language
1
Overview
• Last Lecture
– Data representation
• This Lecture
– Computers
• Next Lecture
– Digital Logic
2
CPU and Memory
• Every instruction executed by the CPU requires
memory access
6-3
CPU: Major Components
• ALU (arithmetic logic unit)
- Performs calculations and comparisons
- Uses the accumulator which is a register in which intermediate
arithmetic and logic results are stored.
• CU (control unit)
- Performs fetch/execute cycle
• Accesses program instructions and issues commands to the ALU
• Moves data to and from CPU registers and other hardware
components
- Subcomponents:
• Memory management unit: supervises fetching instructions and
data from memory
• I/O Interface: sometimes combined with memory management unit
as Bus Interface Unit
6-4
Flip Flop
Memory (Write)
Data
D1 D0
Address
A1 A0
D Q D Q
>C >C
Y3
Demux D Q D Q
>C >C
Y2
Write Enable D Q D Q
>C >C
Y1
D Q D Q
>C >C
Y0
5
Tristate Buffer Memory (Read)
Data
Q1Q0
Address
A1 A0
D Q D Q
>C >C
Y3
Demux D Q D Q
>C >C
Y2
Output Enable D Q D Q
>C >C
Y1
D Q D Q
>C >C
Y0
6
Memory (Read / Write)
• The wide arrows represent several wires
– We’re going to call these arrows buses
9
Control Unit
Data In (D)
Data In (E)
OE OE OE
+ Load
Command
X1 X0 Data Out (Q)
High Demux Y3
Y2
Y1
Instruction
Y0 X1 X0 ● ●
10
Control Unit
• Coordinates the operation of the computer
• Generates control signals
– Connect registers to the bus
– Control the function of the ALU
– Provides timing signals to the system
11
Registers
Data In (D)
Data In (E)
OE OE OE
+ Load
OE
Command Register
X1 X0 WE Data Out (Q)
Clock Demux Y3
Y2
Y1
Instruction
Y0 X1 X0 ● ●
12
Registers
• Registers are memory cells with names
– Hold data, instructions, or other items
– Various sizes (typically: 8, 16, 32, or 64 bits)
– Program counter (PC) and memory address registers must be
same width as address bus
– Registers which hold data must be same width as memory
words
• The accumulator is a special register
– Source of one of the operands
– Destination of the result
13
CPU
Data In (D)
Data In (E)
OE OE OE
Data Out (Q) Load + Load
OE
OE
Command Register
X1 X0 Data Out (Q)
WE
Clock Demux Y3
Y2
Y1
Instruction
Y0 X1 X0 ● ●
14
Computer!
15
Stored Program Computer
Address (A)
16
Von Neumann Architecture
• Three key concepts:
– Data and instructions are stored in a single read-write
memory
– Contents of memory are addressable by location, without
regard to the type of data contained
– Execution occurs in a sequential fashion, unless explicitly
altered, from one instruction to the next
• Programs and Data are the same thing
– And so it is possible to write source codes (data) and compile them
into executables (programs) that can be loaded as data and then
executed as programs
17
High vs. Low Level Language
18
Machine Code
• These numbers tell the computer what to do
• They tell the CPU to
– Assign values to registers
– Load registers from memory
– Add numbers to registers
– Store registers in memory
– And so on
• Each different CPU has its own mnemonics and its own
assembly language (its own machine language)
• Because assembly languages are tied to one specific computer architecture, they
are not portable. A program written in one assembly language would need to be
completely rewritten for it to run on another type of machine. Portability is one of
the main advantages of higher-level languages.
20
Assembly Language Example
21
Assembly Language
• We can give names (labels) to memory locations
– In this case PRINT is the name of the memory location where the
routine is stored. DONE is the name of the memory location where
the return statement is stored
• There is a direct correspondence between mnemonic
assembly language and machine code.
– An assembler translates from assembly to machine code, a
disassembler translates from machine code to assembly language
• The assembler assigns absolute addresses to these
labels
22
Multiple Data Instructions
• Perform a single operation on multiple pieces of data
simultaneously
- SIMD: Single Instruction, Multiple Data
- Commonly used in multimedia, vector and array processing
applications
23
Instruction Elements
OPCODE: task
Source Result
OPCODE
OPERAND OPERAND
24
Instruction Format
Simple
32-bit
Instruction
Format
25
Instructions
• Instruction
- Direction given to a computer
- Causes electrical or optical signals to be sent through specific
circuits for processing
• Instruction set
- Design defines functions performed by the processor
- Differentiates computer architecture by the
• Number of instructions
• Complexity of operations performed by individual instructions
• Data types supported
• Format (layout, fixed vs. variable length)
• Use of registers
• Addressing (size, modes)
26
Instruction Set
• The set of all instructions for the particular CPU is called the
instruction set
– It is determined by the designers (or micro-coded)
28
Summary
• ALU, CU and I/O interface are the main components of the CPU
• Registers are memory cells with names and they are close to the
CPU for quick access
• The instruction set is the code that the CPU can understand. It
contains the task that the CPU needs to execute.