BME 3101:Microprocessors

Dr Solomon C. Nwaneri
Department of Biomedical Engineering
University of Lagos Nigeria

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 Module 4
Outline
1. 8087 Math Co-processor
• Overview of architecture 8087
• interfacing with 8086, Data types and
instructions.

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 8087 Math Co-processor
• 8087 is a 16-bit math coprocessor designed by Intel and was the first
x87 floating-point coprocessor for the 8086 line of microprocessors.

• It was built to pair with 8086 and 8088.

• The purpose of 8087 was to speed up the computations involving

floating point calculations.

• The function of the 8087 coprocessor is beyond addition,

subtraction, multiplication and division of simple numbers.

• It does all the calculations involving floating point numbers like

scientific calculations and algebraic functions.
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• The coprocessor, which performs all the calculations,
helps to free up a lot of CPU’s time and allow the CPU to
focus all of its resources on the other functions it has to
perform.

• Thus, the overall speed and performance of the entire

system is increased.

• This coprocessor introduced about 60 new instructions

available to the programmer.

• All the mnemonics begin with “F” to differentiate them

from the standard 8086 instructions.
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• For example, in contrast to ADD/MUL, 8087 provide
FADD/FMUL.

• The microprocessor and coprocessor can execute

their respective instructions simultaneously.

• Microprocessor interprets and executes the normal

instruction set and the coprocessor interprets and
executes only the coprocessor instructions.

• All the coprocessor instructions are ESC instructions,

i.e. they start with “F”.
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 Overview Of Architecture 8087
• The internal structure of 8087 coprocessor is
divided into two major sections:
‒ Control Unit (CU)
‒ Numerical Execution Unit (NEU)

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 CONTROL UNIT (CU)
• It interfaces coprocessor to the microprocessor
system bus.
• It also synchronizes the operation of the
coprocessor and the microprocessor.
• This unit has a Control Word, Status Word and
Data Buffer.
• If an instruction is ESC instruction, then
coprocessor executes it.
• If not, then microprocessor executes.
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 Numeric Execution Unit (NEU)
•This unit is responsible for executing all coprocessor
instructions.

•It has an 8 register stack that holds the operands for

instructions and result of instructions.

•Numeric data is transferred inside the coprocessor in two

parts:
‒ 64-bit mantissa bus
‒ 16-bit exponent bus
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Fig. 1:8087 Architecture
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Fig. 2: 8087 Pin Description
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 Pin Description of 8087

• AD0 – AD15 − These are the time multiplexed

address/data lines, which carry addresses during
the first clock cycle and data from the second
clock cycle onwards.
• A19 / S6 – A16/S − These lines are the time
multiplexed address/status lines. It functions in a
similar way to the corresponding pins of 8086.
The S6, S4 and S3 are permanently high, while the
S5 is permanently low.

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• − During the first clock cycle, the is used to enable
data on to the higher byte of the 8086 data bus
and after that works as status line S7.

• QS1, QS0 − These are queue status input signals

which provides the status of instruction queue,
their conditions as shown in Table 1.

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Table 1: Queue Status Input Signals
QSn QS1 S
0 0 No Operation

0 1 First byte of opcode from

the queue

1 0 Empty the queue

1 1 Subsequent byte from the

queue

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•INT − Pin 32 is used for an interrupt signal, which changes
to high when an unmasked exception has been received
during the execution.

•BUSY − Pin 23 is used to indicate a busy state to the CPU.

It is an output signal, when it is high it indicates a busy state
to the CPU.

•READY − It is an input signal used to inform the

coprocessor whether the bus is ready to receive data or
not. Pin 22 generates the READY signal.

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• RESET − It is an input signal used to reject the
internal activities of the coprocessor and prepare
it for further execution whenever required by the
CPU.

• CLK − The CLK input provides the basic timings

for the processor operation.

• VCC − It is a power supply signal, which requires

+5V supply for the operation of the circuit.

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• S0, S1, S2 − These are the status signals that
provide the status of the operation which is used
by the Bus Controller 8087 to generate memory
and I/O control signals. These signals are active
during the fourth clock cycle.
Table 2: Status Signals for 8087 Math Coprocessor
S2 S1 S0 Queue Status
0 X X Unused
1 0 0 Unused
1 0 1 Memory Read
1 1 0 Memory Write
1 1 1 Passive

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 Interfacing 8087 to 8086
• 8087 can be connected with CPU only in Max. mode, i.e when MN/MX pin
is grounded.

• This interface is also called as coprocessor configuration. Here 8086 is

referred to as the host and 8087 as coprocessor as it cannot operate all by
itself.

• Multiplexed address-data bus lines are connected directly from the 8086 to
8087.

• The status lines and the queue status lines connected directly from 8086 to
8087.

• The QS0 and QS1 lines may be directly connected to corresponding pins in
case of 8086/88 based systems.
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Fig. 3: Interfacing 8087 to 8086
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• The coprocessor connects to the processors local bus through
several lines: data/address, state, clock, ready, reset, test and
request/grant.

• Being connected to the microprocessors’ local bus allows the

coprocessor access to all memory, input/output resources
through the request/grand buss request.

• The two processors working simultaneously imply

synchronization between their common processes.

• Only 8086 can fetch instructions but these instructions also

enter 8087. 8087 treats 8086 instructions as NOP (No
operation).
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• The clock pin of 8087 connected with CPU
8086/88 clock i/p.

• The interrupt o/p of 8087 is routed to 8086/88

via a programmable interrupt controller.

• The clock pin of 8087 connected with CPU

8086/88 clock i/p.

• BUSY signal 8087 is connected to TEST pin of

8086.
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• Interrupt o/p INT of the 8087 to NMI input of
8086. This intimates an error condition.

• A WAIT instruction is passed to keep looking at its

TEST pin, until it finds pin Low to indicate that the
8087 has completed the computation.

• SYNCHRONIZATION must be established between

the processor and coprocessor in two situations.

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• ESC is used as a prefix for 8087 instructions.
When as instruction with ESC prefix (5 MSB bits
as 11011) is encountered, 8087 is activated.

• The ESC instruction is decoded by both 8086

and 8087.

• If the 8087 instruction has only an opcode (no

operands) then 8087 will start execution and
8086 will immediately move its next instruction.

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• But if the instruction requires a memory operand,
then 8086 will have to fetch the first word of the
operand as 8087 cannot calculate the physical
address. This word will be captured by 8087.

• Once 8087 gets its operand, it begins processing

by making the BUSY output high. This BUSY
output is connected to the TEST input of the
microprocessor. Now 8087 execute its instruction
and 8086 moves ahead with its next instruction.
Hence multiprocessing takes place.

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 Math Coprocessor Registers
79 64 63 62 0
R7

R6

R5

R4

R3

R2

R1

R0
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Sign Exponent Significand
 Compatible Processor and Coprocessor
Microprocessors Coprocessors
8086 & 8088 8087
80286 80287, 80287XL
80386DX 80287, 80387DX
80386SX 80387SX
80486DX Inbuilt
80486SX 80487SX

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 Data Types for 8087 Math Coprocessor

• The 8087 can operate on memory operands of

seven different data types:
 Word integer
 Short integer
 Long integer
 Packed BCD
 Short real
 Long real
 Temporary real
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 Data Types for 8087 Math Coprocessor
•The 8087 coprocessor recognizes 3 real data types:
‒ Short real (32-bit)
‒ Long real (64-bit)
‒ Temporary Real (80-bits)
• Real format has 3 fields: Sign, Exponent, and
Mantissa.

To convert any number to real format, move the decimal point

to the right of the most non-zero digit.

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1. Floating Point Data types
a.Short Real - This is refers to a 32 bit number
represented in floating point. The number is
decomposed in mantissa and characteristic.

The characteristic is represented on 8 bits from

which the most significant is the sign bit. The
physical length of the mantissa is 23 bits.

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 3 30 23 22 0
S Characteristic Mantissa (starts with 1)

The Short Real floating point number representation always works

with normalized numbers. This means that the mantissa’s first bit is
always 1. Usually, this bit is never written being considered by
default.
The actual precision is explained as follows:
The mantissa represents 6-7 digits, while the characteristic with its 8
bits raises their number to the order of ~1038 (the exact number can
not be determined because it depends on the mantissa).

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• The highest number is approximately of 1.7 *1038
and the lowest positive real number in around
10-38.
• Example:

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1b. Long Real Data types: This is a 64 bit number
represented in floating point. The number is
decomposed in mantissa and characteristic.

The characteristic is represented on 11 bits from

which the most significant is the sign bit and it’s
treated differently.

The physical length of the mantissa is 52 bits. The sigh

of the real number is given by the most significant bit:

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 31 30 23 22 20
S Characteristic Mantissa (starts with 1)

High precision real numbers an 80 bit number

represented in floating point.

The physical length of the mantissa is 64 bits. The

sigh of the real number is given by the most
significant bit.

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 Temporary Real
• Example

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 Coprocessor Instruction Set
•The 8087 instructions can be distinguished from 8086
instructions by letter F which means Floating point
number.

•8087 has 68 instructions which can be divided into 6

groups:
 Data transfer instructions
 Arithmetic instructions
 Compare instructions
 Transcendental instructions
 Load constant instructions
 Processor control instructions
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 Data Transfer Instructions for 8087
a. Real Transfers
FLD source : Decrements the stack pointer by 1 and copies a
real number from a stack element or memory location to the
new ST.
Example
FLD ST (2) ; Copies ST(2) to ST
FLD [BX] ; Number from memory pointed by
BX copied to ST.
Exceptions: I, D
FST destination ; Copies ST to specified stack
position or to a specified memory location.
Exceptions: I, O, U, P.
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• Examples:
FST ST(3) ; Copy ST to ST(3)
FST [BX] ; Copy ST to memory pointed
by [BX]

FSTP destination : Copies ST to a specified stack

element

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 Arithmetic Instructions for 8087
a. Addition
FADD destination, source : Adds real number from
specified source to real number at specified
destination. Source can be stack element or
memory element.
Exceptions: I, D, O, U, P
Examples:
FADD ST(2), ST ; add ST to ST(2), result in ST(2)

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FADDP destination, source : Adds ST to specified
stack element and increments stack pointer by one.
Exceptions: I, D, O, U, P
Example:
FADDP ST(2) ; Add ST(2) to ST
; Increment stack pointer so
ST(2) becomes ST.
b. Subtraction
FSUB destination, source : subtracts the real number at the
specified source from the real number at the specified destination and puts
the result in the specified destination.
Exceptions: I, D, O, U, P
Example: ST(2) - ST
FSUB ST(3), ST ; ST(3)
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 LOAD Instructions

•FILD adr - Loads on the stack the integer variable

located at address „adr”.

•FLD adr - Loads on the stack the real variable

(long or short) located at address „adr”.

•FBLD adr - Loads on the stack the packed decimal

variable located at address „adr”. The variable
stored in memory of type (DT) is converted to the
coprocessors internal format at load.
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 References
Godse D.A. and Godse, A.P. 2007. Advanced
Microprocessors Second Revised edition. Technical
Publications Prune

Mathvanan, N. 2003. Microprocessor PC hardware

and interfacing

Theagarajan, R. Microprocessor and Its Applications

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