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Operators and Statements in VHDL

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0% found this document useful (0 votes)
13 views

Operators and Statements in VHDL

Uploaded by

patilojas16
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Operators

• There are five types of operator


1. Logical operators
2. Relational operators
3. Adding operators
4. Multiplying operators
5. Miscellaneous operators
1.Logical operator
• There six logical operators
and or nand nor xor not

2.Relational operator
= /= <= > >=
3.Adding operators

+ - &
4.Multiplying operators

* / mod rem
5. Miscellaneous operator

abc **
Operator overloading
• When a standard operator symbol is made to behave
differently based on the type of its operands, the operator is
said to be overloaded.

• The need for operator overloading arises from the fact that the
predefined operators in the language are defined only for
operands of certain predefined types.
Example of operator overloading:
signal A,B,C:MVL;
signal A,B,C:BIT;
A<= ‘Z’ or ‘1’; -- #1 standard operator notation.
B<= “or” (‘0’, ‘Z’) -- #2 function operator notation.
Statements in VHDL
• Variable assignment statement
• Signal assignment statement
• Process statement
• If statement
• Wait statement
• Null statement
• Loop statement
• Exit statement
Variable Assignment Statement
• Variables can be declared and used inside a process
statement.

• A variable is assigned a value using the variable


assignment statement that typically has the form
Variable-object := expression;

• Variables are created at the time of elaboration.

• Retain their values throughout the entire simulation run


• Example of variable assignment statement

process (A)
variable EVENTS_ON_A: INTEGER := 0;
begin
EVENTS_ON_A := EVENTS_ON_A+1;
end process;
Signal assignment statement
• Signals are assigned values using a signal assignment
statement .
• The simplest form of a signal assignment statement is
signal-object <= expression [ after delay-value ];
• A signal assignment statement can appear within a
process or outside of a process.
• If it occurs outside of a process, it is considered to be a
concurrent signal assignment statement.
• Example of signal assignment statement:
COUNTER <= COUNTER+ "0010"; - Assign after a
delta delay
PAR <= PAR xor DIN after 2 ns;
Z <=(AO and A1) Or (BO and B1)Or (CO and C1) after 6 ns;
Process statement

• A process statement contains sequential statements that


describe the functionality of a portion of an entity in
sequential terms.

• The syntax of a process statement is


[ process-label: ] process [ ( sensitivity-list ) ]
[process-item-declarations]
• sequential-statements; these are ->
variable-assignment-statement
signal-assignment-statement
wait-statement
if-statement
case-statement
loop-statement
null-statement
exit-statement
next-statement
return-statement.
If statement
• An if statement selects a sequence of statements for
execution based on the value of a condition.
• The condition can be any expression that evaluates to a
Boolean value.
• The general form of an if statement is
if boolean-expression then
Sequential-statement
[ elsif boolean-expression then
sequential-statements ]
[ else sequential-statements ]
end if;
Example of if statement

if SUM <= 100 then -- This is a less-than-or-


equal-to operator.
SUM := SUM+10; end if;
if NICKEL_IN then
DEPOSITED <=TOTAL_10; --This"<=" is a signal
--assignment operator.
elsif DIME_IN then
DEPOSITED <= TOTAL_15;
elsif QUARTERJN then
DEPOSITED <= TOTAL_30;
else
DEPOSITED <= TOTAL_ERROR;
end if;
Case statement
• The format of a case statement is
case expression is
when choices => sequential-statements
when choices => sequential-statements
-- Can have any number of branches.
when others => sequential-statements
End case;
• The case statements select one of the branches for
execution based on the value of expression.
Example of case statement:
type WEEK_DAY is (MON, TUE, WED, THU, FRI, SAT,
SUN);
type DOLLARS is range 0 to 10;
variable DAY:WEEK_DAY;
variable POCKET_MONEY:DOLLARS;
case DAY is
when TUE => POCKET_MONEY := 6; -- branch 1
when MON I WED => POCKET_MONEY := 2; --branch 2
when FRI to SUN => POCKET_MONEY := 7; --branch 3
when others => POCKET_MONEY := 0; --branch 4
end case;
Loop Statement
• A loop statement is used to iterate through a set of
sequential statements.
[ loop label: ] iteration scheme loop
sequential statements;
end loop [loop label];
• There are three iteration scheme.
for identifier in range
while boolean-expression
exit if the condition is satisfied
• Example of loop statement:
 for loop

FACTORIAL := 1;
for NUMBER in 2 to N loop
FACTORIAL := FACTORIAL * NUMBER;
end loop;
 While loop

J:=0;SUM:=10;
WH-LOOP: while J < 20 loop - This loop has a label, WH_LOOP
SUM := SUM * 2;
J:=J+3;
end loop;
 Exit statement

SUM:=1;J:=0;
L2: loop --This loop also has a label
J:=J+21;
SUM := SUM* 10;
exit when SUM > 100;
end loop L2; -- This loop label, if present, must be the
-- same as the initial loop label
Wait statement
• when a process has a sensitivity list, it always suspends
after executing the last sequential statement in the
process.
• The wait statement provides an alternate way to suspend
the execution of process.
• There are three basic forms of the wait statement:
Wait on sensitivity list;
Wait until Boolean expression;
Wait for time-expression;
• Example of wait statement:

wait on A,B,C; --statement 1


wait until (A=B); --statement 2
wait for 10 ns; --statement 3
Exit statement
• The exit statement is a sequential statement that can be
used only inside a loop.
• It causes execution to jump out of the innermost loop or
the loop whose label is specified.
• The syntax for an exit statement is
exit [ loop-label ] [ when condition ]:
• If no loop is specified is specified , the innermost loop
must be executed.
• Example of exit statement:
SUM := 1; J :=0;
L3: loop
J:=J+21;
SUM := SUM*10;
if (SUM > 100) then
exit L3; --"exit;” also would have
been sufficient
end if;
end loop L3;
Null Statement
• The statement
null;

is a sequential statement to take place and execution


continues with the next statement.

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