21CS43 MES Module5
21CS43 MES Module5
MICROCONTROLLER AND
EMBEDDED SYSTEMS
MODULE 5
RTOS AND IDE FOR
EMBEDDED
SYSTEM
» The super loop based task execution model for firmware executes the tasks
sequentially in order in which the tasks are listed within the loop. Here every
task is repeated at regular intervals and the task execution is non-real time.
» But, certain applications demand time critical response to tasks/ events and
delay in the response may be catastrophic.
» Examples: Flight control systems, Air bag control,
Anti-lock Brake Systems (ABS) for vehicles, Nuclear monitoring devices, etc.
» In embedded systems, the time critical response for tasks/ events may be
addressed by –
» Assigning priority to tasks and execute the high priority task.
4
» The following Figure gives an insight into the
basic components of an operating system and their
interfaces with rest of the world.
User
Applications Application
Programming
Memory Interface (API)
Kernel Services
Management
Process
Management
Time
Management
File System
Management
I/O System
Management Device
Driver
Underlying Interface
Hardware
5
» The Kernel:
» The kernel is the core of the operating system. It is responsible for managing
the system resources and the communication among the hardware and other
system services.
» Kernel acts as the abstraction layer between system resources and user
applications.
» For a general purpose OS, the kernel contains different services like memory
management, process management, time management, file system
management, I/O system management.
6
» Process Management: deals with managing the process/
tasks.
7
» Primary Memory Management: refers to a volatile memory (RAM), where
processes are loaded and variables and shared data are stored.
8
» File System Management: File is a collection of related information. A file
could be a program (source code or executable), text files, image files, word
documents, audio/ video files, etc.
9
» I/O System (Device) Management: Kernel is responsible for routing the I/O
requests coming from different user applications to the appropriate I/O
devices of the system.
» In a well structured OS, direct access to I/O devices is not allowed; access to
them is establish through Application Programming Interface (API).
» The kernel maintains list of all the I/O devices of the system.
» „Device Manager‟ of the kernel is responsible for handling all I/O related
operations.
10
» Secondary Storage Management: deals with managing the secondary
storage
memory devices (if any) connected to the system.
» Secondary memory is used as backup medium for programs and data, as main
memory is volatile.
» Disk scheduling
11
» Protection Systems: Modern operating systems are designed in such way to
support multiple users with different levels of access permissions.
» The protection deals with implementing the security policies to restrict the
access of system resources and particular user by different application or
processes and different user.
12
» The important services offered by the kernel of an OS:
» Kernel Space and User Space: The program code corresponding to the kernel
applications/ services are kept in a contiguous area of primary (working)
memory and is protected from the un-authorized access by user programs/
applications.
The memory space at which the kernel code is located is known as „Kernel
Space‟. All user applications are loaded to a specific area of primary
memory and this memory area is referred as „User Space‟.
The partitioning of memory into kernel and user space is purely Operating
System dependent.
Most of the operating systems keep the kernel application code in main
memory and it is not swapped out into the secondary memory.
13
» Monolithic Kernel and Microkernel: Kernel forms the heart of OS. Different
approaches are adopted for building an operating system kernel. Based on the
kernel design, kernels can be classified into „Monolithic‟ and „Micro‟.
» Monolithic Kernel: In monolithic kernel
architecture, all kernel services run in the
kernel space. All kernel modules run
within the same memory space under a single
kernel thread.
» The major drawback of monolithic kernel is
that any error or failure in any one of the
kernel modules leads to the crashing of
the entire kernel application.
LINUX, SOLARIS, MS-DOS kernels
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» Microkernel: The microkernel design incorporates only essential set of
operating system services into the kernel. The rest of the operating systems
services are implemented in program known as „Servers‟ which runs in user
space. The memory management, timer systems and interrupt handlers are the
essential services, which forms the part of the microkernel.
15
TYPES OF OPERATING SYSTEMS
» Depending on the type of kernel and kernel services, purpose and type of
computing system, Operating Systems are classified into different types.
16
» Real Time Operating System (RTOS):
» RTOS decides which applications should run in which order and how much
time needs to be allocated for each application.
Windows Embedded Compact, QNX, VxWorks MicroC/OS-II, etc., are
examples of RTOSs.
17
» The Real-Time kernel: The kernel of a Real-Time OS is referred as Real-
Time kernel.
» The Real-Time kernel is highly specialized and it contains only the minimal
set of services required for running user applications/ tasks.
» Memory management
» Interrupt handling
» Time management.
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» Task/ Process Management: Deals with setting up the memory space for the
tasks, loading the task‟s code into the memory space, allocating system
resources and setting up a Task Control Block (TCB) for the task and
task/process termination/deletion.
A Task Control Block (TCB) is used for holding the information
corresponding to a task. TCB usually contains the following set of
information:
Task ID: Task Identification Number
Task State: The current state of the task. (E.g. State = „Ready‟ for a
task which is ready to execute)
Task Type: Task type. Indicates what is the type for this task. The task
can be a hard real time or soft real time or background task.
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Task Priority: Task priority (E.g. Task priority = 1 for
task with priority = 1)
Task Context Pointer: Context pointer. Pointer for context saving
Task Memory Pointers: Pointers to the code memory, data memory
and stack memory for the task
Task System Resource Pointers: Pointers to system
resources (semaphores, mutex, etc.) used by the task
Task Pointers: Pointers to other TCBs (TCBs for preceding, next and
waiting tasks)
Other Parameters: Other relevant task parameters.
» The parameters and implementation of the TCB is kernel dependent. The TCB
parameters vary across different kernels based on the task management
implementation.
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» Task/ Process Scheduling: Deals with sharing the CPU among various tasks/
processes. A kernel application called „Scheduler‟ handles the task
scheduling. Scheduler is an algorithm implementation, which performs the
efficient and optimal scheduling of tasks to provide a deterministic behavior.
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» Error/ Exception Handling: Deals with registering and handling the errors
occurred/ exceptions rose during the execution of tasks.
Insufficient memory, timeouts, deadlocks, deadline missing, bus error,
divide by zero, unknown instruction execution etc, are examples of
errors/exceptions.
Errors/ Exceptions can happen at the kernel level services or at task level.
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» Memory Management: The memory management function of an RTOS kernel
is slightly different compared to the General Purpose Operating Systems.
In general, the memory allocation time increases depending on the size of
the block of memory need to be allocated and the state of the allocated
memory block. RTOS achieves predictable timing and deterministic
behavior, by compromising the effectiveness of memory allocation.
RTOS generally uses „block‟ based memory allocation technique, instead
of the usual dynamic memory allocation techniques used by the GPOS.
RTOS kernel uses blocks of fixed size of dynamic memory and the block
is allocated for a task on a need basis. The blocks are stored in a „Free
buffer Queue‟.
23
Most of the RTOS kernels allow tasks to access any of the memory blocks
without any memory protection to achieve predictable timing and avoid
the timing overheads.
Some commercial RTOS kernels allow memory protection as optional and
the kernel enters a fail-safe mode when an illegal memory access occurs.
24
» Interrupt Handling: Deals with the handling of various interrupts. Interrupts
inform the processor that an external device or an associated task requires
immediate attention of the CPU.
Interrupts can be either Synchronous or Asynchronous.
Interrupts which occurs in sync with the currently executing task is
known as Synchronous interrupts. Usually the software interrupts fall
under the Synchronous Interrupt category.
Divide by zero, memory segmentation error etc are examples of
Synchronous interrupts.
For synchronous interrupts, the interrupt handler runs in the same
context of the interrupting task.
Interrupts which occurs at any point of execution of any task, and are
not in sync with the currently executing task are Asynchronous 25
Interrupts which occurs at any point of execution of any task, and are
not in sync with the currently executing task are Asynchronous
interrupts.
Timer overflow interrupts, serial data reception/ transmission
interrupts etc., are examples for asynchronous interrupts.
For asynchronous interrupts, the interrupt handler is usually written as
separate task (depends on OS Kernel implementation) and it runs in a
different context. Hence, a context switch happens while handling the
asynchronous interrupts.
» Priority levels can be assigned to the interrupts and each interrupts can be
enabled or disabled individually.
» Time Management:
Accurate time management is essential for providing precise time reference
for all applications. The time reference to kernel is provided by a high-
resolution Real Time Clock (RTC) hardware chip (hardware timer).
The hardware timer is programmed to interrupt the processor/ controller at
a fixed rate. This timer interrupt is referred as „Timer tick‟. The „Timer
tick‟ is taken as the timing reference by the kernel.
The „Timer tick‟ interval may vary depending on the hardware timer.
Usually, the „Timer tick‟ varies in the microseconds range.
The time parameters for tasks are expressed as the multiples of the „Timer
tick‟.
The System time is updated based on the „Timer tick‟.
If the System time register is 32 bits wide and the „Timer tick‟ interval is 1
microsecond, the System time register will reset in;
If the „Timer tick‟ interval is 1 millisecond, the System time register will
reset in
» A Hard Real Time system must meet the deadlines for a task without any
slippage. Missing any deadline may produce catastrophic results for Hard
Real Time Systems, including permanent data lose and irrecoverable damages
to the system/users.
Hard real-time systems emphasize on the principle „A late answer is a
wrong answer‟.
For example, Air bag control systems and Anti-lock Brake Systems
(ABS) of vehicles are typical examples of Hard Real Time Systems.
Most of the Hard Real Time Systems are automatic.
» Soft Real-Time: Real Time Operating Systems that does not guarantee meeting
deadlines, but, offer the best effort to meet the deadline are referred as soft
real-time systems.
» The terms “Task” , “Job” and “Process”refer to the same entity in the Operating
System context and most often they are used interchangeably.
» Process:
» A process requires various system resources like CPU for executing the
process, memory for storing the code corresponding to the process and
associated variables, I/O devices for information exchange etc.
» The process traverses through a series of states during its transition from the
newly created state to the terminated state.
The cycle through which a process changes its state from „newly created‟
to „execution completed‟ is known as „Process Life Cycle‟.
The various states through which a process traverses through during a
Process Life Cycle indicates the current status of the process with respect
to time and also provides information about what it is allowed to do next.
» The transition of a
process from one state
to another is known as
„State transition‟.
» Ready State: The state, where a process is incepted into the memory and
awaiting the processor time for execution, is known as „Ready State‟. At this
stage, the process is placed in the „Ready list‟ queue maintained by the OS.
» Running State: The state where in the source code instructions corresponding
to the process is being executed is called „Running State‟. Running state is the
state at which the process execution happens.
» Blocked State/ Wait State: Refers to a state where a running process is
temporarily suspended from execution and does not have immediate access to
resources. The blocked state might have invoked by various conditions like-
the process enters a wait state for an event to occur (E.g. Waiting for user
inputs such as keyboard input) or waiting for getting access to a shared
resource like semaphore, mutex etc.
» Different threads, which are part of a process, share the same address space;
meaning they share the data memory, code memory and heap memory area.
» Threads maintain their own thread status (CPU register values), Program
Counter (PC) and stack.
» The memory model for a process and its associated threads are given in the
following figure.
4
1
» The Concept of Multithreading: The process is split into multiple threads,
which executes a portion of the process; there will be a main thread and rest
of the threads will be created within the main thread.
The multithreaded architecture of a process can be visualized with the
thread-process diagram, shown below.
MP, CSE, 42
VCET
Use of multiple threads to execute a process brings the following
advantage:
Better memory utilization: Multiple threads of the same process share
the address space for data memory. This also reduces the complexity of
inter thread communication since variables can be shared across the
threads.
Since the process is split into different threads, when one thread enters
a wait state, the CPU can be utilized by other threads of the process
that do not require the event, which the other thread is waiting, for
processing. This speeds up the execution of the process.
Efficient CPU utilization. The CPU is engaged all time.
» Thread Pre-emption: is the act of pre-empting the currently running thread
(stopping temporarily). It is dependent on the Operating System.
» It is performed for sharing the CPU time among all the threads.
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» Thread versus Process:
Thread Process
Thread is a single unit of execution and is part of Process is a program in execution and contains one or
process. more threads.
A thread does not have its own data memory and Process has its own code memory, data memory, and
heap memory. stack memory.
A thread cannot live independently; it lives within the
A process contains at least one thread.
process.
There can be multiple threads in a process; the first Threads within a process share the code, data and
(main) thread calls the main function and occupies heap memory; each thread holds separate memory
the start of the stack memory of the process. area for stack.
Processes are very expensive to create; involves
Threads are very inexpensive to create.
many OS overhead.
Context switching is complex and involves lots of
Context switching is inexpensive and fast.
OS overhead and comparatively slow.
If a process dies, the resource allocated to it are
If a thread expires, its stack is reclaimed by the
reclaimed by the OS and all associated threads of the
process.
, process also dies. 48
MULTIPROCESSING AND
MULTITASKING
» The ability to execute multiple processes simultaneously is referred as
multiprocessing. Systems which are capable of performing multiprocessing are
known as multiprocessor systems.
MP, CSE, 50
VCET
The act of switching CPU among the processes or changing the current
execution context is known as „Context switching‟.
The act of saving the current context (details like Register details, Memory
details, System Resource Usage details, Execution details, etc.) for the
currently running processes at the time of CPU switching is known as
„Context saving‟.
The process of retrieving the saved context details for a process, which is
going to be executed due to CPU switching, is known as „Context
retrieval‟.
» Types of Multitasking:
» In this method, any task/ process can avail the CPU as much time as it
wants. Since this type of implementation involves the mercy of the tasks
each other for getting the CPU time for execution, it is known as co-
operative multitasking. If the currently executing task is non-cooperative,
the other tasks may have to wait for a long time to get the CPU.
» Preemptive Multitasking: Preemptive multitasking ensures that every
task/ process gets a chance to execute.
» Pipes
» A process which creates a pipe is known as pipe server and a process which
connects to a pipe is known as pipe client.
» A pipe can be considered as a medium for information flow and has two
conceptual ends. It can be unidirectional, allowing information flow in one
direction or bidirectional allowing bi-directional information flow.
» A unidirectional pipe allows the process connecting at one end of the pipe to
write to the pipe and the process connected at the other end of the pipe to read
the data, whereas a bi-directional pipe allows both reading and writing at one
end.
» The process which creates the named pipe is known as pipe server.
» With named pipes, any process can act as both client and server allowing
point-to-
point communication.
» Named pipes can be used for communicating between processes running on the
same machine or between processes running on different machines connected to a
» 2. Memory Mapped Objects: Memory mapped object is a shared memory
technique adopted by certain Real Time Operating Systems for allocating a
shared block of memory which can be accessed by multiple process
simultaneously.
» A process can map the entire committed physical area or a block of it to its
virtual address space.
» All read and write operation to this virtual address space by a process is
directed to its committed physical area.
» Any process which wants to share data with other processes can map the
physical memory area of the mapped object to its virtual memory space and
use it for sharing the data.
» The concept of memory mapped object is shown bellow.
» IPC Mechanism - Message Passing:
» Through shared memory lots of data can be shared whereas only limited amount of
info/ data is passed through message passing.
» Message passing is relatively fast and free from the synchronization overheads
compared to shared memory.
» Message Queue
» Mailbox
» Signalling
» 1. Message Queues: Process which wants to talk to another process posts the
message to a First-In-First-Out (FIFO) queue called „Message queue‟, which
stores the messages temporarily in a system defined memory object, to pass it
to the desired process.
» Messages are sent and received through send (Name of the process to which
the message is to be sent, message) and receive (Name of the process from
which the message is to be received, message) methods.
» Usually used for one way communication, only a single message is exchanged
through mailbox whereas „message queue‟ can be used for exchanging
multiple messages.
»One task/process creates the mailbox
and other tasks/process can subscribe to
this mailbox for getting message
notification.
»The implementation of the mailbox is
OS kernel dependent.
» Signalling: Signals are used for an asynchronous notification mechanism.
» The signal mainly used for the execution synchronization of tasks process/
tasks.
» platforms.
The RPC communication can
be either Synchronou
(Blocking) or s
(Non- Asynchronou
blocking). s
» Sockets are used for RPC communication. Socket is a logical endpoint in a
two-way communication link between two applications running on a
network. A port number is associated with a socket so that the network layer
of the communication channel can deliver the data to the designated
application.
» Sockets are of different types namely; Internet sockets (INET), UNIX sockets,
etc.
» The INET Socket works on Internet Communication protocol. TCP/ IP, UDP,
etc., are the communication protocols used by INET sockets.
» Also, each process may communicate with each other with different IPC
mechanisms.
» Hence, there may be situations that; two processes try to access a shared memory
area, where one process tries to write to the memory location when the other
process is trying to read from the same memory location. This will lead to
unexpected results.
» The solution is, make each process aware of access of a shared resource.
» The act of making the processes aware of the access of shared resources by
each process to avoid conflicts is known as “Task/ Process
Synchronization”.
» The code memory area which holds the program instructions (piece of code)
for accessing a shared resource is known as „Critical Section‟.
» The program statement counter++; looks like a single statement from a high
level programming language (C Language) perspective.
» The low level implementation of the high level program statement counter++;
under Windows XP operating system running on an Intel Centrino Duo
processor is given below.
» At the processor instruction level, the value of the variable counter is loaded to
the Accumulator register (EAX Register).
» The base pointer register (EBP Register) is used for pointing to the memory
variable counter.
» After loading the contents of the variable counter to the Accumulator, the
Accumulator content is incremented by one using the add instruction.
mov dword ptr [e bp-4], eax mov dword ptr [ebp-4], eax
» Imagine a situation where a process switching (context switching) happens
from Process A to Process B when Process A is executing the counter++;
statement. Process A accomplishes the counter++; statement through three
different low level instructions.
» Now imagine that the process switching happened at the point, where Process
A executed the low level instruction mov eax, dword ptr [ebp-4] and is about
to execute the next instruction add eax, 1. The scenario is illustrated in the
following Figure.
» Process B increments the shared variable „counter‟ in the middle of the
operation where Process A tries to increment it. When Process A gets the
CPU time for execution, it starts from the point where it got interrupted
Though the variable counter is incremented by Process B, Process A is
unaware of it and it increments the variable with the old value.
» 2. Deadlock: Deadlock is the condition in which a process is waiting for a
resource held by another process which is waiting for a resource held by the
first process; hence, none of the processes are able to make any progress in
their execution.
» Process A holds a resource „x‟ and it wants a resource „y‟ held by Process B.
Process B is currently holding resource „y‟ and it wants the resource „x‟
which is currently held by Process A. Both hold the respective resources and
they compete each other to get the resource held by the respective processes.
MP, CSE, 79
VCET
» Conditions Favoring
Deadlock:
Mutual Exclusion: The criteria that only one process can hold a resource at a time.
Meaning processes should access shared resources with mutual exclusion.
Hold & Wait: The condition in which a process holds a shared resource by
acquiring the lock controlling the shared access and waiting for additional
resources held by other processes.
No Resource Preemption: The criteria that Operating System cannot take back a
resource from a process which is currently holding it and the resource can only be
released voluntarily by the process holding it.
Circular Wait: A process is waiting for a resource which is currently held by
another process which in turn is waiting for a resource held by the first process. In
general there exists a set of waiting process P0, P1 …. Pn with P0 is waiting for a
resource held by P1 and P1 is waiting for a resource held by P0, ……,Pn is
waiting for a resource held by P0 and P0 is waiting for a resource held by Pn and
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Detect and Recover: This approach suggests the detection of a deadlock
situation and recovery from it.
This is similar to the deadlock condition that may arise at a traffic junction. When the
vehicles from different directions compete to cross the junction, deadlock (traffic jam)
condition is resulted. Once a deadlock (traffic jam) is happened at the junction, the only
solution is to back up the vehicles from one direction and allow the vehicles from
opposite direction to cross the junction. If the traffic is too high, lots of vehicles may
have to be backed up to resolve the traffic jam. This technique is also known as „back up
cars‟ technique.
» Ensure that a process does not hold any other resources when it requests a
resource. This can be achieved by implementing the following set of rules/
guidelines in allocating resources to processes.
1. A process must request all its required resource and the resources should be
allocated before the process begins its execution.
2. Grant resource allocation requests from processes only if the process does not hold
a resource currently.
» Ensure that resource preemption (resource releasing) is possible at operating
system level. This can be achieved by implementing the following set of
rules/ guidelines in resources allocation and releasing:
1. Release all the resources currently held by a process if a request made by the
process for a new resource is not able to fulfill immediately.
2. Add the resources which are preempted (released) to a resource list describing the
resources which the process requires to complete its execution.
3. Reschedule the process for execution only when the process gets its old resources
and the new resource which is requested by the process.
» Task Synchronization Techniques:
The implementation
of binary semaphore
is OS kernel
dependent. Under
certain OS kernel it
is referred as mutex.
» Memory Requirements: The OS requires ROM memory for holding the OS files and it is
normally stored in a non-volatile memory like FLASH. OS also requires working
memory RAM for loading the OS services. Since embedded systems are memory
constrained, it is essential to evaluate the minimal ROM and RAM requirements for
the OS under consideration.
» Real-time Capabilities: It is not mandatory that the operating system for all embedded
systems need to be Real-time and all embedded Operating systems-are 'Real-time' in
behavior. The task/ process scheduling policies play an important role in the 'Real-
time' behavior of an OS. Analyze the real-time capabilities of the OS under
consideration and the standards met by the operating system for real-time capabilities.
» Kernel and Interrupt Latency: The kernel of the OS may disable interrupts
while executing certain services and it may lead to interrupt latency. For an
embedded system whose response requirements are high, this latency should
be minimal.
» Cost: The total cost for developing or buying the OS and maintaining it in terms of
commercial product and custom build needs to be evaluated before taking a decision
on the selection of OS.
» Development and Debugging Tools Availability: The availability of
development and debugging tools is a critical decision making factor in the
selection of an OS for embedded design. Certain Operating Systems may be
superior in performance, but the availability of tools for supporting the
development may be limited. Explore the different tools available for the OS
under consideration.
» After Sales: For a commercial embedded RTOS, after sales in the form of e-
mail, on-call services etc., for bug fixes, critical patch updates and support for
production issues, etc., should be analyzed thoroughly.
18CS44
MICROCONTROLLER
AND EMBEDDED
SYSTEMS
MODULE 5
INTEGRATION AND
TESTING OF EMBEDDED
» Integration testing of the embedded hardware and firmware is the immediate
step following the embedded hardware and firmware development.
96
» Both embedded hardware and firmware should be independently tested (Unit
Tested) to ensure their proper functioning.
97
INTEGRATION OF
HARDWARE AND FIRMWARE
» Integration of hardware and firmware deals with the embedding of firmware
into the target hardware board. It is the process of 'Embedding Intelligence' to
the product.
» The embedded processors/ controllers used in the target board may or may not
have built in code memory.
• For non-operating system based embedded products, if the processor/ controller
contain internal memory and the total size of the firmware is fitting into the
code memory area, the code memory is downloaded into the target controller/
processor.
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» If the processor/ controller does not support built in code memory or the size
of the firmware is exceeding the memory size supported by the target
processor/ controller, an external dedicated EPROM/ FLASH memory chip is
used for holding the firmware. This chip is interfaced to the processor/
controller.
» A variety of techniques are used for embedding the firmware into the target
board.
• The commonly used firmware embedding techniques for a non-OS based
embedded system are explained below.
• The non-OS based embedded systems store the firmware either in the on-chip
processor/ controller memory or off-chip memory (FLASHI/ NVRAM, etc.).
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» Out-of-Circuit Programming:
» The programming device will be under the control of a utility program running
on a PC. Usually the programming device is interfaced to the PC through RS-
232C/USB/Parallel Port Interface.
100
» The commands to control the device programmer are sent from the utility
program to the device programmer through the interface (see the following
Figure).
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10. Wait till the completion of programming operation (Till busy LED of
programmer is off)
11. Ensure that programming is success by checking the status LED on the
programmer (Usually 'Green' for success and 'Red' for error condition) or by
noticing the feedback from the utility program
12. Unlock the ZIF socket and take the device out of programmer.
» With ISP, programming is done 'within the system', meaning the firmware is
embedded into the target device without removing it from the target board.
• It is the most flexible and easy way of firmware embedding.
• The only pre- requisite is that the target device must have an ISP support.
Apart from the target board, PC, ISP cable and ISP utility, no other additional
hardware is required for ISP.
104
» In System Programming with SPI Protocol: Devices with SPI (Serial
Peripheral Interface) ISP (In System Programming) support contains a built-
in SPI interface and the on-chip EEPROM or FLASH memory. The primary
I/O lines involved in SPI-In System Programming are listed below:
» MOSI – Master Out Slave In
» PC acts as the master and target device acts as the slave in ISP.
• The program data is sent to the MOSI pin of target device and the device
acknowledgement is originated from the MISO pin of the device. SCK pin acts as the
clock for data transfer. A utility program can be developed on the PC side to generate
the above signal lines.
105
» Standard SPI-ISP utilities are freely available on the internet and, there is no
need for going for writing own program. For ISP operations, the target device
needs to be powered up in a pre-defined sequence.
1. Apply supply voltage between VCC and GND pins of target chip
106
5. The Code or Data array is programmed one byte at a time by supplying the
address and data together with the appropriate Write instruction. The
selected memory location is first erased before the new data is written. The
write cycle is self-timed and typically takes less than 2.5 ms at 5V
7. After successfully programming the device, set RST pin low or turn off the
chip power supply and turn it ON to commence the normal operation.
107
» The key player behind ISP is a factory programmed memory (ROM) called
'Boot ROM‟. The Boot ROM normally resides at the top end of code memory
space and it varies in the order of a few Kilo Bytes (For a controller with 64K
code memory space and lK Boot ROM, the Boot ROM resides at memory
location FC00H to FFFFH).
» It contains a set of Low-level Instruction APIs and these APIs allow the
processor/ controller to perform the FLASH memory programming, erasing
and Reading operations.
» The contents of the Boot ROM are provided by the chip manufacturer and the
same is masked into every device.
108
» In Application Programming (IAP):
» Updating calibration data, look-up tables, etc., which are stored in code
memory, are typical examples of IAP.
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» Use of Factory Programmed Chip:
110
» Firmware Loading for Operating System Based Devices:
» The 'Boot 1oader' for such embedded systems comes as pre-loaded or it can
be loaded to the memory using the various interface supported.
» Boot loader implements menu options for selecting the source for OS image to
load (Typical menu item examples are Load from FLASH ROM, Load from
Network, Load through UART, etc).
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» Once a communication link is established between the host and target machine,
the OS image can be directly downloaded to the FLASH memory of the
target device.
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BOARD BRING UP
» Once the firmware is embedded into the target board using one of the
programming techniques, then power up the board.
• You may be expecting the device functioning exactly in a way as you designed.
But in real scenario it need not be and if the board functions well in the first
attempt itself you are very lucky.
» Sometimes the first power up may end up in a messy explosion leaving the smell
of burned components behind. It may happen due to various reasons, like
Proper care was not taken in applying the power and power applied in reverse
polarity (+ve of supply connected to –ve of the target board and vice versa),
components were not placed in the correct polarity order (E.g. a capacitor on
the target board is connected to the board with +ve terminal to –ve of the
and vice versa), etc ... etc ...
board 114
» The prototype/ evaluation/ production version must pass through a varied set
of tests to verify that embedded hardware and firmware functions as
expected. Bring up process includes –
» basic hardware spot checks/ validations to make sure that the individual
components and busses/ interconnects are operational – which involves
checking power, clocks, and basic functional connectivity;
» basic firmware verification to make sure that the processor is fetching the
code and the firmware execution is happening in the expected manner;
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18CS44
MICROCONTROLLER AND
EMBEDDED SYSTEMS
MODULE 5
THE EMBEDDED SYSTEM
DEVELOPMENT
ENVIRONMENT
» The embedded system development environment consists of –
» Target hardware.
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THE INTEGRATED DEVELOPMENT
ENVIRONMENT (IDE)
118
» IDE is a software package which bundles
–
» a “Text Editor (Source Code Editor)”,
» “Linker”, and
» a “Debugger”.
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» Disassemblers/ Decompilers are deployed in reverse engineering.
» Simulator is a software tool use for simulating the various conditions for
checking the functionality of the application firmware.
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For example, if the product under development is a handheld device, to
test the functionalities of the various menu and user interfaces, a soft form
model of the product with all UI as given in the end product can be
developed in software.
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» Simulators:
» Simulators simulate the target hardware and the firmware execution can be
inspected using simulators.
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» Advantages of Simulator Based Debugging: Simulator based debugging
techniques are simple and straightforward .The major advantages of simulator
based firmware debugging techniques are explained below.
» No Need for Original Target Board: User only needs to know about the memory map of
various devices within the target board; Real hardware is not required, hence,
firmware development can start well in advance – This saves development time.
» Simulate I/O Peripherals: Option to simulate various I/O peripherals; Can edit the
values for I/O registers – Eliminates the need for connecting I/O devices for
debugging the firmware.
» Simulates Abnormal Conditions: With simulator's simulation support you can input any
desired value for any parameter during debugging the firmware and can observe the
control flow of firmware.
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» Limitations of Simulator Based Debugging: Some of the limitations of
simulator-based debugging are explained below:
» Deviation from Real Behavior: Developer may not be able to debug the
firmware under all possible combinations of input; Under certain operating
conditions, we may get some particular result and it need not be the same
when the firmware runs in a production environment.
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» Emulators and Debuggers:
» Hardware debugging deals with the monitoring of various bus signals and
checking the status lines of the target hardware.
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» Firmware debugging is performed to figure out the bug or the error in the
firmware which creates the unexpected behavior.
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» Inline Breakpoint Based Firmware Debugging: Inline breakpoint based
debugging is another primitive method of firmware debugging. Within the
firmware where you want to ensure that firmware execution is reaching up to
a specified point, insert an inline debug code immediately after the point. The
debug code is a printf() function which prints a string given as per the
firmware.
» You can insert debug codes (printf()) commands at each point where you
want to ensure the firmware execution is covering that point. Cross-
compile the source code with the debug codes embedded within it. Burn
the corresponding hex file into the EEPROM.
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» Monitor Program Based Firmware Debugging: Monitor program based
firmware debugging is the first adopted invasive method for firmware
debugging (see the following Figure). In this approach a monitor program
which acts as a supervisor is developed.
» The monitor program controls the downloading of user code into the code
memory, inspects and modifies register/ memory locations; allows single
stepping of source code, etc.
» The monitor program always listens to the serial port of the target device and
according to the command received from the serial interface it performs
command specific actions like firmware downloading, memory inspection/
modification, firmware single stepping and sends the debug information .
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The monitor program contains the following set of minimal features:
1. Command set interace to establish communication with the debugging application
2. Firmware download option to code memory
3. Examine and modify processor registers and working memory (RAM)
4. Single step program execution
5. Set breakpoints in firmware execution
6. Send debug information to debug application running on host machine. 13
1
» In Emulator (ICE) Based Firmware Debugging: The
Circuit terms
'Simulator' and 'Emulator' are little bit confusing and sounds similar. Though
their basic functionality is the same-"Debug the target firmware", the way in
which they achieve this functionality is totally different. The simulator
'simulates' the target board CPU and the emulator 'emulates' the target board
CPU.
'Simulator' is a software application that precisely duplicates (mimics) the
target CPU and simulates the various features and instructions supported
by the target CPU.
'Emulator' is a self-contained hardware device which emulates the target
CPU. The emulator hardware contains necessary emulation logic and it is
hooked to the debugging application running on the development PC
on
one end.
other end and connects to the target board through some interface on
The Emulator POD (see the following Figure) forms the heart of any
emulator system and it contains the following functional units.
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» On Chip Firmware Debugging (OCD): Advances in semiconductor
technology has brought out new dimensions to target firmware debugging.
Today almost all processors/controllers incorporate built in debug modules
called On Chip Debug (OCD) support. Though OCD adds silicon complexity
and cost factor, from a developer perspective it is a very good feature
supporting fast and efficient firmware debugging. The On Chip Debug
facilities integrated to the processor/ controller are chip vendor dependent and
most of them are proprietary technologies like Background Debug Mode
(BDM), OnCE, etc.
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TARGET HARDWARE DEBUGGING
» Even though the firmware is bug free and everything is intact in the board, your
embedded product need not function as per the expected behavior in the first
attempt for various hardware related reasons like dry soldering of components,
missing connections in the PCB due to any un-noticed errors in the PCB layout
design, misplaced components, signal corruption due to noise, etc. The only
way to sort out these issues and figure out the real problem creator is debugging
the target board.
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» The various hardware debugging tools used in Embedded Product
Development are explained below.
» With a magnifying glass (lens), the surface of the target board can be examined
thoroughly for dry soldering of components, missing components, improper
placement of components, improper soldering, track (PCB connection)
damage, short of tracks, etc. Nowadays high quality magnifying stations are
available for visual inspection.
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» Multimeter:
» Any multimeter will work over a specific range for each measurement. A
multimeter is the most valuable tool in the tool kit of an embedded hardware
developer. It is the primary debugging tool for physical contact based
hardware debugging and almost all developers start debugging the hardware
with it.
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» Digital CRO:
» CRO is a very good tool in analyzing interference noise in the power supply
line and other signal lines. Monitoring the crystal oscillator signal from the
target board is a typical example of the usage of CRO.
» Various measurements like phase, amplitude, etc. are also possible with CROs.
Tektronix, Agilent, Philips, etc. are the manufacturers of high precision good
quality digital CROs.
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» Logic
Analyzer:
» A logic analyzer is the big brother of digital CRO. Logic analyzer is used for
capturing digital data (logic 1 and 0) from a digital circuitry whereas CRO is
employed in capturing all kinds of waves including logic signals.
» A logic analyzer contains special connectors and clips which can be attached to
the target board for capturing digital data. In target board debugging
applications, a logic analyzer captures the states of various port pins, address
bus and data bus of the target processor/ controller, etc.
» Logic analyzers give an exact reflect on of what happens when a particular line
of firmware is running. This is achieved by capturing the address line logic
and data line logic of target hardware. Most modem logic analyzers contain
provisions for storing captured data, selecting a desired region of the
captured waveform, zooming selected region of the captured waveform,
etc.
14
1
» Function Generator:
» Sometimes the target board may require some kind of periodic waveform with
a particular frequency as input to some part of the board. Thus, in a
debugging environment, the function generator serves the purpose of
generating and supplying required signals.
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BOUNDARY SCAN
» As the complexity of the hardware increase, the number of chips present in the
board and the interconnection among them may also increase.
» The device packages used in the PCB become miniature to reduce the total board
space occupied by them and multiple layers may be required to route the
interconnections among the chips.
» With miniature device packages and multiple layers for the PCB it will be very
difficult to debug the hardware using magnifying glass, multimeter, etc. to
check the interconnection among the various chips.
143
» Boundary scan is a technique used for testing the interconnection among
the
various chips.
» Chips which support boundary scan associate a boundary scan cell with each
pin of the device.
» A JTAG(Joint Test Action Group) port contains the five signal lines, namely,
TDI, TDO, TCK, TRST and TMS form the Test Access Port (TAP) for a JTAG
supported chip.
» The PCB also contains a TAP for connecting the JTAG signal lines to the
external world.
» The TDO pin of the first device is connected to the TDI pin of the
second
device.
» In this way all devices are interconnected and the TDO pin of the last
JTAG device is connected to the TDO pin of the TAP of the PCB.
» The clock line TCK and the Test Mode Select (TMS) line of the devices are
connected to the clock line and Test mode select line of the Test Access Port
of the PCB respectively. This forms a boundary scan path.
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» The following Figure illustrates the same.
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