Digital System Design

System Design-Part-II

A. Dheeraj
Assistant Professor,
ECE Dept.
 Mealy and Moore Machines
Sl.No Moore Machine Mealy Machine
1 Output depends only upon present Output depends on present state as
state. well as present input.

2 If input changes, output does If input changes, output also

change. changes.
3 More number of states are required. Less number of states are required.

4 There is less hardware requirement There is more hardware requirement

for circuit implementation. for circuit implementation.
5 They react slower to inputs(One They react faster to inputs.
clock cycle later).
6 Synchronous output and state Asynchronous output generation.
generation.
7 Output is placed on states. Output is placed on transitions.

8 Easy to design. It is difficult to design.

State Diagrams
State Diagrams-cntd
 e.g1 Pattern Detector
• 0110 pattern detector
• Input sequence : 0 1 1 0 0 1 1 0 1 1 0 1 1 0
• Output : non-overlapping 0 0 0 1 0 0 0 1 0 0 0 0 0 1
• overlapping 0 0 0 1 0 0 0 1 0 0 1 0 0 1

• Pattern can be detected as a overlapping sequence and non-overlapping

sequence.
• Non-overlapping sequence always starts with beginning of pattern after
detection of the pattern.
• Overlapping sequence can starts with already some of the sequence
detection from previous pattern detection.
0110 pattern detector using Mealy Machine
1/0 Overlapping

0/1

S0/ 00 0/0 0/0

1/0

S1/ 01
S3/ 11 0/1
0/0

1/0
S2/ 10
1/0

State Diagram
 State Table and State Transition Table
Present State Next State Output
X=0 X=1 X=0 X=1
S0 S1 S0 0 0
S1 S1 S2 0 0
S2 S1 S3 0 0
S3 S0/S1 S0 1 0
 State Transition Table
Present Input Next State Output
State X A+ B+ Z
A B
0 0 0 0 1 0
0 0 1 0 0 0
0 1 0 0 1 0
0 1 1 1 0 0
1 0 0 0 1 0
1 0 1 1 1 0
1 1 0 0 1/0 0 1
1 1 1 0 0 0
 Implementation
Assignment-1
• Using gates
• Using Multiplexer
• Using Programmable logic Devices(PLDs)
• Using PROM
• PLDs are :
• PLA,PAL
Implementation using Programmable ROM of 0110 pattern
detector

Presen In Next Ou
t State pu State tpu
A B t A+ t
X B+ Z
0 0 0 0 1 0
0 0 1 0 0 0
0 1 0 0 1 0
0 1 1 1 0 0
1 0 0 0 1 0
1 0 1 1 1 0
1 1 0 0 1 1
/0 0
1 1 1 0 0 0
Programmable Logic Array(PLA) of 0110
pattern Detector
Presen In Next Ou
t State pu State tpu
A B t A+ t
X B+ Z
0 0 0 0 1 0
0 0 1 0 0 0
0 1 0 0 1 0
0 1 1 1 0 0
1 0 0 0 1 0
1 0 1 1 1 0
1 1 0 0 1 1
/0 0
1 1 1 0 0 0
Programmable Array Logic(PAL) of 0110
Pattern Detector
Presen In Next Ou
t State pu State tpu
A B t A+ t
X B+ Z
0 0 0 0 1 0
0 0 1 0 0 0
0 1 0 0 1 0
0 1 1 1 0 0
1 0 0 0 1 0
1 0 1 1 1 0
1 1 0 0 1 1
/0 0
1 1 1 0 0 0
Differences Between PLA and PAL
BASIS FOR COMPARISON PLA PAL

Stands for Programmable Logic Array Programmable Array Logic

Construction Programmable array of AND and OR Programmable array of AND gates and
gates. fixed array of OR gates.

Availability Less prolific More readily available

Flexibility Provides more programming Offers less flexibility, but more likely
flexibility. used.

Cost Expensive Intermediate cost

Number of functions Large number of functions can be Provides the limited number of
implemented. functions.

Speed Slow High

0110 pattern detector using Moore
Machine
1

1 So/0 0
0

S1/0
S4/1
1
0
1

0
1 S2/0
S3/0

0
1
State Transition Table for Moore Machine
Present State Input Next State Output
A B C X A+ B+ C+ Z

0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 1 0 0 0 1 0
0 0 1 1 0 0 1 0

0 1 0 0 0 0 1 0

0 1 0 1 0 0 1 0

0 1 1 0 0 0 1 0

0 1 1 1 0 0 1 0

1 0 0 0 0 0 1 1

1 0 0 1 0 0 0/010 1

1 0 1 X 0 0 0 0
1 1 X
1111 pattern detector
 Vending Machine Controller (System Design-2)
reset
VCC
BCD SWITCH RES
1 2 3 S2 RDY
4 5 S1
S0

os1
VENDING os2
MACHINE os3
CA ( coin accepted)
RDY os4
Coin os5
inlet
CCA (clear coin
acceptance)
 Steps to get the product
• 1. WAIT for RDY lamp to glow.
• 2. Set BCD Switch to the required selection.
• 3. Insert the correct coin and collect the
merchandise.
clk

RES

RDY
s2s1s0 100 101

os4

os5
cca
One hot controller representation
State Diagram of Vending Machine
controller using one hot controller
 State transition table of vending machine

A B C D E F C S S S A B C D E F R C O O O O O
A 2 1 0 + + + + + + D C S S S S S
Y A 1 2 3 4 5
1 0 0 0 0 0 0 X X X 1 0 0 0 0 0 1 0 0 0 0 0 0
1 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0
1 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0
1 0 1 1 0 0 0 1 0 0 1 0
1 1 0 0 0 0 0 0 1 0 1 0
1 1 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0
1 0 0 0 1 0 0 0 0 0 1 0
1 1 1 0 1 0
1 1 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0
0 1 0 0 0 0 X X X X 1 0 0 0 0 0 0 1 1 0 0 0 0
0 0 1 0 0 0 X X X X 1 0 0 0 0 0 0 1 0 1 0 0 0
0 0 0 1 0 0 X X X X 1 0 0 0 0 0 0 1 0 0 1 0 0
0 0 0 0 1 0 X X X X 1 0 0 0 0 0 0 1 0 0 0 1 0
0 0 0 0 0 1 X X X X 1 0 0 0 0 0 0 1 0 0 0 0 1
Implementation of Vending Machine
Implementation of vending machine using ROM Content Table
 ASM CHARTS Basics
Following are the three basic components of ASM charts.
• State box
• Decision box
• Conditional output box

ASM is abbreviate as Algorithmic State Machine,

Defn: Hardware Flow Chart accounting for each clock cycle and
each signal, both input and output.

Implement the controller part of digital system using ASM

Charts.
• State box is represented in rectangular shape. Each state box
represents one state of the sequential circuit. The symbol of
state box is shown in the following figure.
• It is having Multiple entry points and one exit point. Name of
the state is placed to the left of state box. The unconditional
outputs corresponding to that state can be placed inside state
box. Moore state machine outputs can also be placed inside
state box.
• Decision box
• Decision box is represented in diamond shape. The symbol of decision
box is shown in the following figure.

• It is having one entry point and 2 or more exit paths. The inputs or
Boolean expressions can be placed inside the decision box, which are to
be checked whether they are true or false. If the condition is true, then
it will prefer path1. Otherwise, it will prefer path2.
• Conditional output box
• Conditional output box is represented in oval shape. The symbol of
conditional output box is shown in the following figure.

• It is also having one entry point and one exit point. The conditional outputs
can be placed inside state box. In general, Mealy state machine outputs are
represented inside conditional output box. So, based on the requirement,
we can use the above components properly for drawing ASM charts.
 BUS Arbiter

RA
2 GA
BUS
Arbiter GB
RB

CLK
 reset

IDLE

T
RA

F
F GA
RB
T

T
GB RA

F
T T
RB RB F
F
F T
RA
2 BUS Arbiter ASM CHART
 ASM Table
STATE Present State Condition Next State Output
X Y X+ Y+
IDLE 0 0 RA 0 1 -

RA’.RB 1 0

RA’.RB’ 0 0

Grant 0 1 RA 0 1 GA
A
RA’.RB’ 0 0

RA’.RB 1 0

Grant 1 0 RB 1 0 GB
B
RB’.RA 0 1

RB’.RA’ 0 0
Implementation using multiplexers
 Traffic Light Controller

2 Way TLC

3 Way TLC

4 Way TLC
 States and Traffic Flow of TLC
M1G MTR M1G MTR

s1 s1

SR M2G SR M2Y
s2 s2

M1G MTG M1G MTY

s1 s1

SR SR M2R
M2R
s2 s2
M1Y MTR M1R MTR

s1 s1

SR SG M2R
M2R
s2 s2

M1R MTR

s1

SY M2Y
s2
 Algorithm for TLC 3-way free left
1. RESET, START TIMER
2. M1G,M2G,MTR,SR
3. If t>=Tm and S1+S2 is True
4. M1G,M2Y,MTR,SR
5. AFTER TY , M1GM2R,MTG,SR
6. AFTER TS , M1G,M2R,MTY,SR
7. AFTER TY AND IF S2=0 GO TO 2
8. ELSE GO TO 9
9. M1Y,M2R,MTR,SR
10. AFTER TY, M1R,M2R,MTR,SG
11. AFTER TS, M1R,M2R,MTR,SY
12. AFETER TY, GO TO 2
 TLC 3way free left ASM Chart

Start timer M1G,M2R, M1Y,M2R,

Start
MTG,SR MTR,SR
timer
M1G,M2G,
MTR,SR
F TY F
F TS
T
TM.(S1+S2) T M1G,M2G,
Start MTR,SR
T Start timer
Start timer
F
timer TY
M1G,M2R, M1R,M2R,
MTY,SR MTR,SG T
M1G,M2Y,
MTR,SR F Start
F timer
TY TS
F T
TY T
T Start S1
S2 T
F timer
Start Start
timer timer
 ASM Table for TLC 3 way free left
STATE
NAME PS Cond NS ST M1G M1Y M1R M2G M2Y M2R SG SY SR MTG MTY MTR

ABC A+ B+ C+
S0 000 - 001 1 0 0 0 0 0 0 0 0 0 0 0 0

S1 001 (TM.S1+S2)’
(TM.S1+S2)
001 0 1 0 0 1 0 0 0 0 1 0 0 1
010 1
S2 010 TY’ 010 0 1 0 0 0 1 0 0 0 1 0 0 1
TY 011 1
S3 011 TS’ 011 0 1 0 0 0 0 1 0 0 1 1 0 0
TS 100 1
S4 100 TY’ 100 0 1 0 0 0 0 1 0 0 1 0 1 0
TY.S2’ 001 1
TY.S2 101 1
S5 101 TY’ 101 0 0 1 0 0 0 1 0 0 1 0 0 1
TY 110 1
S6 110 TS’ 110 0 0 0 1 0 0 1 1 0 0 0 0 1
TS 111 1
S7 111 TY’ 111 0 0 0 1 0 0 1 0 1 0 0 0 1
TY 001 1
IMPLEMENTATION
 DICE GAME

No. of Attempts
DICE
99
VALUE

99
Total Score Free Running Mode

Throw Dice Mode

Start
 DICE Game Algorithm
1. PUSH “Start” to Start the Game.
2. CLEAR Score, No of attempts
3. Throw Dice using the TD Switch
4. If 9>DICE>4 i) ADD Dice Value to Total Score
ii) Increment No of Attempts
iii) If Total Score<99, go to 3
iv)If Score=99 STOP
5. If DICE>= 9 i) ADD Dice Value to Total Score, Add a bonus of 10
ii) Increment No of Attempts
iii) If Total Score<99, go to 3
iv)If Score=99 STOP
6. If DICE<=4 i) ADD Dice Value to Total Score, subtract 10 as penalty of 10
ii) Increment No of Attempts
iii) If Total Score<99, go to 3
iv)If Score=99 STOP

2,3,4 ---penalty of 10
9,10,11,12 – bonus of 10
5,6,7,8 – normal score
 Data Blocks of DICE GAME
Data In=2

load2 D LD CNT_Enable
Presettable
4-bit
counter
clk

Compare Dice value

1 2 Display
with 12

DICE Value

Dice>=9
DICE Value
DICE Comparator Dice<=4
 LDS
ADDS
DICE Value CLRS

ADD/ CLR
10 START
Subtractor

99 Presetable
Register
Preset

Start
No of Attempts
ENOTA Display
CLR
9 9
Clk Counter

Total Score>99
Total Score 9 9
Comparator
Total Total Score
Score Total Score<10
Display
 DICE GAME CONTROLLER ASM CHART

RESET
DICE F
ADDS <=4
Loading2
T

LDS,ENOFA SCORE T
F <10
Start

F CLRS
DICE S,ADDS’
IDLE1 >=9
LDS
T
IDLE2
T T SCORE F
TD >89

F Preset S,ADDS T
TD
CNT_Enable F
LDS
IDLE1
Microprogrammed Design of Digital System

T
P B

F T
Q
 MICROPROGRAMMED ROM TABLE
SQDA

PRESENT QUALIFIER TRUE FALSE OUTPUT

ADDRESS INDEX ADDRESS ADDRESS INDEX
00 0 01 10 01

01 0 00 00 10

10 0 11 11 00

11 1 00 11 11

Size of microprogrammed ROM = 2^2 x 7 bits

Sixe of conventional ROM = 2^4 x 7 bits

 Implementation of μROM (SQDA)
No output
A
decoder B
PRESENT C
ADDRESS TA
MICRO- 0
2 PROGRAMMED 1
FA Next
ROM address
P
n 0
1
Q

D
DFF
CLK
Microprogrammed Table using SQSA
Present Qualifier T/F Next Output
Address Index(n) Address Index code

00 00 1 10 10

01 10 0 01 11

10 01 1 00 01

11 00 1 01 00

Size of microprogammed using SQSA is 2^2 x 7

 Implementing using SQSA

B
decod
er C
Output A
Code NO
T
Present P
Address Q
Microprogram Qualifier index =n
med ROM
T/F

Next
Address EXNOR

Next LOAD
Address
Counter
CNT
 Dice Game Controller using μROM

RESET
DICE F
ADDS <=4
Loading2
T

LDS,ENOFA SCORE T
F <10
Start

F CLRS
DICE S,ADDS’
IDLE1 >=9
LDS
T
IDLE2
T T SCORE F
TD >89

Preset S,ADDS
TD
CNT_Enable
LDS
IDLE1
μProgrammed table for DICE Game Controller
Present Qualifier True False Output
Address n=3 address Address Code
0 0 1 0 1
1 1 3 2 0 Qualifier:
Start -- 0
2 0 2 2 2
TD -- 1
3 0 4 4 3 DICE<=4 -- 2
4 3 6 5 5 DICE>=9 -- 3
5 2 10 14 0 Score<10 -- 4
Score >= 89 -- 5
6 5 7 9 0
7 0 8 8 0 Output Code:
8 0 14 14 4 No output 0
9 0 8 8 6 LOAD2 1
10 4 11 12 0 CNT_ENABLE 2
ADDS 3
11 0 14 14 7 LDS 4
12 0 13 13 8 LDS,ENOFA 5
13 0 14 14 4 S,ADDS 6
14 1 14 1 0 CLRS 7
S,ADDS’ 8
 Sizes Comparison
• Conventional ROM = 2^9 x 11 or 2^9 x 6

• Microprogrammed ROM (SQDA)= 2^4 x 19 or

2^4 x 14

• Microprogrammed ROM (SQSA) = 2^4 x 16 or

2 ^4 x 11 bits