Module2 RTOS
Module2 RTOS
Operating System Concepts – 10th Edition 5.2 Silberschatz, Galvin and Gagne
Objectives
Operating System Concepts – 10th Edition 5.3 Silberschatz, Galvin and Gagne
Basic Concepts
Operating System Concepts – 10th Edition 5.4 Silberschatz, Galvin and Gagne
Histogram of CPU-burst Times
Operating System Concepts – 10th Edition 5.5 Silberschatz, Galvin and Gagne
CPU Scheduler
The CPU scheduler selects from among the processes
in ready queue, and allocates a CPU core to one of
them
• Queue may be ordered in various ways
CPU scheduling decisions may take place when a
process:
1. Switches from running to waiting state(I/O
request)
2. Switches from running to ready state(Interrupt)
3. Switches from waiting to ready(Completion of I/O)
4. Terminates
For situations 1 and 4, there is no choice in terms of
scheduling. A new process (if one exists in the ready
queue) must be selected for execution.
For situations 2 and 3, however, there is a choice.
Operating System Concepts – 10th Edition 5.6 Silberschatz, Galvin and Gagne
Preemptive and Nonpreemptive Scheduling
Operating System Concepts – 10th Edition 5.7 Silberschatz, Galvin and Gagne
Preemptive Scheduling and Race Conditions
Operating System Concepts – 10th Edition 5.8 Silberschatz, Galvin and Gagne
Dispatcher
Dispatcher module gives control
of the CPU to the process
selected by the CPU scheduler;
this involves:
• Switching context
• Switching to user mode
• Jumping to the proper
location in the user program
to restart that program
Dispatch latency – time it takes for
the dispatcher to stop one
process and start another
running
Operating System Concepts – 10th Edition 5.9 Silberschatz, Galvin and Gagne
Scheduling Criteria
Operating System Concepts – 10th Edition 5.10 Silberschatz, Galvin and Gagne
Scheduling Algorithm Optimization Criteria
Operating System Concepts – 10th Edition 5.11 Silberschatz, Galvin and Gagne
First- Come, First-Served (FCFS) Scheduling
Operating System Concepts – 10th Edition 5.12 Silberschatz, Galvin and Gagne
FCFS Scheduling (Cont.)
P2 P3 P1
0 3 6 30
Operating System Concepts – 10th Edition 5.13 Silberschatz, Galvin and Gagne
Shortest-Job-First (SJF) Scheduling
Operating System Concepts – 10th Edition 5.14 Silberschatz, Galvin and Gagne
Example of SJF
P4 P1 P3 P2
0 3 9 16 24
Operating System Concepts – 10th Edition 5.15 Silberschatz, Galvin and Gagne
Determining Length of Next CPU Burst
Commonly, α set to ½
Operating System Concepts – 10th Edition 5.16 Silberschatz, Galvin and Gagne
Prediction of the Length of the Next CPU Burst
Operating System Concepts – 10th Edition 5.17 Silberschatz, Galvin and Gagne
Examples of Exponential Averaging
=0
• n+1 = n
• Recent history does not count
=1
• n+1 = tn
• Only the actual last CPU burst counts
If we expand the formula, we get:
n+1 = tn+(1 - ) tn -1 + …
+(1 - )j tn -j + …
+(1 - )n +1 0
Operating System Concepts – 10th Edition 5.18 Silberschatz, Galvin and Gagne
Shortest Remaining Time First Scheduling
Operating System Concepts – 10th Edition 5.19 Silberschatz, Galvin and Gagne
Example of Shortest-remaining-time-first
P1 P2 P4 P1 P3
0 1 5 10 17 26
Operating System Concepts – 10th Edition 5.20 Silberschatz, Galvin and Gagne
Round Robin (RR)
Each process gets a small unit of CPU time (time
quantum q), usually 10-100 milliseconds. After this
time has elapsed, the process is preempted and
added to the end of the ready queue.
If there are n processes in the ready queue and the
time quantum is q, then each process gets 1/n of the
CPU time in chunks of at most q time units at once.
No process waits more than (n-1)q time units.
Timer interrupts every quantum to schedule next
process
Performance
• q large FIFO (FCFS)
• q small RR
Note that q must be large with respect to context
switch, otherwise overhead is too high
Operating System Concepts – 10th Edition 5.21 Silberschatz, Galvin and Gagne
Example of RR with Time Quantum = 4
Operating System Concepts – 10th Edition 5.22 Silberschatz, Galvin and Gagne
Time Quantum and Context Switch Time
Operating System Concepts – 10th Edition 5.23 Silberschatz, Galvin and Gagne
Turnaround Time Varies With The Time Quantum
Operating System Concepts – 10th Edition 5.24 Silberschatz, Galvin and Gagne
Priority Scheduling
Operating System Concepts – 10th Edition 5.25 Silberschatz, Galvin and Gagne
Example of Priority Scheduling
Operating System Concepts – 10th Edition 5.26 Silberschatz, Galvin and Gagne
Priority Scheduling w/ Round-Robin
Operating System Concepts – 10th Edition 5.27 Silberschatz, Galvin and Gagne
Multilevel Queue
The ready queue consists of multiple queues
Multilevel queue scheduler defined by the following
parameters:
• Number of queues
• Scheduling algorithms for each queue
• Method used to determine which queue a
process will enter when that process needs
service
• Scheduling among the queues
Operating System Concepts – 10th Edition 5.28 Silberschatz, Galvin and Gagne
Multilevel Queue
With priority scheduling, have separate queues for each
priority.
Schedule the process in the highest-priority queue!
Operating System Concepts – 10th Edition 5.29 Silberschatz, Galvin and Gagne
Multilevel Queue
Operating System Concepts – 10th Edition 5.30 Silberschatz, Galvin and Gagne
Multilevel Feedback Queue
A process can move between the various queues.
Multilevel-feedback-queue scheduler defined by the
following parameters:
• Number of queues
• Scheduling algorithms for each queue
• Method used to determine when to upgrade a
process
• Method used to determine when to demote a
process
• Method used to determine which queue a process
will enter when that process needs service
Aging can be implemented using multilevel feedback
queue
Operating System Concepts – 10th Edition 5.31 Silberschatz, Galvin and Gagne
Example of Multilevel Feedback Queue
Three queues:
• Q0 – RR with time quantum 8
milliseconds
• Q1 – RR time quantum 16
milliseconds
• Q2 – FCFS
Scheduling
• A new process enters queue Q0
which is served in RR
When it gains CPU, the process
receives 8 milliseconds
If it does not finish in 8
milliseconds, the process is moved
to queue Q1
• At Q1 job is again served in RR
and receives 16 additional
milliseconds
If it still does not complete, it is
preempted and moved to queue Q2
Operating System Concepts – 10th Edition 5.32 Silberschatz, Galvin and Gagne
Motivation- Threads
Operating System Concepts – 10th Edition 5.33 Silberschatz, Galvin and Gagne
Single and Multithreaded Processes
Operating System Concepts – 10th Edition 5.34 Silberschatz, Galvin and Gagne
Benefits
Operating System Concepts – 10th Edition 5.35 Silberschatz, Galvin and Gagne
Multicore Programming
Multicore or multiprocessor systems puts pressure on
programmers, challenges include:
• Dividing activities
• Balance
• Data splitting
• Data dependency
• Testing and debugging
Parallelism implies a system can perform more than one
task simultaneously
Concurrency supports more than one task making
progress
• Single processor / core, scheduler providing
concurrency
Operating System Concepts – 10th Edition 5.36 Silberschatz, Galvin and Gagne
Concurrency vs. Parallelism
Concurrent execution on single-core system:
Operating System Concepts – 10th Edition 5.37 Silberschatz, Galvin and Gagne
Multicore Programming
Types of parallelism
• Data parallelism – distributes subsets of the same
data across multiple cores, same operation on
each
• Task parallelism – distributing threads across
cores, each thread performing unique operation
Operating System Concepts – 10th Edition 5.38 Silberschatz, Galvin and Gagne
Data and Task Parallelism
Operating System Concepts – 10th Edition 5.39 Silberschatz, Galvin and Gagne
Amdahl’s Law
Identifies performance gains from adding additional cores
to an application that has both serial and parallel
components
S is serial portion
N processing cores
Operating System Concepts – 10th Edition 5.40 Silberschatz, Galvin and Gagne
User Threads and Kernel Threads
Operating System Concepts – 10th Edition 5.41 Silberschatz, Galvin and Gagne
User and Kernel Threads
Operating System Concepts – 10th Edition 5.42 Silberschatz, Galvin and Gagne
Multithreading Models
Many-to-One
One-to-One
Many-to-Many
Operating System Concepts – 10th Edition 5.43 Silberschatz, Galvin and Gagne
Many-to-One
Operating System Concepts – 10th Edition 5.44 Silberschatz, Galvin and Gagne
One-to-One
Operating System Concepts – 10th Edition 5.45 Silberschatz, Galvin and Gagne
Many-to-Many Model
Allows many user level threads to be mapped to many
kernel threads
Allows the operating system to create a sufficient
number of kernel threads
Windows with the ThreadFiber package
Otherwise not very common
Operating System Concepts – 10th Edition 5.46 Silberschatz, Galvin and Gagne
Two-level Model
Similar to M:M, except that it allows a user thread to be
bound to kernel thread
Operating System Concepts – 10th Edition 5.47 Silberschatz, Galvin and Gagne
Multiple-Processor Scheduling
CPU scheduling more complex when multiple CPUs are
available
Multiprocess may be any one of the following
architectures:
• Multicore CPUs
• Multithreaded cores
• NUMA systems
• Heterogeneous multiprocessing
Operating System Concepts – 10th Edition 5.48 Silberschatz, Galvin and Gagne
Multiple-Processor Scheduling
Operating System Concepts – 10th Edition 5.49 Silberschatz, Galvin and Gagne
Multicore Processors
Recent trend to place multiple processor cores on same
physical chip
Faster and consumes less power
Multiple threads per core also growing
• Takes advantage of memory stall to make progress
on another thread while memory retrieve happens
Figure
Operating System Concepts – 10th Edition 5.50 Silberschatz, Galvin and Gagne
Multithreaded Multicore System
Each core has > 1 hardware threads.
If one thread has a memory stall, switch to another
thread!
Figure
Operating System Concepts – 10th Edition 5.51 Silberschatz, Galvin and Gagne
Multithreaded Multicore System
Chip-multithreading
(CMT) assigns each core
multiple hardware
threads. (Intel refers to
this as hyperthreading.)
On a quad-core system
with 2 hardware threads
per core, the operating
system sees 8 logical
processors.
Operating System Concepts – 10th Edition 5.52 Silberschatz, Galvin and Gagne
Multithreaded Multicore System
Two levels of
scheduling:
1. The operating
system deciding
which software
thread to run on a
logical CPU
Operating System Concepts – 10th Edition 5.53 Silberschatz, Galvin and Gagne
Multiple-Processor Scheduling – Load Balancing
Operating System Concepts – 10th Edition 5.54 Silberschatz, Galvin and Gagne
Multiple-Processor Scheduling – Processor Affinity
Operating System Concepts – 10th Edition 5.55 Silberschatz, Galvin and Gagne
NUMA and CPU Scheduling
If the operating system is NUMA-aware, it will assign
memory closes to the CPU the thread is running on.
Operating System Concepts – 10th Edition 5.56 Silberschatz, Galvin and Gagne