Digital Logic Design

Chapter 2

Boolean Algebra and Logic Gate

Digital Logic Design

 Operator Precedence
 The operator precedence for evaluating Boolean
Expression is
 Parentheses
 NOT

 AND

 OR

 Examples
 x y' + z

 (x y + z)'

Digital Logic Design

 2.5 Boolean Functions
 A Boolean function
 Binary variables

 Binary operators OR and AND

 Unary operator NOT

 Parentheses

 Examples
 F1= x y z'
 F2 = x + y'z
 F3 = x' y' z + x' y z + x y'
 F4 = x y' + x' z

Digital Logic Design

 Boolean Functions
 The truth table of 2n entries (n=number of variables)

x y z F1 F2 F3 F4
0 0 0 0 0 0 0
0 0 1 0 1 1 1
0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0

 Two Boolean expressions may specify the same function

 F3 = F4
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Digital Logic Design

 Boolean Functions
 Implementation with logic gates
 F4 is more economical

F2 = x + y'z

F3 = x' y' z + x' y z + x y'

F4 = x y' + x' z

Digital Logic Design

 Algebraic Manipulation
 When a Boolean expression is implemented with logic gates, each
term requires a gate and each variable (Literal) within the term
designates an input to the gate. (F3 has 3 terms and 8 literal)
 To minimize Boolean expressions, minimize the number of
literals and the number of terms → a circuit with less equipment
 It is a hard problem (no specific rules to follow)

 Example 2.1
1. x(x'+y) = xx' + xy = 0+xy = xy
2. x+x'y = (x+x')(x+y) = 1 (x+y) = x+y
3. (x+y)(x+y') = x+xy+xy'+yy' = x(1+y+y') = x
4. xy + x'z + yz = xy + x'z + yz(x+x') = xy + x'z + yzx + yzx' = xy(1+z) +
x'z(1+y) = xy +x'z

Digital Logic Design

 Complement of a Function
 An interchange of 0's for 1's and 1's for 0's in the value of F
 By DeMorgan's theorem

 (A+B+C)' = (A+X)' let B+C = X

= A'X' by theorem 5(a) (DeMorgan's)
= A'(B+C)' substitute B+C = X
= A'(B'C') by theorem 5(a) (DeMorgan's)
= A'B'C' by theorem 4(b) (associative)
 Generalization: a function is obtained by interchanging AND
and OR operators and complementing each literal.
 (A+B+C+D+ ... +F)' = A'B'C'D'... F'
 (ABCD ... F)' = A'+ B'+C'+D' ... +F'

Digital Logic Design

 2.6 Canonical and Standard Forms
Minterms and Maxterms
 A minterm (standard product): an AND term consists of
all literals in their normal form or in their complement
form.
 For example, two binary variables x and y,
» xy, xy', x'y, x'y'
 It is also called a standard product.
 n variables can be combined to form 2n minterms.

 A maxterm (standard sums): an OR term

 It is also call a standard sum.

 2n maxterms.

Digital Logic Design

 Minterms and Maxterms
 Each maxterm is the complement of its corresponding
minterm, and vice versa.

Digital Logic Design

 Minterms and Maxterms
 An Boolean function can be expressed by
 A truth table

 Sum of minterms for each combination of variables that

produces a (1) in the function.
 f1 = x'y'z + xy'z' + xyz = m1 + m4 +m7 (Minterms)

 f2 = x'yz+ xy'z + xyz'+xyz = m3 + m5 +m6 + m7 (Minterms)

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Digital Logic Design

 Minterms and Maxterms
 The complement of a Boolean function
 The minterms that produce a 0

 f1' = m0 + m2 +m3 + m5 + m6 = x'y'z'+x'yz'+x'yz+xy'z+xyz'

 f1 = (f1')'
 = (x+y+z)(x+y'+z) (x+y'+z') (x'+y+z')(x'+y'+z) = M0 M2 M3 M5
M6
 f2 = (x+y+z)(x+y+z')(x+y'+z)(x'+y+z)=M0M1M2M4
 Any Boolean function can be expressed asterms).
 A product of maxterms (“product” meaning the ANDing of terms).

 A sum of minterms (“sum” meaning the ORing of Both boolean

functions are said to be in Canonical form.
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Digital Logic Design

 Sum of Minterms
 Sum of minterms: there are 2n minterms and 22n combinations of
functions with n Boolean variables.
 Example 2.4: express F = A+B’C as a sum of minterms.
 F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') + AB'(C+C')
+ (A+A')B'C = ABC+ABC'+AB'C+AB'C'+A'B'C
 F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m1 + m4 +m5 + m6 + m7
 F(A, B, C) = (1, 4, 5, 6, 7)
 or, built the truth table first

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Digital Logic Design

 Product of Maxterms
 Product of maxterms: using distributive law to expand.
 x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') = (x+y+z)(x+y+z')
(x+y'+z)
 Example 2.5: express F = xy + x'z as a product of
maxterms.
 F = xy + x'z = (xy + x')(xy +z) = (x+x')(y+x')(x+z)(y+z) =
(x'+y)(x+z)(y+z)
 x'+y = x' + y + zz' = (x'+y+z)(x'+y+z')
 F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M M M M
0 2 4 5
 F(x, y, z) = (0, 2, 4, 5)

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Digital Logic Design

 Conversion between Canonical Forms
 The complement of a function expressed as the sum of minterms
equals the sum of minterms missing from the original function.
 F(A, B, C) = (1, 4, 5, 6, 7)

 Thus, F‘ (A, B, C) = (0, 2, 3)

 By DeMorgan's theorem

F(A, B, C) = (0, 2, 3)
F'(A, B, C) =(1, 4, 5, 6, 7)
 mj' = Mj

 To convert from one canonical form to another: interchange the

symbols  and and list those numbers missing from the original
form
»  of 1's
»  of 0's
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Digital Logic Design

 Example
 F = xy + xz

 F(x, y, z) = (1, 3, 6, 7)

 F(x, y, z) =  (0, 2, 4, 6)

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Digital Logic Design

 Standard Forms
 In canonical forms each minterm or maxterm must contain all
the variables either complemented or uncomplemented, thus
these forms are very seldom the ones with the least number of
literals.
 Standard forms: the terms that form the function may obtain
one, two, or any number of literals, .There are two types of
standard forms:
 Sum of products: F1 = y' + xy+ x'yz'
 Product of sums: F2 = x(y'+z)(x'+y+z')
 A Boolean function may be expressed in a nonstandard form
 F3 = AB + C(D + E)
 But it can be changed to a standard form by using The
. .

distributive law
 F3 = AB + C(D + E) = AB + CD + CE
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Digital Logic Design

 Implementation
 Two-level implementation

F1 = y' + xy+ x'yz' F2 = x(y'+z)(x'+y+z')

 Multi-level implementation

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Digital Logic Design

 2.7 Other Logic Operations
 2n rows in the truth table of n binary variables.
 22n functions for n binary variables.
 16 functions of two binary variables.

 All the new symbols except for the exclusive-OR symbol are
not in common use by digital designers.
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Digital Logic Design

Boolean Expressions

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Digital Logic Design

 2.8 Digital Logic Gates

 Boolean expression: AND, OR and NOT operations

 Constructing gates of other logic operations
 The feasibility and economy;
 The possibility of extending gate's inputs;

 The basic properties of the binary operations

(commutative and associative);
 The ability of the gate to implement Boolean functions.

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Digital Logic Design

 Standard Gates

 Consider the 16 functions in Table 2.8

 Two functions produce a constant : (F0 and F15).

 Four functions with unary operations: complement and

transfer: (F3, F5, F10 and F12).
 The other ten functions with binary operators
 Eight function are used as standard gates :
complement (F12), transfer (F3), AND (F1), OR (F7),
NAND (F14), NOR (F8), XOR (F6), and equivalence
(XNOR) (F9).
 Complement: inverter.
 Transfer: buffer (increasing drive strength).

 Equivalence: XNOR.
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Digital Logic Design

Summary of Logic Gates

Figure 2.5 Digital logic gates 22

Digital Logic Design

Summary of Logic Gates

Figure 2.5 Digital logic gates 23

Digital Logic Design

 Multiple Inputs
 Extension to multiple inputs
 A gate can be extended to multiple inputs.
» If its binary operation is commutative and associative.
 AND and OR are commutative and associative.
» OR
− x+y = y+x
− (x+y)+z = x+(y+z) = x+y+z
» AND
− xy = yx
− (x y)z = x(y z) = x y z

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Digital Logic Design

 Multiple Inputs
 Multiple NOR = a complement of OR gate, Multiple NAND
= a complement of AND.
 The cascaded NAND operations = sum of products.
 The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascated NOR and

NAND gates 25

Digital Logic Design

 Multiple Inputs
 The XOR and XNOR gates are commutative and associative.
 Multiple-input XOR gates are uncommon?
 XOR is an odd function: it is equal to 1 if the inputs variables
have an odd number of 1's.

Figure 2.8 3-input XOR gate 26

Digital Logic Design

 Positive and Negative Logic

 Positive and Negative Logic

 Two signal values <=> two
logic values
 Positive logic: H=1; L=0

 Negative logic: H=0; L=1

 Consider a TTL gates

 A positive logic AND gate
 A negative logic OR gate

Figure 2.9 Signal assignment and logic polarity

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Digital Logic Design

 Positive and Negative Logic

Figure 2.10 Demonstration of positive and negative logic 28

Digital Logic Design

 2.9 Integrated Circuits
Level of Integration
 An IC (a chip)
 Examples:
 Small-scale Integration (SSI): < 10 gates
 Medium-scale Integration (MSI): 10 ~ 100 gates
 Large-scale Integration (LSI): 100 ~ xk gates
 Very Large-scale Integration (VLSI): > xk gates

 VLSI
 Small size (compact size)
 Low cost
 Low power consumption
 High reliability
 High speed
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Digital Logic Design

 Digital Logic Families
 Digital logic families: circuit technology
 TTL: transistor-transistor logic (dying?)

 ECL: emitter-coupled logic (high speed, high power

consumption)
 MOS: metal-oxide semiconductor (NMOS, high density)

 CMOS: complementary MOS (low power)

 BiCMOS: high speed, high density

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Digital Logic Design

 Digital Logic Families

 The characteristics of digital logic families

 Fan-out: the number of standard loads that the output of a
typical gate can drive.
 Power dissipation.

 Propagation delay: the average transition delay time for

the signal to propagate from input to output.
 Noise margin: the minimum of external noise voltage that
caused an undesirable change in the circuit output.

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Digital Logic Design

 CAD

 CAD – Computer-Aided Design

 Software programs that support computer-based
representation of circuits of millions of gates.
 Automate the design process

 Two design entry:

» Schematic capture
» HDL – Hardware Description Language
− Verilog, VHDL
 Simulation

 Physical realization
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Digital Logic Design

 Home Work (4)

Digital Design (4th)- Morris Mano-Page 66-

Problems:

2.3 d,f
2.4 d,e
2.6 Only for (2.3 d,f)
2.7 Only for (2.4 d,f)
2.9
2.20
2.22
Digital Logic Design
 Home Work (5)

Digital Design (4th)- Morris Mano-Page 66-

Problems:

2.13
2.14
2.15
2.27
2.28

Digital Logic Design