Chapter Seven

Microprogrammed Control

1
Contents
 Control Memory
 Address Sequencing
 Microprogram Example
 Design of Control Unit

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 Introduction-Control Memory
 The function of the control unit in a digital computer is
to initiate sequences of microoperations.
 When the control signals are generated by hardware
using conventional logic design techniques, the control
unit is said to be hardwired.
 Microprogramming is a second alternative for designing
the control unit of a digital computer.
 The principle of microprogramming is an elegant and
systematic method for controlling the microoperation
sequences in a digital computer.

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Control Unit

Control Unit Function

•Sequence logic unit issues read command

•Word specified in control address register

is read into control buffer register

•Control buffer register contents generates

control signals and next address
information

•Sequence login loads new address into

control buffer register based on next
address information from control buffer
register and ALU flags

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 Introduction(cont.)
 In a bus-organized systems, the control signals that specify
microoperations are groups of bits that select the paths in multiplexers,
decoders, and arithmetic logic units.
 A control unit whose binary control variables are stored in memory is
called a microprogrammed control unit.
 A memory that is part of a control unit is referred to as a control
memory.
 Each word in control memory contains within it a microinstruction.
 A sequence of microinstructions constitutes a microprogram.
 Can be either read-only memory( ROM) or writable control memory (dynamic
microprogramming)
 A computer that employs a microprogrammed control unit will have
two separate memories:
 A main memory
 A control memory

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 Introduction(cont.)
 The general configuration of a microprogrammed control
unit is demonstrated in the block diagram of Fig.1
 The control memory is assumed to be a ROM, within which all control
information is permanently stored.
 The control address register specifies the address of the
microinstruction.
 The control data register holds the microinstruction read from memory.
 Thus a microinstruction contains bits for initiating
microoperations in the data processor part and bits that
determine the address sequence for the control memory.

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 Microprogrammed control organization

External Control
input Next- word
Control Control Control
address Memory data
generator Address
register (ROM) register
(sequencer)

Next-address information

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Microprogram Sequencer
 The next address generator is sometimes called a
microprogram sequencer, as it determines the
address sequence that is read from control memory.
 Typical functions of a microprogram sequencer are:
 Incrementing the control address register by one
 Loading into the control address register an address from
control memory
 Transferring an external address
 Loading an initial address to start the control operations

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 Pipeline register
 The data register is sometimes called a pipeline
register.
 It allows the execution of the microoperations specified by the
control word simultaneously with the generation of the next
microinstruction

 The system can operate by applying a single-phase clock to the

address register.
 Without the control data register
 Thus, the control word and next-address information are taken
directly from the control memory.

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 Introduction(cont.)
 The main advantage of the microprogrammed control is
the fact that once the hardware configuration is
established, there should be no need for further hardware
or wiring change.
 Most computers based on the reduced instruction set
computer (RISC) architecture concept use hardwired
control rather than a control memory with a
microprogram.
 CISC architecture concept used Microprogrammed
control.

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Address Sequencing

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 Introduction
 Microinstructions are stored in control memory in groups,
with each group specifying a routine.
 Each computer instruction has its own microprogram routine
in control memory to generate the microoperations that
execute the instruction.
 To appreciate the address sequencing in a microprogram
control unit:
 An initial address is loaded into the control address register when power is turned on in
the computer.
 This address is usually the address of the first microinstruction that activates the
instruction fetch routine.
 The control memory next must go through the routine that determines the effective
address of the operand.
 The next step is to generate the microoperations that execute the instruction fetched
from memory.
 The transformation from the instruction code bits to an
address in control memory where the routine is located is
referred to as a mapping process. 12
 Introduction(cont.)
 The address sequencing capabilities required in a control
memory are:
 Incrementing of the control address register
 Unconditional branch or conditional branch, depending on status bit
conditions
 A mapping process from the bits of the instruction to an address for
control memory
 A facility for subroutine call and return
 Fig. 2 shows a block diagram of a control memory and
the associated hardware needed for selecting the next
microinstruction address.
 The microinstruction in control memory contains
 a set of bits to initiate microoperations in computer registers
 Other bits to specify the method by which the next address is obtained

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 Selection of address for control
memory
Instruction code

Mapping
logic

Status Branch MUX Subroutine

bits select Multiplexers
logic register
(SBR)

Control address register
Clock (CAR) Incrementer


Control memory
Select a status bit
Branch address Microoperations 14
 Conditional branching
 The branch logic of Fig.2 provides decision-making capabilities in
the control unit.
 The status conditions are special bits in the system that provide
parameter information.
 e.g. the carry-out, the sign bit, the mode bits, and input or output status
 The status bits, together with the field in the microinstruction that
specifies a branch address, control the conditional branch decisions
generated in the branch logic.
 The branch logic hardware may be implemented by multiplexer.
 Branch to the indicated address if the condition is met;
 Otherwise, the address register is incremented.
 An unconditional branch microinstruction can be implemented by
loading the branch address from control memory into the control
address register.

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 Mapping of instruction
 A special type of branch exists when a microinstruction
specifies a branch to the first word in control memory
where a microprogram routine for an instruction is
located.
 The status bits for this type of branch are the bits in the
operation code part of the instruction.
 One simple mapping process that converts the 4-bit
operation code to a 7-bit address for control memory is
shown in Fig. 7-3.
 Placing a 0 in the most significant bit of the address
 Transferring the four operation code bits
 Clearing the two least significant bits of the control address register

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Mapping of instruction (cont.)
 This provides for each computer instruction a microprogram
routine with a capacity of four microinstructions.
 If the routine needs more than four microinstructions, it can use
addresses 1000000 through 1111111.
 If it uses fewer than four microinstructions, the unused memory
locations would be available for other routines.

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Mapping from instruction code to
microinstruction address

Opcode

Computer instruction: 1 0 1 1 Address

Mapping bits: 0 X X X X 0 0

Microinstruction address: 0 1 0 1 1 0 0

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 Subroutines
 Subroutines are programs that are used by other routines to
accomplish a particular task.
 Microinstructions can be saved by employing subroutines
that use common sections of microcode.
 e.g. effective address computation
 The subroutine register can then become the source for
transferring the address for the return to the main routine.
 The best way to structure a register file that stores
addresses for subroutines is to organize the registers in a
last-in, first-out (LIFO) stack.

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Microinstruction format
 The microinstruction format for the control memory
is shown in Fig. 7-6.
 The 20 bits of the microinstruction are divided into
four functional parts.
 The three fields F1, F2, and F3 specify microoperations for
the computer.
 The CD field selects status bit conditions.
 The BR field specifies the type of branch.
 The AD field contains a branch address.

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Microinstruction code format

3 3 3 2 2 7

F1 F2 F3 CD BR AD

F1, F2, F3: Microoperation fields

CD: Condition for branching
BR: Branch field
AD: Address field

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 Microoperations
 The three bits in each field are encoded to specify seven
distinct microoperations as listed in Table 7-1.
 No more than three microoperations can be chosen for a
microinstruction, one from each field.
 If fewer than three microoperations are used, one or more of the fields
will use the binary code 000 for no operation.

 Each microoperation in Table 7-1 is defined with a

register transfer statement and is assigned a symbol for
use in a symbolic microprogram.

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Symbols and binary code for
microinstruction fields
F1 Microoperation Symbol
000 None NOP
001 AC  AC + DR ADD
010 AC  0 CLRAC
011 AC  AC + 1 INCAC
100 AC  DR DRTAC
101 AR  DR(0-10) DRTAR
110 AR  PC PCTAR
111 M[AR]  DR WRITE

F2 Microoperation Symbol
000 None NOP
001 AC  AC - DR SUB
010 AC  AC V DR OR
011 AC  AC  DR AND
100 DR  M[AR] READ
101 DR  AC ACTDR
110 DR  DR + 1 INCDR
111 DR(0-10)  PC PCTDR
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Symbols and binary code for
microinstruction fields(cont.)

F3 Microoperation Symbol
000 None NOP
001 AC  AC  DR XOR
010 AC  AC COM
011 AC  shl AC SHL
100 AC  shr AC SHR
101 PC  PC +1 INCPC
110 PC  AR ARTPC
111 Reserved

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 Condition and branch field
 The CD field consists of two bits which are encoded to
specify four status bit conditions as listed in Table 7-1.

 The BR field consists of two bits. It is used, in

conjunction with the address field AD, to choose the
address of the next microinstruction.
 The jump and call operations depend on the value of the CD field.
 The two operations are identical except that a call microinstruction
stores the return address in the subroutine register SBR.

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Symbols and binary code for
microinstruction fields(cont.)
CD Condition Symbol Comments

00 Always = 1 U Uncondition branch

01 DR(15) I Indirect address bit
10 AC(15) S Sign bit of AC
11 AC = 0 Z Zero value in AC

BR Symbol Function

00 JMP CAR  AD if condition = 1

CAR  CAR +1 if condition = 0
01 CALL CAR  AD, SBR  CAR +1 if condition = 1
CAR  CAR +1 if condition = 0
10 RET CAR  SBR (Return from subroutine)
11 MAP CAR(2-5)  DR(11-14), CAR(0, 1, 6)  0

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 Symbolic microinstructions
 The simplest and most straightforward way to formulate an assembly
language for a microprogram is to define symbols for each field of the
microinstruction and to give users the capability for defining their own
symbolic addresses.

 Each symbolic microinstruction is divided into five fields:

 The label field: may be empty or it may specify a symbolic address
 The microoperations field: the NOP symbol is used when the microinstruction has no microoperations
 The CD field: one of the letters U, I, S, or Z can be chosen
 The BR field: contains one of the four symbols defined in Table 7-1
 The AD field: specifies a value for the address field of the microinstruction
 With a symbolic address
 With the symbol NEXT
 When the BR field contains a RET or MAP symbol, the AD field is left empty

 The pseudoinstruction ORG to define the origin, or first address, of a

microprogram routine.

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 Control memory
 When a ROM is used for the control memory,the
microprogram binary list provides the truth table for
fabricating the unit.
 To modify the instruction set of the computer, it is necessary to
generate a new microprogram and mask a new ROM.
 The advantage of employing a RAM for the control
memory is that the microprogram can be altered simply
by writing a new pattern of 1’s and 0’s without resorting
to hardware procedure.
 However, most microprogram systems use a ROM for
the control memory because it is cheaper and faster
than a RAM.

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Microprogram Sequencer

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 Microprogram sequencer
 The basic components of a microprogrammed control
unit are the control memory and the circuits that select
the next address.

 The address selection part is called a microprogram

sequencer.

 A microprogram sequencer can be constructed with

digital functions to suit a particular application.

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 Microprogram sequencer(cont.)
 The purpose of a microprogram sequencer is to present
an address to the control memory so that a
microinstruction may be read and executed.

 The next address logic of the sequencer determines the

specific address source to be loaded into the control
address register.

 The block diagram of the microprogram sequencer is

shown in Fig. 7-8.
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Microprogram sequencer for a
control memory
External
(MAP)

I0 Input 3 2 1 0
I1 logic S1 MUX 1
SBR
T S0 Load

1 Test Incrementer
I MUX 2
S CAR
Z Select Clock

Control memory
Microops CD BR AD

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 Microprogram sequencer contt.
 The MUX-1 selects an address from one of four sources & routes it into a CAR(control
address register)
 The four inputs of MUX-1 are
1) comes from incrementer of CAR,
2) address(AD) field of present microinstruction,
3) from output of SBR,
4) from an external source that maps the instruction.
 The MUX-2 tests the value of a selected status bit & the result of the test is applied to an
input logic ckt.
 The output from CAR provides the address for control memory. The content of CAR is
incremented & applied to MUX-1 input & SBR(subroutine register)
 Although the diagram shows a single subroutine register, a typical sequencer will have a
register stack about four to eight levels deep. In this way, a push, pop operation and
stack pointer is needed.

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Microprogram sequencer contt.
 The CD field selects one of the status bits in
MUX-2. if bit selected is equal to 1, the T
variable is equal to 1;otherwise it is equal to
0.

 The T value together with the two bits from

BR field go to the input logic.

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 Design of input logic
 The input logic in a particular sequencer will determine
the type of operations that are available in the unit.
 Typical sequencer operations are:
increment, branch or jump, call and return from
subroutine, load an external address, push or pop the
stack, and other address sequencing operations.
 With the three inputs, the sequencer can provide upto
eight address sequencing operations.

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Input logic contt.
 The input logic has three inputs,I0,I1,T and
three outputs S0,S1,L.
 S0,S1 one of the source address for CAR. L
enables the load input in SBR.
 The binary values of two selection variables
determine the path in the MUX-1.
 For ex: S1,S0=10,the mux input no. 2 is
selected and establishes a transfer path from
SBR to CAR
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 Input logic truth table for
microprogram sequencer
Therefore, the simplified Boolean functions for the input logic circuit can be
given as: S  I
1 1

T
S 0  I1 I 0  I1
L  I1I 0T

BR Input MUX 1 Load SBR

Field I1 I 0 T S1 S0 L

0 0 0 0 0 0 0 0
0 0 0 0 1 0 1 0
0 1 0 1 0 0 0 0
0 1 0 1 1 0 1 1
1 0 1 0 X 1 0 0
1 1 1 1 X 1 1 0

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