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CS305 MPMC - Module-2

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0% found this document useful (0 votes)
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CS305 MPMC - Module-2

Uploaded by

anusuma
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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CS305 : MICROPROCESSORS & MICROCONTROLLERS

MODULE -2 : 8086 MICROPROCESSOR

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8086 µP – Addressing Modes

Why study addressing modes?

Addressing modes help us to understand the types of operands and the way
they are accessed while executing an instruction.
5

Assembler

Control

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Physical address calculation 6

Physical Address = (Base Address x 10H ) + Offset Address


(Effective Address) (Segment Register) (Pointer Register)

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Instruction addressing in 8086 Microprocessor

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Types of addressing mode in 8086

1. Immediate addressing

2. Direct addressing

3. Register addressing

4. Register Indirect addressing

5. Based Addressing

6. Indexed addressing

7. Based index addressing

8. Relative Based Indexed addressing

9. Direct IO port addressing

10. Indirect IO port addressing

11. Implied addressing


1: Immediate addressing mode

 In this type of mode, immediate data is part of instruction and appears in the
form of successive byte or bytes

10 ABH
MOV AX,10ABH

AX
2: Direct addressing mode

 In this type of addressing mode a 16-bit memory address is directly specified in the instruction as a
part of it.
Memory
22 5000
MOV AX,[5000H] 33 5001
5002

AX
3: Register addressing mode

 In this type of addressing mode, the data is stored in the register and it can be a 8-bit or 16-bit
register. All the registers, except IP, may be used in this mode.

MOV AL,BLH 10 AB BX
MOV AX,BXH
BH BL

FF 33 AX
AH AL
4: Register Indirect addressing mode

 The address of the memory location which contains data or operand is


determined in a indirect way, using the offset register.

Memory
MOV AX,[BX] 22 5000
AX
33 5001
5002

50 00 BX
Question

MOV [7000H],CX

Q) Which addressing does instruction above belong, and why?


MOV [7000H],CX
Q) Which addressing does instruction above belonging and why?
Memory
Ans) Direct addressing mode 22 7000
7001
33
7002

CX 43 56
5: Based addressing mode

In this addressing mode, BX or BP register is used to hold a base


value for the effective address
5: Indexed addressing mode

 In this addressing mode, an SI or DI register is used to hold an index value


for memory data

Memory
22 5000
AX
33 5001
MOV AX,[SI] 5002

50 00 SI
7: Based Indexed addressing mode
7: Based indexed addressing mode

 In this mode the effective address is formed by adding content of a base


register (any one of BX or BP) to the content of an index register (SI or DI).
Default segment register DS.

12 3000
AX
MOV AX, [BX + SI] 34 3001
3002

10 00 + 20 00 = 3000H
Final
BX SI Index
Address
8: Relative Based Indexed addressing mode
8: Relative Based Indexed addressing mode

12 3050
MOV AX, [BX+SI+50H] AX
34 3051
3052

50H + 10 00 20 00 = 3050H
Final
BX SI Index
Address
9: Direct IO port addressing mode

 This addressing mode is used to access data from standard IO devices or


ports
 In this, an 8-bit port address is directly specified in the instruction
10: Indirect IO port addressing mode

 This addressing mode is used to access data from standard IO devices or


ports
 In this, the instruction will specify the name of the register which holds
the port address
11: Implied addressing mode

 In this, the instruction itself will specify the data to be operated by the
instruction
ProgramSlide
Assembler Directives 5

 Instructions to the assembler *


 Control the generation of machine code and organization of the program
 No machine code is generated for assembler directive
 Pseudo - instructions ( Pseudo - opcodes)
 Specify
 Start and End of a Program/Procedure/Segments (ORG,ENDS)
 Attach values to variables (ASSUME)
 Allocate storage locations for input/output data

*Assembler convert assembly language code into machine code that the computer can then read
and execute
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List of Assembler directives for 8086 µP assembly language Programming

Sl Assembler Meaning Description


No. Directive
1 ORG Origin Used to assign the starting address for a program

2 END End of program Marks the end of an assembly language program

3 ENDP End of procedure Indicates the end of a procedure (subroutine)

4 ENDS End of segment Indicates the end of a memory segment

5 DB Define Byte Used to define byte type (8-bit) variable

6 DW Define Word Used to define 16-bit variable

7 DD Define Double Word Used to define 32-bit variable

8 DQ Define Quad Word Used to define 64-bit variable

9 BYTE Indicates a byte (8-bit) sized operand

10 WORD Indicates a word (16-bit) sized operand

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List of Assembler directives for 8086 µP assembly language Programming

Sl Assembler Meaning Description


No. Directive
11 DWORD Double Word Indicates a Double word (32-bit) sized
operand
12 ASSUME Assume logical segment Indicate the name of each segment to the
name assembler
13 EQU Equate Used to equate numeric value or constant to
a variable
14 DUP Duplicate Generate duplicates of characters or numbers

15 OFFSET Specifies an Offset address

16 PROC Procedure Defines the beginning of a procedure


(subroutine)
17 SEGMENT Defines the start of a memory segment

18 STACK Indicates that a segment is a stack segment

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Classification of 8086 µP Instructions

1. Data transfer Instructions

2. Arithmetic Instructions

3. Logical Instructions

4. Control transfer Instructions

5. Processor control Instructions

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1. Data transfer/copying Instructions

Instructions to transfer data/address into registers, memory locations


and IO ports.
Mnemonics used : MOV, XCHG, PUSH, POP, IN, OUT
Examples:
1. MOV AX, SI 8. IN AX, [DX]
2. MOV CH, CL 9. OUT [DX], AL
3. MOV CX, 150A
4. MOV CX, [150A]
5. PUSH CX
6. POP BX
7. XCHG CX,SI
PUSH/POP
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2. Arithmetic Instructions

Instructions for performing Addition/ Subtraction/ Multiplication/


Division/ Increment/ Decrement/ Comparison operations.
Mnemonics used : ADD, ADC, SUB, SBB, MUL, DIV, INC, DEC, CMP
Examples:

1. ADD AX, BX
2. SUB AX, CX
3. MUL BX
4. DIV BL
5. INC CL
6. DEC CX
7. CMP DL, CH
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3. Logical Instructions

Instructions for performing AND/ OR/ Exclusive-OR/ Complement


(NOT)/ Shift and Rotate operations.
Mnemonics used : AND, OR, XOR, SHR, SHL, RCR, RCL
Examples:
1. AND CX, DX 5. SHL – Logical left shift
2. OR AH, DL 6. SHR - Logical right shift 8085 µP
3. XOR BX, DX 7. ROL – Rotate left to carry 1. RLC
4. NOT AX 8. ROR - Rotate right to carry 2. RRC
9. RCL - Rotate left through carry 3. RAL
10. RCR - Rotate right through carry 4. RAR

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Sl Instruction Explanation Symbolic Representation
No.
1 SHL Content of the register is
shifted left, the MSD is
shifted to the carry flag
while the LSD is filled
with zero
2 SHR Content of the register is
shifted right, the LSD is
shifted to the carry flag
while the MSD is filled
with zero

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Sl Instruction Explanation Symbolic Representation
No.
3 ROL The content of the
register is rotated left,
while the MSD is
moved to both the
LSD and the carry
flag
4 ROR The content of the
register is rotated
right, while the LSD
is moved to both the
MSD and the carry
flag

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Sl Instruction Explanation Symbolic Representation
No.
5 RCL The content of the
register is rotated left,
the carry flag is
moved to the LSD,
while the MSD is
moved to the carry
flag
6 RCR The content of the
register is rotated
right, the carry flag is
moved to the MSD,
while the LSD is
moved to the carry
flag

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ProgramSlide
4. Control transfer Instructions 5

Consists of call, jump, loop and software interrupt instructions. Normally a


program is executed sequentially, when a branch instruction is encountered, the program
execution control is transferred to the specified destination.
Mnemonics used : JUMP, CALL, RET, INT, IRET, LOOP

Unconditional JUMP Instructions


It does not check for any flag condition. When the unconditional jump
instruction is executed, the program control is transferred to a new memory location by
modifying the content of Instruction Pointer (IP)
Syntax: JMP label Example: JMP 4020
Conditional JUMP Instructions
In this, flag conditions are checked. If the conditions are TRUE, then the program
control is transferred to a new memory location by modifying the content of IP.
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Conditional JUMP Instructions

Sl Instruction Explanation
No.

1 JC Jump if carry (Jump if CF = 1)


2 JNC Jump if No carry (Jump if CF = 0)

3 JCXZ Jump if CX = 0

3 JE/JZ Jump if equal/Jump if zero (ZF = 1)


4 JNE/JNZ Jump if not equal/Jump if not zero (ZF = 0)

5 JO Jump if Overflow (Jump if OF = 1)


6 JNO Jump if Overflow (Jump if OF = 1)

7 JPE Jump if parity even (PF = 1)


8 JPO Jump if parity odd (PF = 0)

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4. Control transfer Instructions

CALL Instructions
CALL instruction transfer control to a subprogram or subroutine or a
procedure after saving the return address in the stack memory
Syntax: CALL label Example: CALL 4020

RET Instructions
Every procedure or subroutine ends with an RET instruction. The execution of the
RET instruction will pop the content of top of stack to the IP. Thus the program control
returns back to main program
Examples: RET

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4. Control transfer Instructions

LOOP Instructions
These are used to execute a group of instructions a number of times as specified by a
count value stored in the CX register. The content of the CX register is decremented by
one after each execution.
Syntax: LOOP label Example: LOOP 4020

Software Interrupts
The INT instructions are called software interrupts. The INT instruction is used to
call a procedure or subroutine on interrupt basis.
Example: INT 3 - Interrupt program execution
IRET – Interrupt return

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5. Processor Control Instructions

This group includes instructions to set or clear the carry flag, the direction flag,
and the interrupt flag. It also includes the instructions which controls the processor
operation.

Mnemonics used :

Sl Instruction Explanation
No.
1 CLC The carry flag is reset to zero
2 CMC The carry flag is complemented
3 STC The carry flag is set to one
4 HLT Halt program execution
It is used to terminate a program
5 WAIT Causes the processor to enter into an
idle state
6 NOP No operation is performed
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8086 Microprocessor Stack- LIFO (Last In First Out)data segment

Transfer

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Assembly Language Programming -2: 16-bit Addition

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Assembly Language Programming -2: 16-bit Subtraction

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Assembly Language Programming -3: Sum of elements in an array

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Assembly Language Programming -4: Search for smallest data

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Assembly Language Programming - 5: Search for largest data

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8086 Microprocessor Stack- LIFO (Last In First Out)data segment

 Stack is a portion of RAM memory defined by the user for temporary storage and retrieval of
data while executing a program
 Stack Pointer (SP) is an internal register to hold the address of the stack
 PUSH & POP - To store/retrieve data from the stack
 Instructions – PUSH,POP,RST n, CALL,RET
 The content of the SP is automatically decremented/incremented after every write/read into
stack – LIFO
 Order of retrieving (POPing) should be opposte to that of storing(PUSHing)

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Example

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Physical address computation

 The content of SP is the offset address of top of stack


 PA* is computed by using the content of SS* register and SP*
 For write operation into the stack, SP is automatically decremented by 2 and for read
operation from stack, SP is automatically incremented by 2 *PA – Physical Address
*SS – Stack Segment
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Example

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Subroutine(Procedure)

 A group of instructions written separately from the main program to perform a


function that occur repeatedly in the main program
 Subroutine handling instructions : call (CALL) and return (RET)
 Assembler directives : PROC – beginning of a procedure
ENDP- end of a procedure

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Macro
 A group of instructions written within brackets and identified by a name.
 A macro is written when a repeated group of instructions is too short or not appropriate to
be written as a subroutine
 Assembler directives : MACRO – beginning of a macro
ENDM- end of a macro

 Whenever the macro is called in the program, the assembler will insert the defined group
of instructions in place of the call
 The process of replacing the macro with the instructions it represent is called expanding
the macro

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