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Chapter 5B

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0% found this document useful (0 votes)
14 views26 pages

Chapter 5B

Uploaded by

rummyflappy
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CHAPTER 5

Interfacing Communications
-STACK, DIRECT MEMORY
ACCESS, BUS
Direct Memory Access
• Method of transferring data from the
computer's RAM to another part of the computer
without processing it using the CPU
• While most data that is input or output from your
computer is processed by the CPU, some data does
not require processing, or can be processed by
another device.
• DMA can save processing time and is a more
efficient way to move data from the computer's
memory to other devices.
• Required conditions for DMA
– The I/O interface and memory must be connected
– The I/O module must be capable of reading and
writing to memory
– Conflicts between the CPU and the I/O module
must be avoided
– Interrupt required for completion
Examples
• A sound card may need to access data stored
in the computer's RAM, but since it can
process the data itself, it may use DMA to
bypass the CPU.
• Video cards that support DMA can also access
the system memory and process graphics
without needing the CPU.
DMA Instructions
• Application program requests I/O service from
operating system
– privileged programmed I/O instructions

• To initiate DMA, programmed I/O is used to


send the following information:
1. location of data on I/O device
2. the starting location in memory
3. the size of the block
4. read/write
• Interrupt to CPU upon completion of DMA
• CPU sets up a device such
as a disk drive for DMA
transfer, and disables DMA
interrupts
• Data is transferred into
DMA memory, while the
CPU is freed to handle other
tasks.
• Once the data transfer is
completed, the CPU is
interrupted to allow it to
handle cleanup after the
DMA transfer.
Bus
• The physical connection that makes it possible to transfer data
from one location in the computer system to another
• Group of electrical or optical conductors for carrying signals
from one location to another
– Wires or conductors printed on a circuit board
– Line : each conductor in the bus

• 4 kinds of signals
1. Data
2. Addressing
3. Control signals
4. Power (sometimes)
Bus Characteristics
• Number of separate conductors
• Data width in bits carried simultaneously
• Addressing capacity
• Lines on the bus are for a single type of signal or shared
• Throughput - data transfer rate in bits per second
• Distance between two endpoints
• Number and type of attachments supported
• Type of control required
• Features and capabilities
Parallel vs. serial buses
• Parallel
– High throughput because all bits of a word are transmitted simultaneously
– Expensive and require a lot of space
– Generally used for short distances such as CPU buses and on computer motherboards
• Serial
– 1 bit transmitted at a timed
– Single data line pair and a few control lines
– For many applications, throughput is higher than for parallel because of the lack of
electrical interference
Direction of transmission
• Simplex – unidirectional
• Half duplex – bidirectional,
one direction at a time
• Full duplex – bidirectional
simultaneously
Method of interconnection
• Point-to-point – single source • Multipoint bus – also
to single destination broadcast bus or multidrop bus
– Cables – point-to-point – Connect multiple points to
buses that connect to an one another
external device
Point-to-point vs. Multipoint

Plug-in Broadcast
device bus
Example:
Ethernet

Shared among
multiple devices
Stack
• Used by the CPU to store information from
registers temporarily
• This is because there is limited number of
register inside the microprocessor
• The two main registers to access the stack are
SS and SP registers
Types Of Stack
• There are two types of stacks:
Hardware stack – a number of registers are set aside
within the processor to serve as the stack location.
ADVANTAGE is rapid access time.
DISADVANTAGE is limited numbers of registers
Software stack – an area inside the RAM for
temporary storage. ADVANTAGES are almost
unlimited size and can reside anywhere inside the
memory. DISADVANTAGE is slow access time
Stack Functions/Usages

• When a subroutine is called


• When an interrupt occurs
• When stack instruction occurs
• To store data when the most recently used data
will also be the first needed
• Efficient way of storing intermediate data
values during complex calculations
Operation Of Stacks
• The stack address is built, one byte at a time (similar
to the memory operations)
• Stack operates by Last In First Out (LIFO)
• The last byte put on the stack will be the first byte
retrieved from the stack
• Examples of Operations:
– To store data onto the stack (PUSH AX)
– To retrieve data from the stack (POP AX)
Stack Pointer
• The job of SP is very critical when push and pop are
performed
• The SP points to the top of the stack (which is not
empty)
• SP incremented when data is popped off the stack
(removed from)
• SP is decremented when data is pushed onto the stack
(put onto)
Pushing Onto Stack
Assuming that:
SP = 1236h
AX = 24B6h
BX = 85C2h
DX = 5F93h
show the contents of the stack as each of the
following instructions is executed
PUSH AX
PUSH BX
PUSH DX
1230 93
1231 5F
SP 1232 C2
1233 85 S
1234
1235
B6
24
S
1236 ///////

Finally, SP is : 122F
Popping Off Stack
Given the following stack and SP = 18FA,
show the contents of the stack and registers
after executing the following instructions.
18FA
18FB 23
SP 18FC 14
18FD 6B S
18FE 2C
18FF 91 S
1900 F6
(usually the stack is build following
1901
the25
little endian method)
18FA

POP CX 18FB 23
18FC 14
POP DX 18FD 6B
POP BX 18FE 2C
18FF 91
1900 F6
SP : 1900 1901 25

CX: 1423
DX: 2C6B
BX: F691
Little Or Big Endian
• Little Endian method :
– the high byte goes to the high address
– the low byte goes to the low address
• Big endian method:
– the low byte goes to the high address
– the high byte goes to the low address
• All Intel microprocessor and many
minicomputers use LITTLE ENDIAN method
• Motorola (used in MAC) and some
mainframes use BIG ENDIAN method
Exercise
• Based from the instructions given below, draw an
appropriate stack diagram, starting from address
2000
MOV AX, 1234h
MOV BX, 9ABCh
PUSH BX
PUSH AX
• State the content of the stack pointer after the
execution of the above instructions
• Arrange the words in the stack using
– Big Endian
– Little Endian
Past semester Question
• Given the content of registers and the byte that follows the
PUSH instruction at the time interrupt occurs:
PC : 2602h
AX : F6h
BX : 82h
CX : 3624h
DX : FB12h
Flag Register : 15h
• BYTE
X X 1 0 1 1 1 1
PC DX CX Flag Register BX AX
a) Draw the content of the stack (with related
addresses) after the interrupt occurred
(following the sequence of PC, AX, CX, DX,
and BX). Assume that the last item stored in
the stack (SP) is at the location FF00.
b) Why stack is needed when an interrupt
occurs?
References

• http://www.techterms.com/definition/dma
• http://www.embedded-systems-portal.com/
CTB/Direct_Memory_Access,1006.html

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