Chapter 3

Basic Logic Gates

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 Objectives
 You should be able to:
 Describe the operation and use of AND gates and
OR gates.
 Construct truth tables for AND and OR gates.

 Draw timing diagrams for AND and OR gates.

 Use timing analysis to describe the operation of an

ENABLE function.

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 Objectives

(Continued)
 Sketch external connections to IC chips to
implement AND and OR logic circuits.
 Explain how to use a logic pulser and a logic probe
to troubleshoot digital ICs.
 Describe the operation and use of NAND and
NOR gates.
 Construct truth tables for NAND and NOR gates.

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 Objectives

(Continued)
 Draw timing diagrams for NAND and NOR gates.
 Use the outputs of a Johnson shift counter to
generate specialized waveforms using
combinations of the five basic gates.
 Develop a comparison of Boolean equations and
truth tables for the five basic gates.

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 The AND Gate
 The output, X, is HIGH if input A AND input
B are both HIGH.
 If A = 1 and B = 1, then X = 1.
 If A = 0 or B = 0, then X = 0.

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The AND Gate

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 The AND Gate
 Boolean Equation: X = A•B or X = AB
 Read as “X equals A AND B”
 Can have more than two inputs

 Number of input/output combinations = 2 N

 N = number of input bits

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 The OR Gate
 The output at X will be HIGH whenever input
A OR input B is HIGH or both are HIGH
 If A = 1 and/or B = 1, then X = 1
 If A = 0 and B = 0, then X = 0

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The OR Gate

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 The OR Gate
 Boolean Equation: X = A + B
 Read as, “ X = A or B”
 Can have more than two inputs
 Number of combinations = 2N
 N = number of input bits

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 Timing Analysis
 Timing diagrams are used to analyze the
output response to varying inputs
 Oscilloscope
 Display plots voltage versus time
 Dual-trace can display two waveforms at a time.

 Logic analyzer
 Can display state tables that show binary levels on
signal lines
 Can display up to 16 waveforms at a time

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Timing Analysis

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 Timing Analysis
 Determine the gate output
for the input waveforms
below.

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 Enable and Disable Functions
 Enable function using AND gate

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 Enable and Disable Functions
 Disable function using OR gate

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 Using Integrated Circuit Logic
Gates
 Enable and Disable
 Pin Connections

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 Introduction to
Troubleshooting Techniques
 The procedure used to find the fault or
trouble in a circuit.
 Logic Probe shows voltage level
 Indicator lamp glows strongly if high
 Lamp is off if output is low
 Glows dimly if floating

 Floating - open circuit, neither high nor low

 Logic Pulser – provides a known digital
signal to a circuit
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 Discussion Points

 Describe how a logic probe and pulser

could be used to troubleshoot an AND gate.
 Describe how a logic probe and pulser
could be used to troubleshoot an OR gate.

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 The Inverter
 Used to complement (invert) a digital signal
 When A = 1, X = 0
 When A = 0, X = 1

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 The Inverter
 Truth Table
 Boolean Equation: X = A
 Inversion bar
 NOT gate

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 The NAND Gate
 Same as the AND gate except that its output
is inverted
 If A = 1 and B = 1, X = 0
 If A = 0 or B = 0, A = 1

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 The NAND Gate
 Truth Table
 Boolean Equation: X = AB
 Multiple inputs - the output is always HIGH
unless all inputs go HIGH

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 The NOR Gate
 Same as the OR gate except that its output
is inverted
 If A = 1 or B = 1, X = 0
 If A = 0 and B = 0, X = 1

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 The NOR Gate
 Truth Table
 Boolean Equation: X = A + B

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 Logic Gate Waveform Generation

 Repetitive waveform
 Waveform generator
 Johnson shift counter

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 Discussion Point
 Which Johnson counter outputs must be
connected to a 3-input AND gate to enable
only CP #4?

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 Discussion Point
 Sketch the output waveform resulting from
inputting the Johnson counter outputs
shown:

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 Using IC Logic Gates
 Hex - six gates

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 Using IC Logic Gates
 Quad - four gates
 Three-, four-, and eight-input
configurations

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Common IC Logic Gates

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IEEE/IEC Standard Logic
Symbols

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 Discussion Point
 Briefly describe the operation of each of the
basic logic gates:
 AND
 OR

 NOT (inverter)

 NAND

 NOR

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 Discussion Point
 Create a truth table for a three input NAND
gate.
 Write the Boolean equation for a 3 input OR
gate.

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 Discussion Point
 Sketch the output waveform (X) for the 2-
input AND gate shown.

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 Discussion Point
 Sketch the output waveforms for the Johnson shift
counter outputs shown:

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 Discussion Point
 Determine the problem (if any) with the 7427
NOR IC using the logic probe results shown:

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 Summary
 The AND gate requires that all inputs are
HIGH in order to get a HIGH output.
 The OR gate outputs a HIGH if any of its
inputs are HIGH.
 An effective way to measure the precise
timing relationships of digital waveforms is
with an oscilloscope or a logic analyzer.

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 Summary
 Beside providing the basic logic functions,
AND and OR gates can also be used to enable
or disable a signal to pass from one point to
another.
 There are several integrated circuits available
in both TTL and CMOS that provide the basic
logic functions.

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 Summary
 Two important troubleshooting tools are the
logic pulser and the logic probe. The pulser is
used to inject pulses into a circuit under test.
The probe reads the level at a point in a circuit
to determine is it is HIGH, LOW, or floating.
 An inverter provides an output that is the
complement of its input.

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 Summary
 A NAND gate outputs a LOW when all of its
inputs are HIGH.
 A NOR gate outputs a HIGH when all of its
inputs are LOW.
 Specialized waveforms can be created by
using a repetitive waveform generator and the
basic gates.

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 Summary
 Manufacturers’ data manuals are used by the
technician to find the pin configuration and
operating characteristics for the ICs used in
modern circuitry.

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