0% found this document useful (0 votes)
20 views

Computer Organization and Architecture: Presented by Er. Amandeep Kaur CSE Department CEC, Jhanjeri

Computer organisation and architecture

Uploaded by

rajdeepmulae
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
20 views

Computer Organization and Architecture: Presented by Er. Amandeep Kaur CSE Department CEC, Jhanjeri

Computer organisation and architecture

Uploaded by

rajdeepmulae
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 10

COMPUTER ORGANIZATION

AND ARCHITECTURE

Presented By
Er. Amandeep Kaur
CSE department
CEC,Jhanjeri
Register Transfer Language

 A digital computer system exhibits an


interconnection of digital modules such as registers,
decoders, arithmetic elements, and Control logic.
 These digital modules are interconnected with some
common data and control paths to form a complete
digital system.
 Moreover, digital modules are best defined by the
registers and the operations that are performed on
the data stored in them.
 The operations performed on the data stored in
registers are called Micro-operations.
Register Transfer Language

 The internal hardware organization of a digital


system is best defined by specifying:
 The set of registers and the flow of data between
them.
 The sequence of micro-operations performed on the
data which are stored in the registers.
 The control paths that initiates the sequence of
micro-operation
Register Transfer Language

 The Register Transfer Language is the symbolic


representation of notations used to specify the
sequence of micro-operations.

 In a computer system, data transfer takes place


between processor registers and memory and
between processor registers and input-output
systems. These data transfer can be represented by
standard notations given below:
Register Transfer Language

 Notations R0, R1, R2..., and so on represent


processor registers.
 The addresses of memory locations are represented
by names such as LOC, PLACE, MEM, etc.
 Input-output registers are represented by names
such as DATA IN, DATA OUT and so on.
 The content of register or memory location is
denoted by placing square brackets around the
name of the register or memory location.
Register Transfer

 The term Register Transfer refers to the availability


of hardware logic circuits that can perform a given
micro-operation and transfer the result of the
operation to the same or another register.
 Most of the standard notations used for specifying
operations on various registers are stated below.
 he memory address register is designated by MAR.
 Program Counter PC holds the next instruction's
address.
 Instruction Register IR holds the instruction being
executed.
 R1 (Processor Register).
 We can also indicate individual bits by placing them
in parenthesis. For instance, PC (8-15), R2 (5), etc.
 Data Transfer from one register to another register
is represented in symbolic form by means of
replacement operator. For instance, the following
statement denotes a transfer of the data of register
R1 into register R2.
 R2 ← R1
 Typically, most of the users want the transfer to
occur only in a predetermined control condition. This
can be shown by following if-then statement:
If (P=1) then (R2 ← R1); Here P is a control signal
generated in the control section.
 It is more convenient to specify a control function
(P) by separating the control variables from the
register transfer operation. For instance, the
following statement defines the data transfer
operation under a specific control function (P).
 P: R2 ← R1
 The following image shows the block diagram that
depicts the transfer of data from R1 to R2.
 Here, the letter 'n' indicates the number of bits for
the register. The 'n' outputs of the register R1 are
connected to the 'n' inputs of register R2.

You might also like