0% found this document useful (0 votes)
11 views

Direct Cache Mapping

Direct Cache Mapping

Uploaded by

shahadat hossain
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
11 views

Direct Cache Mapping

Direct Cache Mapping

Uploaded by

shahadat hossain
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 23

Bangladesh Bank

Post: Assistant Maintenance Engineer


Exam Date: 04.02.2023
Exam Taker: BIBM
Bangladesh Bank Assistant Maintenance Engineer

1. Suppose we have a 16 KB of data in a direct mapped cache with 4 word blocks.


Determine the size of the tag, index and offset fields if we are using a 32-bit
architecture.

Cache size: 16 KB

Block size: 4 words

Word size: 4 bytes (assuming a typical 32-bit architecture where each word is 4 bytes)

Address size: 32 bits


Cache Mapping

1. Cache mapping is a technique that is used to bring the main memory


content to the cache or to identify the cache block in which the
required content is present.
Cache Mapping Techniques
There are three types of cache mappings namely:
1) Direct Mapping
2) Fully Associative Mapping
3) Set Associative Mapping
Direct Cache Mapping

The main memory is


divided into equal-sized
partitions called the
main memory blocks.
Lines Blocks
The number of bytes or
words in one block is
called the block size.

The cache is divided Cache Memory


into equal partitions
called the cache lines.
Line Size = Block Size
Main Memory
Direct Cache Mapping

Main Memory Size: 64 Bytes


0
Block Size : 4 Bytes
No. of Block in Main Memory: 1
64/4 = 16 2
i.e 0, 1, 2, 3 .. …15
3

15
Direct Cache Mapping
0 0 1 2 3

Main Memory Size: 64 Bytes 1 4 5 6 7

(i.e 0, 1 ,2, …. 63) 2 8 9 10 11

3 12 13 14 15
Block Size : 4 Bytes
4 16 17 18 19
No. of Block in Main Memory: 64/4 = 16
5 20 21 22 23

6 24 25 26 27

0 0 7 28 29 30 31

0 1 8 32 33 34 35

1 0 9 36 37 38 39

1 1
10 40 41 42 43

11 44 45 46 47

48 49 50 51
12
52 53 54 55
13
56 57 58 59
14
60 61 62 63
15
Direct Cache Mapping
0 0 1 2 3

1 4 5 6 7

Main Memory Size: 64 Bytes 2 8 9 10 11

Block Size : 4 Bytes 3 12 13 14 15

No. of Block in Main Memory: 64/4 = 16 4 16 17 18 19

5 20 21 22 23

6 24 25 26 27

0 0 7 28 29 30 31

0 1 For 64 bytes
8 32 33 34 35

1 0 9 36 37 38 39
1 1
10 40 41 42 43

11 44 45 46 47

12 48 49 50 51

13 52 53 54 55

14 56 57 58 59

15 60 61 62 63
Direct Cache Mapping
0 1 2 3
0
4 5 6 7 1

8 9 10 11 2
P.A bits :
12 13 14 15 3 (Physical Address Bits)

16 17 18 19 4 0 0 -> 0th
20 21 22 23 5
0 1 -> 1st
1 0 -> 2nd
24 25 26 27 6
1 1 -> 3rd
28 29 30 31 7
16 Blocks
32 33 34 35 8

36 37 38 39 9

10
40 41 42 43

44 45 46 47 11

48 49 50 51 12

52 53 54 55 13

56 57 58 59 14

60 61 62 63 15

Physical Address space


Direct Cache Mapping
0 1 2 3
0

1 4 5 6 7

2 8 9 10 11

P.A bits : 3 12 13 14 15

(Physical Address Bits) 4 16 17 18 19

5 20 21 22 23
0 1 1 1 1 1
6 24 25 26 27

7 28 29 30 31
3
8 32 33 34 35
7
9 36 37 38 39

10 40 41 42 43

11 44 45 46 47

= 31 12 48 49 50 51

13 52 53 54 55

14 56 57 58 59

15 60 61 62 63
Direct Cache Mapping

Block size : 4 bytes


Cache size : 16 bytes
Block Size = Line size
Line Size = 4 bytes
No. of lines in cache = 16/4 =
4
i.e 0,1,2,3 00 0
4 lines 01 1
2
10
3
11
Direct Cache Mapping

0 0 1 2 3

1 4 5 6 7

2 8 9 10 11

3 12 13 14 15

4 16 17 18 19

5 20 21 22 23

6 24 25 26 27 0 1 2 3 0
7 28 29 30 31
4 5 6 7 1
8 32 33 34 35
8 9 10 11 2
9 36 37 38 39

10
40 41 42 43
12 13 14 15
3
11 44 45 46 47

12 48 49 50 51

13 52 53 54 55

14 56 57 58 59

15 60 61 62 63
Direct Cache Mapping
Direct Cache Mapping
The bits in the Block offset
decides in which byte of the
identified block the required
content is present.
P.A bits :
(Physical Address Bits)

Block Number Block/ Line offset

Tag Bits Line Number

The bits in tag are the


identification bits that
represents which block of
main memory is present in
cache.
Direct Cache Mapping
0 0 1 2 3

1 4 5 6 7

2 8 9 10 11 12 001100
3 12 13 14 15
13 001101
4 16 17 18 19
14 001110
15 001111
5 20 21 22 23

6 24 25 26 27 28 011100
7 28 29 30 31 29 011101
8 32 33 34 35
30 011110
9 36 37 38 39
31 011111
10
40 41 42 43 44 101100
11 44 45 46 47
45 101101
46 101110
12 48 49 50 51
47 101111
13 52 53 54 55

14 56 57 58 59 60 111100
15 60 61 62 63 61 111101
62 111110
63 111111
Direct Cache mapping
• In direct mapping physical address is divided into three parts i.e., Tag
bits, Cache Line Number and Byte offset.
Tag Number of Cache Lines Byte Offset
Bangladesh Bank Assistant Maintenance Engineer

1. Suppose we have a 16 KB of data in a direct mapped cache with 4 word blocks.


Determine the size of the tag, index and offset fields if we are using a 32-bit
architecture.

Cache size: 16 KB

Block size: 4 words

Word size: 4 bytes (assuming a typical 32-bit architecture where each word is 4 bytes)

Address size: 32 bits


Bangladesh Bank Assistant Maintenance Engineer

1. Suppose we have a 16 KB of data in a direct mapped cache with 4 word blocks.


Determine the size of the tag, index and offset fields if we are using a 32-bit
architecture.

Cache size: 16 KB

Block size: 4 words

Word size: 4 bytes (assuming a typical 32-bit architecture where each word is 4 bytes)

Address size: 32 bits


Bangladesh Bank Assistant Maintenance Engineer

1. Suppose we have a 16 KB of data in a direct mapped cache with 4 word blocks.


Determine the size of the tag, index and offset fields if we are using a 32-bit
architecture.

Cache size: 16 KB

Block size: 4 words

Word size: 4 bytes (assuming a typical 32-bit architecture where each word is 4 bytes)

Address size: 32 bits


Bangladesh Bank Assistant Maintenance Engineer

1. Suppose we have a 16 KB of data in a direct mapped cache with 4 word blocks.


Determine the size of the tag, index and offset fields if we are using a 32-bit
architecture.

Cache size: 16 KB

Block size: 4 words

Word size: 4 bytes (assuming a typical 32-bit architecture where each word is 4 bytes)

Address size: 32 bits


Bangladesh Bank Assistant Maintenance Engineer

1. Suppose we have a 16 KB of data in a direct mapped cache with 4 word blocks.


Determine the size of the tag, index and offset fields if we are using a 32-bit
architecture.

Cache size: 16 KB

Block size: 4 words

Word size: 4 bytes (assuming a typical 32-bit architecture where each word is 4 bytes)

Address size: 32 bits


• In direct mapping physical address is divided into three parts i.e., Tag
bits, Cache Line Number and Byte offset.
Tag Number of Cache Lines Byte Offset
Bangladesh Bank Assistant Maintenance Engineer

Calculate the Block Size in Bytes:


Since each block contains 4 words and each word is 4 bytes:
Block size=4 words×4 bytes/word=16 = bytes
Number of offset bits==4 bits

Calculate the Number of Cache Blocks:


Block size = Line size = bytes
The total cache size is 16 KB= bytes
Number of Lines = = = lines
Bangladesh Bank Assistant Maintenance Engineer

Number of Lines in the cache:


Number of index bits = =10 bits
Number of tag bits=Total Address bit − (Index bits + Offset bits) = 32 – (10+4)
= 18 bits

You might also like