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Chapter 3 Basic Logic Gates

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47 views47 pages

Chapter 3 Basic Logic Gates

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ramaa.khader
Copyright
© © All Rights Reserved
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Chapter 3

Basic Logic Gates

By: MSc .Muneera Altayeb


Outline
3–1 The AND Gate
3–2 The OR Gate
3–3 Timing Analysis
3–4 Enable and Disable Functions
3–5 Using IC Logic Gates
3–7 The Inverter
3–8 The NAND Gate
3–9 The NOR Gate
3–10 Logic Gate Waveform Generation
3–11 Using IC Logic Gates
Digital Electronics A Practical Approach ,William
2 Kleitz,Pearson,7th Ed 2004
Introduction to Logic Gates
Basic building block for digital circuitry:
Has only 1 output, but 1 or more inputs
Output will be either a 1 or 0
Combine gates to create electronic systems
5 basic logic gates
AND
OR
NOT (inverter)
NAND
NOR

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3 Kleitz,Pearson,7th Ed 2004
The AND Gate
The output, X, is HIGH if input A AND input B
are both HIGH
Boolean Equation X = A AND B or X = AB
Can have more than two inputs
Number of combinations = 2N where N is the
number of inputs

Boolean Equation: X = A AND B or X = AB


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Number of combinations = 2N
where N = number of inputs
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Figure 3–2 AND gate used to activate a burglar alarm.

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Figure 3–3 Electrical analogy for an AND gate: (a) using manual switches; (b) using
transistor switches.

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Figure 3–4 Multiple-input AND gate symbols.

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Table 3–2 Truth Table for a Four-Input AND Gate

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The OR Gate

The output at X will be HIGH whenever input


A or input B is HIGH or both are HIGH
Can have more than two inputs
Boolean Equation X = A OR B or X=A + B

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Figure 3–6 Electrical analogy for an OR gate: (a) using manual switches; (b) using transistor
switches.

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Figure 3–6 (continued) Electrical analogy for an OR gate: (a) using manual switches; (b) using
transistor switches.

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Figure 3–7 Three-input OR gate symbol.

Figure 3–8 Eight-input OR gate symbol.

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Table 3–4 Truth Table for a Three-Input OR Gate

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The Inverter
Used to complement or invert a digital signal
NOT gate
Only 1 input and 1 output
If input is HIGH, output will be LOW
If input is LOW, output will be HIGH
Boolean Equation
X = NOT A
X = A

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Figure 3-27
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Figure 3–28 Timing analysis of an inverter gate: (a) waveform sketch; (b) oscilloscope
display.

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The NAND Gate
Same as the AND gate except that its
output is inverted
Boolean Equation
X = NOT A AND B
X = AB
multiple inputs - the output is always HIGH
unless all inputs go HIGH

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The NOR Gate
Same as the OR gate except that its output
is inverted
Boolean Equation
X = NOT A + B
X = A + B
The output is always LOW unless all the
inputs are LOW

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Figure 3–10 Timing analysis of an AND gate: (a) waveform sketch; (b) actual logic analyzer
display.

Timing Diagram: Illustrates graphically how the output levels change in response to changes to the inputs

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Enable and Disable Functions
Enable
turn ON
see Figure 3-17
Disable
turn OFF
see Figure 3-18

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Figure 3–17 Using an AND gate to enable/disable a clock oscillator.

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Figure 3–18 Using an OR gate to enable/disable a clock oscillator.

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Using Integrated Circuit Logic
Gates
4 examples
7408 (74HC08) quad 2-input AND gate
7411 (74HC11) triple 3-input AND gate
7421 (74HC21) dual 4-input AND gate
7432 (74HC32) quad 2-input OR gate
Dual inline packages (DIP)

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Figure 3–19 The 7408 quad two-input AND gate IC pin configuration.

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Figure 3-20

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Figure 3–21 Pin configurations for other popular TTL and CMOS AND and OR gate ICs: (a) 7411
(74HC11); (b) 7421 (74HC21); (c) 7432 (74HC32).

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Figure 3–30 AND–INVERT equivalent of a NAND gate with A = 1, B = 1.

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Figure 3–31 Symbols for three- and eight-input NAND gates.

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Table 3–7 Truth Table for a Three-Input NAND Gate

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Using Integrated-Circuit Logic
Gates
Hex - six gates
Quad - four gates
Three-, four-, and eight-input configurations

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Figure 3-61
Figure 3-60

Digital Electronics A Practical Approach ,William Copyright ©2006 by Pearson Education, Inc.
42 Kleitz,Pearson,7th Ed 2004 Upper Saddle River, New Jersey 07458
All rights reserved.
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Figure 3-65

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Summary
The AND gate requires that all inputs are
HIGH in order to get a HIGH output
The OR gate outputs a HIGH if any of its
inputs are HIGH
An effective way to measure the precise
timing relationships of digital waveforms is
with an oscilloscope or a logic analyzer

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Summary
Beside providing the basic logic functions,
AND and OR gates can also be used to
enable or disable a signal to pass from one
point to another
There are several integrated circuits
available in both TTL and CMOS that
provide the basic logic functions

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Summary
A NAND gate outputs a LOW when all of its
inputs are HIGH
A NOR gate outputs a HIGH when all of its
inputs are LOW
Specialized waveforms can be created by
using a repetitive waveform generator and
the basic gates

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47 Kleitz,Pearson,7th Ed 2004

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