1

+ Chapter 6_P_I
Instruction Sets:
Characteristics and
Functions
+ 2

Machine Instruction
Characteristics

 The operation of the processor is determined by the

instructions it executes, referred to as machine
instructions or computer instructions
 The collection of different instructions that the
processor can execute is referred to as the processor’s
instruction set
 Each instruction must contain the information required
by the processor for execution
Elements of a Machine
3

Instruction
Operation code Source operand
(opcode) reference
• Specifies the • The operation may
operation to be involve one or more
performed. The source operands,
operation is specified that is, operands that
by a binary code, are inputs for the
known as the operation
operation code, or
opcode

Result operand Next instruction

reference reference
• The operation may • This tells the
produce a result processor where to
fetch the next
instruction after the
execution of this
instruction is
complete
4
Source and result operands can
5

be in one of four areas:

3) Processor register
 A processor contains one or
1) Main or virtual memory more registers that may be
 As with next instruction referenced by machine
references, the main or instructions.
virtual memory address
must be supplied
 If more than one register
exists each register is
assigned a unique name or
number and the instruction
2) I/O device must contain the number
 The instruction must of the desired register
specify the I/O module and 4) Immediate
device for the operation. If
memory-mapped I/O is
 The value of the operand is
used, this is just another contained in a field in the
main or virtual memory instruction being executed
address
+ 6

Instruction Representation
 Within the computer each instruction is represented by
a sequence of bits
 The instruction is divided into fields, corresponding to
the constituent elements of the instruction
+ 7

Instruction Representation
 Opcodes are represented by abbreviations
called mnemonics
 Examples include:
 ADD Add
 SUB Subtract
 MUL Multiply
 DIV Divide
 LOAD Load data from memory
 STOR Store data to memory

 Operands are also represented symbolically

 Each symbolic opcode has a fixed binary representation
 The programmer specifies the location of each symbolic
operand
 Instruction Types 8

• Arithmetic instructions provide • Movement of data into or

computational capabilities for out of register and or
processing numeric data memory locations
• Logic (Boolean) instructions
operate on the bits of a word as
bits rather than as numbers, thus
they provide capabilities for
processing any other type of
data the user may wish to
employ
Data
Data
processin
storage
g

Data
Control movemen
t
• Test instructions are used to test the • I/O instructions are
value of a data word or the status of needed to transfer
a computation programs and data into
• Branch instructions are used to memory and the results
branch to a different set of of computations back out
instructions depending on the to the user
decision made
 Table 6.1 9

Utilization of Instruction Addresses

(Nonbranching Instructions)

Simpler yet is the one-address instruction. For this to work, a

second address
must be implicit. This was common in earlier machines, with
the implied address being a processor register known as the
accumulator (AC). The accumulator contains one of the
operands and is used to store the result. In our example,
eight instructions are needed to accomplish the task.

It is, in fact, possible to make do with zero addresses for

some instructions.
Zero-address instructions are applicable to a special memory
organization called a stack. A stack is a last-in-first-Out set of
locations. The stack is in a known location and, often, at least
the top two elements are in processor registers. Thus, zero-
address instructions would reference the top two stack
For the one-address instruction, a
10
second address must be implicit.
This was common in earlier
machines, with the implied address
being a processor register known as
the accumulator (AC). The
accumulator contains
one of the operands and is used to
store the result.
Instruction Set Design 11

Very complex because it affects so many aspects of the computer

system

Defines many of the functions performed by the processor

Programmer’s means of controlling the processor

Fundamental design issues:

Operation Data types Instruction format Registers Addressing

repertoire • The various types of data • Instruction length in bits, • Number of processor • The mode or modes by
• How many and which upon which operations number of addresses, registers that can be which the address of an
operations to provide are performed size of various fields, etc. referenced by operand is specified
and how complex instructions and their use
operations should be
 12

Types of Operands

sse s
d re
Ad Num
bers

Char
acte
rs i c al
Log
Data
+ Numbers 13

 All machine languages include numeric data types

 Numbers stored in a computer are limited:
 Limit to the magnitude of numbers representable on a machine
 In the case of floating-point numbers, a limit to their precision

 Three types of numerical data are common in computers:

 Binary integer or binary fixed point
 Binary floating point
 Decimal

 Packed decimal
 Each decimal digit is represented by a 4-bit code with two digits
stored per byte
 To form numbers 4-bit codes are strung together, usually in
multiples of 8 bits
+ 14

Characters
 A common form of data is text or character strings
 Textual data in character form cannot be easily stored
or transmitted by data processing and communications
systems because they are designed for binary data
 Most commonly used character code is the
International Reference Alphabet (IRA)
 Referred to in the United States as the American Standard
Code for Information Interchange (ASCII)

 Another code used to encode characters is the

Extended Binary Coded Decimal Interchange Code
(EBCDIC)
 EBCDIC is used on IBM mainframes
+ 15

Logical Data
 Normally, each word or other addressable unit (byte, halfword, and so
on) is treated as a single unit of data. It is sometimes useful, however,
to consider an n-bit unit as consisting of n 1-bit items of data, each item
having the value 0 or 1. When data are viewed this way, they are
considered to be logical data.
 An n-bit unit consisting of n 1-bit items of data, each item having the
value 0 or 1
 Two advantages to bit-oriented view:
 Memory can be used most efficiently for storing an array of Boolean or binary
data items in which each item can take on only the values 1 (true) and 0
(false)
 To manipulate the bits of a data item
 If floating-point operations are implemented in software, we need to be
able to shift significant bits in some operations
 To convert from IRA to packed decimal, we need to extract the rightmost 4
bits of each byte
+ 16

Intel x86 Data Types

 The x86 can deal with data types of 8 (byte), 16 (word), 32 (doubleword), 64
(quad- word), and 128 (double quadword) bits in length.
 To allow maximum flexibility in data structures and efficient memory
utilization, words need not be aligned at even- numbered addresses;
doublewords need not be aligned at addresses evenly divisible by 4; and
quadwords need not be aligned at addresses evenly divisible by 8; and so on.
However, when data are accessed across a 32-bit bus, data transfers take place
in units of doublewords, beginning at addresses divisible by 4. The processor
converts the request for misaligned values into a sequence of requests for the
bus transfer. As with all of the Intel 80x86 machines, the x86 uses the little-
endian style; that is, the least significant byte is stored in the lowest address
(see Appendix 12A for a discussion of endianness).
 The byte, word, doubleword, quadword, and double quadword are referred to
as general data types. In addition, the x86 supports an impressive array of
specific data types that are recognized and operated on by particular
instructions. Table 12.2 summarizes these types.
 17

Table
12.2

x86
Data
Types
18
+ 19

Single-Instruction-Multiple-Data
(SIMD) Data Types
 Introduced to the x86 architecture as part of the extensions of
the instruction set to optimize performance of multimedia
applications
 These extensions include MMX (multimedia extensions) and SSE
(streaming SIMD extensions)
Data types:
 Packed byte and packed byte integer: Bytes packed into a 64-bit quadword or
128-bit double quadword, interpreted as a bit field or as an integer
 Packed word and packed word integer: 16-bit words packed into a 64-bit quad-
word or 128-bit double quadword, interpreted as a bit field or as an integer
 Packed doubleword and packed doubleword integer: 32-bit doublewords
packed into a 64-bit quadword or 128-bit double quadword, interpreted as a bit
field or as an integer
 Packed quadword and packed qaudword integer: Two 64-bit quadwords
packed into a 128-bit double quadword, interpreted as a bit field or as an integer
 Packed single-precision floating-point and packed double-precision floating- point: Four 32-bit
floating-point or two 64-bit floating-point values packed into a 128-bit double quadword
+ 20

ARM Processors

 ARMv7 is an older instruction set also from ARM

Holdings plc, but with 32-bit addresses instead of
ARMv8’s 64 bits.
 More than 14 billion chips with ARM processors were
manufactured in 2015, making them the most popular
instruction sets in the world.
ARMv7 Data Types 21

ARM processors support data

types of:
• 8 (byte)
• 16 (halfword)
• 32 (word) bits in length

Alignment checking
All three data types • When the appropriate
can also be used for control bit is set, a data
twos complement abort signal indicates an
alignment fault for
signed integers attempting unaligned
access

Unaligned access
• When this option is
For all three data enabled, the processor uses
types an unsigned one or more memory
interpretation is accesses to generate the
supported in which the required transfer of
adjacent bytes
value represents an transparently to the
unsigned, nonnegative programmer
integer
 22

A state bit (E-bit) in the system control register is set and cleared under program control using the
SETEND instruction. The E-bit defines which endian to load and store data
+ 23

TYPES OF OPERATIONS

 The number of different opcodes varies widely from

machine to machine. However, the same general types
of operations are found on all machines. A useful and
typical categorization is the following:
 Data transfer
 Arithmetic
 Logical
 Conversion
 I/O
 System control
 Transfer of control
 24

Table
12.3
Common
Instruction
Set
Operations
(page 1 of
2)
 25

Table 12.3
Common
Instruction Set
Operations
(page 2 of 2)
 Table 12.4 26

Processor Actions for Various Types of Operations

Data Transfer
27

Must specify:
• Location of the
Most source and
fundamental destination
operands
type of • The length of
machine data to be
instruction is transferred must
the data be indicated
• The mode of
transfer
addressing for
instruction. each operand
must be
specified
 Table 12.5 28

Examples of IBM EAS/390 Data Transfer

Operations
+
29

 Most machines provide the basic arithmetic

operations of add, subtract, multiply, and
divide
 These are provided for signed integer (fixed-
point) numbers
 Often they are also provided for floating-
point and packed decimal numbers
 Other possible operations include a variety
of single-operand instructions:
Arithmetic
 Absolute
 Take the absolute value of the operand
 Negate
 Negate the operand
 Increment
 Add 1 to the operand
Decrement
 Subtract 1 from the operand
 30

Table 12.6
Basic Logical Operations
31
 32

Table 12.7

Examples of Shift and Rotate Operations

 33

Instructions
that change
the format or Conversion
operate on the
format of data

An example of
a more
complex
editing
An example is instruction is
converting from
decimal to
the EAS/390
binary Translate (TR)
Or instruction
translating from
EBCDIC to IRA
+ 34

Input/Output

 Variety of approaches taken:

 Isolated programmed I/O
 Memory-mapped programmed I/O
 DMA
 Use of an I/O processor

 Many implementations provide only a few I/O

instructions, with the specific actions specified by
parameters, codes, or command words
 35
System Control

Instructions that can be executed only while the processor is in

a certain privileged state or is executing a program in a special
privileged area of memory

Typically these instructions are reserved for the use of the

operating system

Examples of system control operations:

Access to process control

A system control An instruction to read or
blocks in a
instruction may read or modify a storage
multiprogramming
alter a control register protection key
system
+ 36

Transfer of Control

 Reasons why transfer-of-control operations are

required:
 It is essential to be able to execute each instruction more
than once
 Virtually all programs involve some decision making
 It helps if there are mechanisms for breaking the task up
into smaller pieces that can be worked on one at a time

 Most common transfer-of-control operations found in

instruction sets:
 Branch
 Skip
 Procedure call
 37

BRP X Branch to location X if result is positive.

BRN X Branch to location X if result is negative.

BRZ X Branch to location X if result is zero.

BRO X Branch to location X if overflow occurs BRE R1, R2, X Branch to X if contents of R1 = contents of R
 Skip Instructions 38

Typically implies that

one instruction be Because the skip
skipped, thus the instruction does not
Includes an implied
implied address equals require a destination
address
the address of the next address field it is free to
instruction plus one do other things
instruction length

Example is the
increment-and-skip-if-
zero (ISZ) instruction

The increment-and-
skip-if-zero (ISZ)
instruction
+ 39

Procedure Call Instructions

 A procedure (function) is self-contained computer program
that is incorporated into a larger program
 At any point in the program the procedure may be invoked, or
called
 Processor is instructed to go and execute the entire procedure and
then return to the point from which the call took place

 Two principal reasons for use of procedures:

 Economy
 A procedure allows the same piece of code to be used many
times
 Modularity

 Involves two basic instructions:

 A call instruction that branches from the present location to the
procedure
 Return instruction that returns from the procedure to the place from
which it was called
40
41
A more flexible approach to parameter passing is the stack. When the processor 42
executes a call, it not only stacks the return address, it stacks parameters to be
passed to the called procedure. The called procedure can access the parameters
from the stack.

The example refers

to procedure P in
which the local
variables x1 and x2
are declared, and
procedure Q, which
P can call and in
which the local
variables y1 and y2
are declared
+ 43

x86 Operation Types

 The x86 provides a complex array of operation types including a
number of specialized instructions
 The intent was to provide tools for the compiler writer to produce
optimized machine language translation of high-level language
programs
 Provides four instructions to support procedure call/return:
 CALL
 ENTER
 LEAVE
 RETURN

 When a new procedure is called the following must be performed

upon entry to the new procedure:
 Push the return point on the stack
 Push the current frame pointer on the stack
 Copy the stack pointer as the new value of the frame pointer
 Adjust the stack pointer to allocate a frame
 44
Table 12.8
x86 Status Flags
 45

Table
12.9
x86
Condition
Codes
for
Conditional
Jump
and
SETcc
Instructions
ARM Operation Types 46

Data-
Load and store Branch
processing
instructions instructions
instructions

Parallel
Multiply addition and Extend
instructions subtraction instructions
instructions

Status register
access
instructions
 47

Table
12.11

ARM
Conditions
for
Conditional
Instruction
Execution
The ARM architecture
defines four condition
flags that are stored in
the program status
There are two unusual aspects to the use of condition codes in ARM:
register: N, Z, C, and
- All instructions, not just branch instructions, include a condition code field, which means V (Negative, Zero,
that virtually all instructions may be conditionally executed. Any combination of flag Carry and Overflow
settings except 1110 or 1111 in an instruction’s condition code field signifies that the
instruction will be executed only if the condition is met.
- All data processing instructions (arithmetic, logical) includes an S bit that signifies
whether the instruction updates the condition flags.
+ Summary Instruction Sets:
48

Characteristics and
Chapter 6 Functions
 Machine instruction  Intel x86 and ARM data types
characteristics
 Types of operations
 Elements of a machine
instruction  Data transfer
 Instruction representation  Arithmetic
 Instruction types  Logical
 Number of addresses  Conversion
 Instruction set design  Input/output
 Types of operands  System control
 Numbers  Transfer of control
 Characters
 Logical data
 Intel x86 and ARM operation
types