Module 4 Part 2
Module 4 Part 2
Example
1. Statement of the problem:
Addition and subtraction of two fixed-point binary numbers represented
in sign-magnitude form
The addition of two numbers stored in registers of finite length may result in a
sum that exceeds the storage capacity of the register by one bit
The extra bit is said to cause an overflow
2. Equipment Configuration 4
• Two signed binary numbers to be
added or subtracted contain n bits
• Magnitudes of the numbers contain n -
1 bits & stored in registers A and B
• Sign bits are stored in flip-flops As and
Bs
• ALU performs operations
• E serves as the overflow flip-flop(1 bit)
• Output carry is transferred to E
• Two input signals specify the add (qa)
and subtract (qs) operations
• Output variable x indicates the end of
the operation
3. Derivation of the Algorithm
5
When the numbers are added or subtracted algebraically, there are eight different conditions to consider,
depending on the sign of the numbers and the operation performed
The eight conditions may be expressed in a compact form as follows:
(±𝐴) ± (±𝐵)
If the arithmetic operation specified is subtraction, we change the sign of B and add
(±𝐴) − (+𝐵) = (±𝐴) + (−𝐵)
(± 𝐴) − (−𝐵) = (±𝐴) + (+𝐵)
This reduces the number of possible conditions to four, namely:
(±𝐴) + (±𝐵)
The four possible combination are
When the signs of A and B are the same: (+𝐴) + (+ 𝐵) = +(𝐴 + 𝐵)
(−𝐴) + (− 𝐵) = −(𝐴 + 𝐵)
When the signs of A and B are not the same (+ 𝐴) + (− 𝐵) = +(𝐴−𝐵) [ if(A>B) ]
−(𝐵−𝐴) [ if(B>A) ]
But answer is -6
A = -15
So complement As
+15 01111
So Result will be -6
-15 10000+1 = 10001
B = +9 = 01001
A A + B 10001+
01001
A 11010
9
Data Processor Register and ALU
4. Data Processor Specification 10
Control receives five inputs: Two from
external environment three from data
processor
XOR operation =1 if two signs are not same
and it is equal to 0 if signs are both +ve or
both –ve
The control unit provides an output x for
the external circuit indicating operation
terminated
Select the operation in the ALU through the
selection variables s2, s1, s0 and Cin Control Block Diagram
Other four go to register in the data
processor unit
Control State Diagram 11
12
Here we use a control organization that uses one flip – flip per state
and choose D flip flop
The next state of D flip flop is a function of the D input and is
independent of the present state
Since the method requires one flip flop per each state, we choose 8 D
flipflops and label their outputs T0, T1,…. T7
The condition for setting the given flip flop is specified in the state
diagram
14
Boolean functions for
control
For example, flip-flop T2 is set with the next clock pulse if T1= I or if T0 15
= 1 and qa = 1
This condition can be defined with the Boolean function:
DT2 = qaT0 + T1
where DT2 designates the D input of flip-flop T2
If there is more than one directed line going into a state, all conditions
must be ORed
Initially, flip-flop T0 is set and all others are cleared
At any given time, only one D input is in the 1 state while all others are
maintained at 0
The next clock pulse sets the flip-flop whose D input is 1 and clears all
others
16
17
Microprogram Control
Control Memory 18
In a micro-program control, the control variables that initiate micro-operations are
stored in memory called control memory
The control memory is a ROM, since the control sequence is permanent and needs no
alteration
Micro Instructions
The word stored in the control memory are micro-instructions
Each micro-instruction specifies one or more micro-opeartions
Once the micro-operations are executed the control unit must specify the address of the
next micro-instruction
The micro instruction contains bits for
1. Initiating micro-operations
2. Generating next address
A micro-program control unit must include special circuits for selecting the next address
as specified by the micro-instructions
19
Micro-instructions
14 13 12 11 10 9 8 7 6 5 4 3 2 1
14 bit micro-instruction
Bit 1-9: control word used to select a micro-operation
Bit 10-12: 3 bit address to select 8 words
Bit 13-14: selection bits for the multiplexer
Bit 1 provides the initial state condition denoted by variable x and also
enables an external address when qs and qa are equal to 1
When x = 1, the address field of the micro instruction must be 000
Then if qs =1, address 001 is available at the input of CAR, but if qa=1,
address 010 is applied to CAR
If both qs and qa are 0, the zero address from bits 10 11 and 12 are applied
to the input of CAR
In this way control memory stays at address 0 until an external variable is
enabled
If bits 13 and 14 are 00, a multiplexer input that is equal to 0 is selected
23
The output of the multiplexer is 0 and increment input to CAR is enabled
This configuration increments CAR to choose the next address in the sequence
An input of 1 is selected by the multiplexer when bits 13 and 14 are equal to 01
The output of the multiplexer is 1 and external input is loaded onto the CAR
Status variable S is selected when bits 13 and 14 or equal to 10
If S=1, the output of the multiplexer is 1 and address bits of the micro
instructions are loaded into CAR ( provided x=0)
If S=0, the output of a multiplexer is 0 and CAR is incremented
With bits 13 and 14 equal to 11, status variable E is selected and the address
field is loaded into CAR. If E=1, but CAR is incremented if equal to 0
Thus, the multiplexer allows the control to choose between two addresses
depending on the value of the status with selected.
Microprogram control block
diagram 24
Microprogram 25