Pancake syrup manufacturing-Tank control

Introduction

In this digital system application ,the digital control logic for controling the fluid in a storag
tank is developed. the purpose of the logic is maintain an appropriate level of fluid by
controlling the inlet and outlet valves .also the logic must control the temperature of the
fluid with in a certain range if any of the level or temperature sensors fail.
 Requirement
The tank holds corn syrup for use in a pancake syrup manufacturing process

FIGURE 1 Tank with level and temperature

sensors and controls
 Requirement

1. The temperature of the corn syrup when released from the tank into a
mixing vat must be at a specified value for proper viscosity to produce
required flow characteristics.
 This temperature can be selected via a keypad input.
 The control logic maintains the temperature at this value by turning a
heater on and off.
 The analog output from the temperature transducer (Tanalog) is
converted to an 8-bit binary code by an analog-to digital converter and
then to an 8-bit BCD code.
 A temperature controller detects when the temperature falls below the
specified value and turns the heater on.
 When the temperature reaches the specified value, the heater is turned
off.
 Requirement

2. The level sensors Produce a HIGH when the corn syrup is at or above the
minimum or at the maximum level. The valve control logic detects when the
maximum level (Lmax) or minimum level (Lmin) has been reached and when
mixture is flowing into the tank (Finlet). Based on these inputs, the control
logic opens or closes each valve (Vinlet and Voutlet).
▪ New corn syrup can be added to the tank via the inlet valve only when the
minimum level is reached. Once the inlet valve is opened, the level in the tank
must reach the maximum point before the inlet valve is closed. Thus, the
conditions for which the inlet valve is open, allowing the tank to fill, are
• The solution level is at minimum (L min).
• The tank is filling (Fin let) but the maximum level has not been
reached (L max)’.
 Requirement

 Also, once the outlet valve is opened, the level must reach the minimum
point before the outlet valve is closed. New syrup is always cooler than the
syrup in the tank. Syrup cannot be released from the tank while it is being
filled or its temperature is below the specified value. Thus, the conditions
for which the outlet valve is open allowing the tank to drain are
 The syrup level is above minimum and the tank is not filling.
 The temperature of the syrup is at the specified value.
 solution

Output
• Inlet Valve Control :-Table 1 is the truth table for the inlet valve.
• A HIGH(1) is the active level for the inlet valve to be open (on).
 solution

TABLE 1 Truth table for inlet valve control.

 solution

• Output Solution From the truth table, an expression for the inlet valve
control output can be written.
• Vinlet = L’maxL’minF’inlet + L’maxL’minFinlet + L’maxLminFinlet
• The SOP expression for the inlet valve logic can be reduced to the
following simplified expression using Boolean methods:
 solution

• From the truth table, an expression for the outlet valve control can be
written.
Voutlet = L’maxLminF’inlet T + LmaxLminF’inlet
• The SOP expression for the outlet valve logic can be reduced to the
following simplified expression:
Voutlet = LminF’inletT
 solution

• Output Outlet Valve Control :-Table 2 Truth table for outlet valve control
 solution

 Temperature Control The temperature control logic accepts an 8-

bit BCD code representing the measured temperature and
compares it to the BCD code for the specified temperature. A
block diagram is shown in Figure 2
 solution

 When the measured temperature and the specified temperature

are the same, the two BCD codes are equal and the T output is
LOW (0).
 When the measured temperature falls below the specified value,
there is a difference in the BCD codes and the T output is HIGH(1),
which turns on the heater.
 The temperature control logic can be implemented with exclusive-
OR gates, as shown in Figure 3. Each pair of corresponding bits
from the two BCD codes is applied to an exclusive-OR gate.
 If the bits are the same, the output of the XOR gate is 0; and if they
are different, the output of the XOR gate is 1. When one or more
XOR outputs equal 1, the T output of the OR gate equals 1, causing
the heater to turn on
 solution

FIGURE 2 Block diagram for temperature

control circuit
solution
 Traffic signal controller :part 1

 Let's say the Harari people Regional state Transportation and Road
development bureau offers you the opportunity to build the control logic
for a traffic signal at the intersection of a side street with little traffic and a
busy main route. We'll provide the system requirements.
 We'll provide the system requirements
 Timing Requirements

 The control logic must establishes the sequencing of the lights for a traffic
signal at the intersection of a busy main street and an occasionally used
side street. The following are the timing requirements:
• The green light for the main street will stay on for a minimum of 25 s or as
long as there is no vehicle on the side street.
• The green light for the side street will stay on until there is no vehicle on
the side street up to a maximum of 25 s.
• The yellow caution light will stay on for 4 s between changes from green
to red on both the main street and the side streets
 Solution
block diagram
As seen in Figure 4, the traffic signal controller
is made up of three components:
 Solution
The sequential logic unit.

 It produces the 2-bitGray code 4-state sequence and

• A state diagram that depicts the entire procedure can be created based
on the timing specifications.
• The order of states, the prerequisites for each state, and the prerequisites
for changing from one state to the next are all visually represented in a state
diagram.
Defining the Variables
▪ The variables that determine how the system sequences through the
various states are defined as
• Vs A vehicle is present on the side street.
• TL The 25 s timer (long timer) is on.
• TS The 4 s timer (short timer) is on.
 A complemented variable indicates the opposite condition
 solution

State Descriptions A state diagram is shown in

Figure 5

 Each of the four states is assigned a 2-

bit Gray code as indicated.
 A looping arrow means that the system
remains in a state, and an arrow
between states means that the system
transitions to the next state.
 The Boolean expression or variable
associated with each of the arrows in
the state diagram indicate the
condition under which the system
remains in a state or transitions to the
next
FIGURE 5 State diagram for the traffic signal
control.
 solution

First State
 The Gray code is 00. In this state, the light is green on the main street and
red on the side street for 25 s when the long timer is on or there is no
vehicle on the side street.
 This condition is expressed as TL +V’s . The system transitions to the next
state when the long timer goes off and there is a vehicle on the side
street. This condition is expressed as T’LVs .
Second State
 The Gray code is 01. In this state, the light is yellow on the main street
and red on the side street.
 The system remains in this state for 4s when the short timer is on. This
condition is expressed as TS. The system transitions to the next state when
the short timer goes off
 This condition is expressed as TS’
 solution

Third State
 The Gray code is 11. In this state, the light is red on the main street and
green on the side street for 25 s when the long timer is on as long as there
is a vehicle on the side street.
 This condition is expressed as TLVs . The system transitions to the next
state when the long timer goes off or when there is no vehicle on the side
street. This condition is expressed as TL’ +Vs’ .
Fourth State
 The Gray code is 10. In this state, the light is red on the main street and
yellow on the side street. The system remains in this state for 4 s when the
short timer is on. This condition is expressed as TS. The system transitions
back to the first state when the short timer goes off. This condition is
expressed as TS’.
 Solution
The combinational logic
It consists of a state decoder, light output logic,
and trigger logic, as shown in Figure 6

FIGURE 6 Block diagram of the combinational

logic unit
 solution

State Decoder
 This logic decodes the 2-bit Gray code from the sequential logic to
determine which of the four states the system is in. The inputs to
the state decoder are the two Gray code bits G1 and G0 . There are
four state outputs S1 , S2 , S3 , and S4 . For each of the four input
codes, one and only one of the outputs is activated. The truth table
for the state decoder logic is shown below The Boolean expressions
for the state outputs in terms of the inputs are
 S1 =G1’G0’ S2 =G’1G0
 S3 =G1G0’ S4 =G1G0
solution
 Solution

State decoder
The logic diagram is shown below
 solution

Light Output Logic

 This logic has the four state outputs (S1–S4 ) of the state decoder as its
inputs (L1–L4 ) and produces six outputs to turn the traffic lights on and
off.
 These outputs are designated MR, MY, MG (main red, main yellow, main
green) and SR, SY, SG (side red, side yellow, side green).
 The state diagram shows that the main red is on in the third state (L3 ) or
in the fourth state (L4 ), so the Boolean expression is MR = L3 + L4
 The main yellow is on in the second state (L2 ), so the expression is MY =
L2
 The main green is on in the first state (L1 ), so the expression is MG = L1
 solution

 Similarly, the state diagram is used to obtain the following expressions for
the side street:
SR = L1 + L2
SY = L4
SG = L3
solution
 solution

Trigger Logic
 The trigger logic produces two outputs, the long trigger output and the
short trigger output.
 The long trigger output initiates the 25 s timer on a LOW-to-HIGH
transition at the beginning of the first or third states.
 The short trigger output initiates the 4 s timer on a LOW-to-HIGH
transition at the beginning of the second or fourth states.
 The Boolean expressions for this logic are Long
Trig = T1 + T3 Short
Trig = T2 + T4
Equivalently,
Long Trig = T1 + T3
Short Trig = T1 + T3
 solution

Trigger Logic
 Traffic signal controller: part 2

 The combinational logic unit of the traffic signal controller was completed in
Chapter 3.
 Now, the timing circuits and sequential logic are developed.
 Recall that the timing circuits produce a 25 s time interval for the red and
green lights and a 4 s interval for the yellow caution light. These outputs will
be used by the sequential logic.
Timing Circuits
 The timing circuits unit of the traffic signal controller consists of a 25 s timer
and a 4 s timer and a clock generator. One way to implement this unit is with
two 555 timers configured as one-shots and one 555 timer configured as an a
stable multi vibrator(oscillator), as you discussed in your assignment.
 Component values are calculated based on the formulas given. Another way
to implement the timing circuits is shown in Figure 7
 Timing circiuts

FIGURE 7 Block diagram of the timing circuits

unit
 Timing circuit

 An external 24 MHz system clock (arbitrary value) is divided down to an

accurate 1 Hz clock by the frequency divider.
 The 1Hz clock is then used to establish the 25 s and the 4 s intervals by
counting the 1Hz pulses.
 This approach lends itself better to aVHDL description
 Sequential Logic

 The sequential logic unit controls the sequencing of the traffic lights,
based on inputs from the timing circuits and the side street vehicle sensor.
The sequential logic produces a 2-bit Gray code sequence for each of the
four states that were described in Chapter 3.
The Counter
 The sequential logic consists of a 2-bit Gray code counter and the
associated input logic, as shown in Figure 8
 The counter produces the four-state sequence on outputs G0 and G1 .
 Transitions from one state to the next are determined by the short timer
(TS), the long timer (TL), and vehicle sensor(Vs) inputs
 Sequential logic

FIGURE 8 Sequential logic diagram with two D

flip-flops used to implement the 2-bit Gray
code counter.
 Sequential logic

The diagram in Figure 9 shows how two D flip- flops can be used to implement the
Gray code counter. Outputs from the input logic provide the D inputs to the flip-flops
so they sequence through

FIGURE 9 Block diagram of the sequential logic

 Sequential logic

The Dflip-flop transition table is shown in Table

2

▪ A next-state table developed from the state

diagram in Chapter 3 Applied Logic is shown in
Table 3
 Sequential logic

Table 3
 Sequential logic

The Input Logic

 Using Tables 2 and 3, the conditions required for each flip-flop to
go to the 1 state can be determined.
 For example, G0 goes from 0 to 1 when the present state is 00
and the condition on input D0 is TL ’Vs , as indicated on the second
row of Table 3.
• D0 must be a 1 tomakeG0 go to a 1 or to remain a 1 on the next
clock pulse.
 A Boolean expression describing the conditions that make D0 a 1
is derived from Table 3 as follows:
D0 = G1'G0’TL’Vs + G1’G0TS + G1’G0TS’ + G1G0TLVs
D0 = = G1'G0’TL’Vs + G1’G0 + G1G0TLVs
 Sequential logic

• Also, from Table 3, an expression forD1 can be developed as follows:

D1 =G1’G0TS’ +G1G0TLVs +G1G0TL’ +G1G0Vs’ +G10’TS
• Based on the minimized expression for D0 and D1 , the complete
sequential logic diagram is shown in figure 10
 Sequential logic

FIGURE 10 Complete diagram for the

sequential logic