Microprocessor and Interfacing

(MPI)
GTU # 3160712

Unit-4:
Assembly
Language
Programming
Basics
PART-I: 8085 Instruction Set
 Looping
Topics to be covered
 Assembly Language Programming
Basics
 Hierarchy of Languages
 Compilers and Assemblers
 Instructions and Machine Language
 Advantages of High-Level Languages
 Why to Learn Assembly Language?
 Assembly Language Programming
Tools
 Classification of 8085 Instructions
 Based on Byte Size
 Based on Function
Hierarchy of Languages
Hierarchy of Languages
Application
Program
• Assembly
High Level language is
Machine Independent Language High Level Language
a low-level
Machine Specific Assembly programmi
Low Level Language
Language ng
1100 language
MOV 1011 Machine designed
BL,05h 1100 Language for a
ADD CL 1110
specific
MUL BH 0100
1111 Micro Program •type
Native toofa processor:
Control processor.
executed directly by
• Uses
hardware
Hardware •symbolic
Instructions consist of binary
names
code: 1stoand 0s
represent
operations,
registers
and
Compilers and
Assemblers
Compilers and Assemblers
High Level
Language

Compil
er

Compil Assembly
er Language
Assemb
ler

Machine
Language
Compilers translate high-level programs
Assemblers to assembly code to
translates
machine code machine code
either directly, or Indirectly via an assembler
Instructions and
Machine Language
Instructions and Machine Language
 Each command of a program is called an instruction (it instructs the
computer, what to do?).
 Computers only deal with binary data, hence the instructions must be in
binary format (0’s and 1’s).
 Therefore, each Opcode is having unique bit pattern of (0’s and 1’s).
Instruction Fields
 Assembly language instructions usually are made up of several fields.
 Each field specifies different information.
The major two fields are:
1. Opcode: Operation code that specifies operation to be performed.
Each operation has its unique opcode.
2. Operands: Fields which specify, where to get the source and destination operands
for the operation specified by the opcode.
Instruction Fields

Opcod Operand
e
MOV Rd, Rs
M, Rs
R, M

Rd  Destination Register
Rs  Source Register
M  Memory
Translating Languages

English: Sum of A and B

High-Level Language: A + B

A statement in a high-level language is

translated typically into several machine-level
instructions
Assembly Language: Machine
MVI A,02 Language:
MVI B,03 1001 1011 0010
ADD B 1001 1001 0011
1011 0011 0010
Advantages of High-
Level Languages
Advantages of High-Level Languages
 Program development is faster
 High-level statements: fewer instructions to code.
 Program maintenance is easier
 As Higher Level Language contains fewer instruction code.
 Programs are portable
 Contain few machine-dependent details.
 Can be used with little or no modifications on different machines.
 Compiler translates to the target machine language.
Why to Learn Assembly
Language?
Why to Learn Assembly Language?
 Accessibility to system hardware
 Assembly Language is useful for implementing system software.
 It is also useful for small embedded system applications.
 Space and Time efficiency
 Understanding sources of program efficiency.
 Tuning program performance.
 Writing compact code.
 It is helpful for
 Compiler writing
 Programming microcontrollers
 Device drivers
 System design
 Low-level numeric routines
Why to Learn Assembly Language?
 Writing assembly programs gives the computer designer, deep
understanding of the instruction set and how to design.
 To be able to write compilers for HLL (Higher Level Language), we need to
be expert with the machine language. Assembly programming provides
such experience.
Assembly Language
Programming Tools
Assembly Language Programming Tools
1. Assembler
2. Linker
3. Debugger
4. Editor
Assembler
 An assembler is a program that converts programs written in assembly
language into object files(machine language).
 Popular assemblers have emerged over the years for the Intel family of
processors. These include …
 TASM (Turbo Assembler from Borland).
 NASM (Net wide Assembler for both Windows and Linux), and
 GNU assembler distributed by the free software foundation.
Linker
 A linker program is required to produce executable files.
 It combines program's object file created by the assembler with other
object files and link libraries, to produces a single executable program.
Assembly Language Programming Tools
Assemble and Link Process
Source Object
File Assembler File

Source Object Executable

File Assembler File Linker
File

Link
Source Object
Assembler Libraries
File File

A project may consist of multiple source files

Assembler translates each source file separately into an
object file
Linker links all object files together with link libraries
Debugger
 Allows you to trace the execution of a program.
 Allows you to view code, memory, registers etc.
 Example: WinDbg, GDB - the GNU debugger, etc.
Editor
 Allows to create assembly language source files.
 Some editors provide syntax highlighting features and can be customized
as per programming environment.
Classification of
8085 Instructions
 Classification of 8085 Instructions

Based on Byte Size Based on Function

One-byte Instructions Data Transfer Instructions
Requires one memory location
to perform an operation
Arithmetic Instructions
E.g. CMA, ADD

Two-byte Instructions Logic & Bit Manipulation

Requires two memory locations Instructions
to perform an operation Branch Instructions
E.g. MVI A,32H

Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Classification of 8085 instructions
 An instruction is a binary pattern designed inside a microprocessor to
perform a specific function.
 Each instruction is represented by an 8-bit binary value called Op-Code.
 The entire group of instructions that a microprocessor supports is known
as an Instruction Set.
Classification of 8085 instructions
Instruction Set
 It is the set of instructions that the microprocessor can understand.
Opcode
 Known as Operation Code.
 This required field contains the mnemonic operation code for the 8085 instruction.
Operand
 The operand field identifies the data to be operated on by the specified opcode.
 Some instructions require no operands, while others require one or two operands.

MVI D, 8BH

Opco Opera
de nd
Classification of 8085 instructions
General Terms

R 8085 8-bit register (A, B, C, D, E, H,

M L)
Memory
Rs Register Source
Rd Register Destination
Rp Register Pair (BC, DE, HL)
One-byte Instruction

One-byte instructions includes Opcode and Operand in the same

byte.
Instruction Binary Code Hexa Code
Opcode Operand
MOV C,A 0100 1111 4FH
ADD B 1000 0000 80H
CMA 0010 1111 2FH
List of one-byte Instructions
Sr Instruction Sr. Instruction Sr. Instruction Sr. Instruction
.
1 MOV 13 SBB R/M 25 RNZ 37 CMA
dest.,src
2 LDAX RP 14 INR R/M 26 RPE 38 CMC
(B/D)
3 STAX RP 15 INX RP 27 RPO 39 STC
4 XCHG 16 DCR R/M 28 RST 0-7 40 NOP
5 SPHL 17 DCX RP 29 CMP R/M 41 HLT
6 XTHL 18 DAA 30 ANA R/M 42 DI
7 PUSH RP 19 RET 31 XRA R/M 43 EI
8 POP RP 20 RC 32 ORA R/M 44 RIM
9 ADD R/M 21 RNC 33 RLC 45 SIM
10 ADC R/M 22 RP 34 RRC
11 DAD 23 RM 35 RAL
12 SUB R/M 24 RZ 36 RAR
Two-byte Instruction
In two-byte instruction,
1st Byte : Specifies Opcode
2nd Byte: Specifies Operand

Instruction Binary Code Hexa Code

Opcode Operand
MVI A,32H 0011 1110 3E: 1st Byte
0011 0010 32: 2nd Byte
MVI B,F2H 0011 1110 3E: 1st Byte
1111 0010 F2: 2nd Byte
IN 0AH 1101 1011 DB: 1st Byte
0000 1010 0A: 2nd Byte
List of two-byte Instructions
Sr. Instruction
1 MVI destination,8-bit
data
2 OUT 8-bit port address
3 IN 8-bit port address
4 ADI 8-bit data
5 ACI 8-bit data
6 SUI 8-bit data
7 SBI 8-bit data
8 CPI 8-bit data
9 ANI 8-bit data
10 XRI 8-bit data
11 ORI 8-bit data
Three-byte Instruction

In three-byte instruction,
1st Byte: Specifies Opcode
2nd Byte: Specifies lower order 8-bit address
3rd Byte: Specifies higher order 8-bit address

Instruction Binary Code Hexa Code

Opcode Operand
LDA 2050H 0011 1010 3A: 1st Byte
0101 0000 50: 2nd Byte
0010 0000 20: 3rd Byte
JMP 2085H 1100 0011 C3: 1st Byte
1000 0101 85: 2nd Byte
0010 0000 20: 3rd Byte
List of three-byte Instructions
Sr. Instruction Sr. Instruction
1 LDA 16-bit 13 JPE 16-bit
address address
2 LXI Rp, 16-bit 14 JPO 16-bit
data address
3 LHLD 16-bit 15 CALL 16-bit
address address
4 STA 16-bit 16 CC 16-bit
address address
5 SHLD 16-bit 17 CNC 16-bit
address address
6 JMP 16-bit 18 CP 16-bit
address address
7 JC 16-bit 19 CM 16-bit
address address
8 JNC 16-bit 20 CZ 16-bit
address address
9 JP 16-bit 21 CNZ 16-bit
 Classification of 8085 Instructions

Based on Byte Size Based on Function

One-byte Instructions Data Transfer Instructions
Requires one memory location
to perform an operation
Arithmetic Instructions
E.g. CMA, ADD

Two-byte Instructions Logic & Bit Manipulation

Requires two memory locations Instructions
to perform an operation Branch Instructions
E.g. MVI A,32H

Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Data Transfer
Instructions
Data Transfer Instructions
 Instructions copy data from source to destination.
 While copying, the contents of source is not modified.
 Data Transfer Instructions do not affect the flags.
MOV: Move data from source to destination

Instruction Description Example

Opcod Operan
e d
MOV Rd, • This instruction copies the MOV B, C ; BC
Rs contents of the source MOV B,
MOV M, R register into the destination M;BM[HL]
MOV R, M register. MOV M, B; M[HL]B
• Contents of the source
register is not altered.
• If one of the operands is a
memory, its location is
specified by the contents of
the HL registers.
• one-byte instruction.
MVI: Load 8-bit to Register/Memory

Instruction Description Example

Opcod Operan
e MVI d R, • The 8-bit data is stored in MVI B, 57H; B12
Data the destination register or MVI M, 12H ;
M, memory. M[HL]12
Data • If the operand is a memory
location, its location is
specified by the contents
of the HL registers.
• Two-byte instruction.
Example: LDA Instruction

LDA
2050H
Register Memor
s y 02 2000
A
04 …
B C 0A ..
06 .
D E
0F 2049
H L 0D 205
05 0051
2
03 2052
LDA: Load Accumulator

Instruction Description Example

Opcod Operan
e d
LDA 16- • The contents of a memory LDA 2050H
bit location, specified by a 16-bit LDA 0006H
address in the operand, is
address copied to the accumulator.
• The contents of the source is
not altered.
• Three-byte instruction.
LDAX: Load the accumulator indirect

Instruction Description Example

Opcod Operan
e d
LDAX Rp • The contents of a memory LDAX B ;
(B/D) location, specified by a 16-bit AM[BC]
address in the operand, is LDAX D ;
copied to the accumulator. AM[DE]
• The contents of the source is
not altered.
Example: LDAX Instruction

LDAX B ;
AM[BC]
Register Memor
s y 02 0001
A
04 0002
B 00 06 C 0A 0003
06 0004
D E
0F 0005
H L 0D 0006
05 0007
03 0008
LXI: Load the immediate register pair

Instruction Description Example

Opcod Operand
e LXI H, 2034H
LXI Rp, 16- The instruction loads
bit immediate 16-bit data
Data into register pair.
Register
s
A
B
D
H 20 34 L
STA: Store Accumulator

Instruction Description Example

Opcod Operan
e d
STA 16-bit The contents of accumulator is STA 0002H
copied into the memory location
16-bit memory address
address specified by the operand.
STAX: Store Accumulator Indirect

Instruction Description Example

Opcod Operan
e d STAX B;M[BC]A
STAX Rp The contents of accumulator is
copied into memory location
specified by the contents of the
operand (register pair). The
contents of the accumulator is
not altered.
Register 02 0001Memor
s 04 0002y
A 0D 0A 0003
06 0004
B 00 06 C 0F 0005
D E 04 0006
05 0007
H L 03 0008
Example: LHLD Instruction
LHLD
0006H
Register Memor
s y
02 0001
A
04 0002
B C 0A 0003
06 0004
D E
0F 0005
H L 0D 0006
05 0007
03 0008
LHLD: Load H and L registers direct

Instruction Description Example

Opcod Operan
e d
LHLD 16- • The instruction copies LHLD 2050H
bit contents of the memory LHLD 0006H
location pointed out by the
address address into register L and
copies the contents of the
next memory location into
register H.
• The contents of source
memory locations is not
altered.
SHLD: Store H and L registers direct

Instruction Description Example

Opcod Operan
eSHLD d 16- The contents of register L is SHLD 0002H
bit stored in memory location
specified by the 16-bit address
address in the operand and the contents
of H register is stored into the
next memory location by
incrementing the operand.
Memor
y 0001
0002
H A2
A2 D3 L 0003
0004
XCHG: Exchange H and L with D and E

Instruction Description Example

Opcod Operan
e XCHGd The contents of register H are XCHG
None exchanged with the contents of
register D, and the contents of
register L are exchanged with
the contents of register E.

D A2 03 E D D3 08 E
H D3 08 L H A2 03 L
SPHL: Copy H and L registers to stack pointer

Instruction Description Example

Opcod Operan
eSPHL d
None The instruction loads the SPHL
contents of the H and L registers
into the stack pointer register,
the contents of H register
provide the high-order address
and the contents of L register
provide the low-order address.
The contents of the H and L
registers are not altered. SP
H A2 D3 L (16)
XTHL: Exchange H and L with top of stack

Instruction Description Example

Opcod Operan
eXTHL d
None The contents of L register is XTHL
exchanged with stack location
pointed out by contents SP. The
contents of the H register are
exchanged with the next stack
location (SP+1).

Register Memor
s y 0001
3F 0002 SP
H A2 D3 L 0003
2C SP
0004
Example: PUSH Instruction
PUSH B
SP <- SP-1
SP <- B ;transfer high
order bit to TOS
SP <- SP-1
SP <- C ;transfer low
order bit to TOS
Register Memor
s SP y 23 0008
A
SP 06 0007
B 06 40 C SP 40 0006
D E 0005
0004
H L 0003
0002
0001
PUSH: Push the register pair onto the stack
Instruction Description Example
Opcod Operan
e d The contents of the register pair PUSH B
PUSH Rp
designated in the operand are
copied onto the stack in the
following sequence.
1. The SP register is
decremented and the
contents of the high order
register (B, D, H) are copied
into that location.
2. The SP register is
decremented again and the
contents of the low-order
register (C, E, L) are copied
to that location.
Example: POP Instruction

Register Memo
s SP ry03 0008
A
SP 06 0007
B 06 40 C SP 40 0006
D 0005
E
0004
H L 0003
0002
0001
POP B
C <- SP ; transfer to low order bit
from TOS
SP <- SP+1

B <- SP ; transfer to high order bit

from TOS
SP <- SP+1
POP: Pop off stack to the register pair

Instruction Description Example

Opcode Operand

POP Rp The contents of the memory POP B

location pointed out by the
stack pointer register are copied
to the low-order register (C, E, L)
of the operand.
1. The stack pointer is
incremented by 1 and the
contents of that memory
location are copied to the
high-order register (B, D, H)
of the operand.
2. The stack pointer register is
again incremented by 1.
OUT: Output from Accumulator to 8-bit port

Instruction Description Example

Opcod Operan
e d OUT 0AH
OUT 8-bit The contents of the accumulator
port are copied into the I/O port
specified by the operand.
address
IN: Input data to accumulator from with 8-bit port

Instruction Description Example

Opcod Operan
e d IN 0AH
IN 8-bit The contents of the input port
port designated in the operand are
read and loaded into the
address accumulator.
 1 MOV Dst,Src Copy content 1 Byte
2 MVI (R/M), 8-bit Load 8-bit to Register/Memory 2 Byte
3 Data
LDA 16-bit address Load Accumulator 3 Byte
4 LDAX Rp(B/D) Load the accumulator indirect 1 Byte
5 LXI Rp, 16-bit Data Load the register pair immediate 3 Byte
Data Transfer Instructions

6 STA 16-bit address Store Accumulator 3 Byte

7 STAX Rp Store Accumulator Indirect 1 Byte
8 LHLD 16-bit address Load H and L registers direct 3 Byte
9 SHLD 16-bit address Store H and L registers direct 3 Byte
1 XCHG None Exchange H and L with D and E 1 Byte
0
1 SPHL None Copy H and L registers to the stack 1 Byte
1 pointer
1 XTHL None Exchange H and L with top of 1 Byte
2 stack
1 PUSH Rp Push the register pair onto the 1 Byte
3 stack
1 POP Rp Pop off stack to the register pair 1 Byte
4
1 OUT 8-bit port Output from Accumulator to 8-bit 2 Byte
5 port address
address
1 IN 8-bit port Input data to accumulator from a 2 Byte
6 port with 8-bit address
address
 Classification of 8085 Instructions

Based on Byte Size Based on Function

One-byte Instructions Data Transfer Instructions
Requires one memory location
to perform an operation
Arithmetic Instructions
E.g. CMA, ADD

Two-byte Instructions Logic & Bit Manipulation

Requires two memory locations Instructions
to perform an operation Branch Instructions
E.g. MVI A,32H

Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Arithmetic Instructions
 1 ADD R/M Add register or memory, to the 1 Byte
accumulator
2 ADC R/M Add register to the accumulator with 1 Byte
carry
3 ADI 8-bit Add the immediate to the accumulator 2 Byte

Arithmetic Instructions
4 data
ACI 8-bit Add the immediate to the accumulator 2 Byte
data with carry
5 DAD R p
Add the register pair to H and L registers 1 Byte
6 SUB R/M Subtract the register/memory from 1 Byte
accumulator
7 SBB R/M Subtract the source and borrow from 1 Byte
accumulator
8 SUI 8-bit Subtract the immediate from the 2 Byte
data accumulator
9 SBI 8-bit Subtract immediate from accumulator 2 Byte
1 data with borrow
INR R/M Increment the register or the memory by 1 Byte
0 1
1 INX Rp Increment register pair by 1 1 Byte
1
1 DCR R/M Decrement the register or the memory by 1 Byte
2 1
1 DCX Rp Decrement register pair by 1 1 Byte
3
1 DAA Decimal adjust accumulator 1 Byte
4
ADD: Add register/memory to accumulator

Instruction Description Example

Opcod Operan
e d
ADD R/M • The contents of the operand ADD B; A = A + B
(register or memory) are ADD M; A = A +
added to the contents of the M[HL]
accumulator and the result is
stored in the accumulator.
• If the operand is a memory
location, its location is
specified by the contents of
the HL registers.
• All flags are modified to
reflect the result of the
addition.
ADC: Add register to accumulator with carry

Instruction Description Example

Opcod Operan
e d
ADC R/M • The contents of the operand ADC B; A = A + B
(register or memory) and the + CY
ADC M; A = A +
Carry flag are added to the
M[HL]+CY
contents of the accumulator
and the result is stored in the
accumulator.
• If the operand is a memory
location, its location is
specified by the contents of
the HL registers.
• All flags are modified to
reflect the result of the
addition.
ADI: Add immediate 8-bit with accumulator

Instruction Description Example

Opcod Operan
eADI d8-bit • The 8-bit data (operand) is ADI 03; A=A+
data added to the contents of the 03h
accumulator and the result is
stored in the accumulator.
• All flags are modified to
reflect the result of the
addition.
ACI: Add immediate 8-bit to accumulator with
carry

Instruction Description Example

Opcod Operan
e d
ACI 8-bit • The 8-bit data (operand) and ACI 03; A=A+
data the Carry flag are added to 03h + CY
the contents of the
accumulator and the result is
stored in the accumulator.
• All flags are modified to
reflect the result of the
addition.
DAD: Add register pair to H and L registers

Instruction Description Example

Opcod Operan
e d DAD B
DAD Rp • The 16-bit contents of the
specified register pair are
added to the contents of the
HL register and the sum is
stored in the HL register.
• The contents of the source
register pair are not altered.
• If the result is larger than 16
bits, the CY flag is set. No
other flags are affected.
DAD Instruction

Register
s

A
B 02 08 C
D E +
H 02
04 0B
03 L 02 03

04 0B

DAD B
SUB: Subtract register/memory from
accumulator
Instruction Description Example
Opcod Operan
e d
SUB R/M • The contents of the operand SUB B ; A=A-B
(register or memory) is SUB M ; A=A-M[HL]
subtracted from the contents
of the accumulator, and the
result is stored in the
accumulator.
• If the operand is a memory
location, its location is
specified by the contents of
the HL registers.
• All flags are modified to
reflect the result of the
subtraction.
SBB: Subtract source & borrow from
accumulator

Instruction Description Example

Opcod Operan
e d SBB B; A=A -
SBB R/M • The contents of the operand
(register or memory) and the (B+CY)
Borrow flag are subtracted SBB M; A=A-(M[HL]
+CY)
from the contents of the
accumulator and the result is
placed in the accumulator.
• If the operand is a memory
location, its location is
specified by the contents of
the HL registers.
• All flags are modified to
reflect the result of the
subtraction.
SUI: Subtract immediate 8-bit from accumulator

Instruction Description Example

Opcod Operan
e d SUI 08h; A = A -
SUI 8-bit • The 8-bit data (operand) is
data subtracted from the contents 08h
of the accumulator and the
result is stored in the
accumulator.
SBI: Subtract immediate from accumulator with
borrow

Instruction Description Example

Opcod Operan
e d
SBI 8-bit • The 8-bit data (operand) and SBI 08h; A=A -
data the borrow (CY) are (08h+CY)
subtracted from the contents
of the accumulator and the
result is stored in the
accumulator.
INR: Increment register/memory by 1

Instruction Description Example

Opcod Operan
e d INR B;B=B+01
INR R/M • The contents of the
designated register or INR
memory is incremented by 1 M;M[HL]=M[HL]
+01
and the result is stored at the
same place.
• If the operand is a memory
location, its location is
specified by the contents of
the HL registers.
INX: Increment register pair by 1

Instruction Description Example

Opcod Operan
e d INX D;
INX Rp The contents of the designated
register pair is incremented by 1 DE=DE+0001
and the result is stored at the
same place.
DCR: Decrement register/ memory by 1

Instruction Description Example

Opcod Operan
e d
DCR R/M • The contents of the DCR B;B=B-01
designated register or DCR
memory is decremented by 1 M;M[HL]=M[HL]-01
and the result is stored in the
same place.
• If the operand is a memory
location, its location is
specified by the contents of
the HL registers.
DCX: Decrement register pair by 1

Instruction Description Example

Opcod Operan
e d DCX B; BC=BC-
DCX Rp The contents of the designated
register pair is decremented by 0001
1 and their result is stored at the DCX D; DE=DE-
0001
same place.
DAA: Decimal Adjust Accumulator
Instruction Description Example
Opcod Operan
e d DAA
DAA None • The contents of the
accumulator is changed from
a binary value to two 4-bit
BCD digits.
• If the value of the low-order
4-bits in the accumulator is
greater than 9 or if AC flag is
set, the instruction adds 6 to
the low-order four bits.
• If the value of the high-order
4-bits in the accumulator is
greater than 9 or if the Carry
flag is set, the instruction
adds 6 to the high-order four
bits.
DAA Instruction

Register
s 1 11
A 2 001 1010
A 0
B C +0000 01
10
D E 0 01 1 0000
H L
Valid BCD
number

3
0
 1 ADD R/M Add register or memory, to the 1 Byte
accumulator
2 ADC R/M Add register to the accumulator with 1 Byte
carry
3 ADI 8-bit Add the immediate to the accumulator 2 Byte

Arithmetic Instructions
4 data
ACI 8-bit Add the immediate to the accumulator 2 Byte
data with carry
5 DAD R p
Add the register pair to H and L registers 1 Byte
6 SUB R/M Subtract the register/memory from 1 Byte
accumulator
7 SBB R/M Subtract the source and borrow from 1 Byte
accumulator
8 SUI 8-bit Subtract the immediate from the 2 Byte
data accumulator
9 SBI 8-bit Subtract immediate from accumulator 2 Byte
1 data with borrow
INR R/M Increment the register or the memory by 1 Byte
0 1
1 INX Rp Increment register pair by 1 1 Byte
1
1 DCR R/M Decrement the register or the memory by 1 Byte
2 1
1 DCX Rp Decrement register pair by 1 1 Byte
3
1 DAA Decimal adjust accumulator 1 Byte
4
 Classification of 8085 Instructions

Based on Byte Size Based on Function

One-byte Instructions Data Transfer Instructions
Requires one memory location
to perform an operation
Arithmetic Instructions
E.g. CMA, ADD

Two-byte Instructions Logic & Bit Manipulation

Requires two memory locations Instructions
to perform an operation Branch Instructions
E.g. MVI A,32H

Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Branch Instructions
 1 JMP Jump unconditionally 3 Byte
2 JC Jump on carry 3 Byte
3 JNC Jump on no carry 3 Byte
4 JP Jump on positive 3 Byte
5 JM Jump on minus 3 Byte
6 JZ Jump on zero 3 Byte
7 JNZ Jump on no zero 3 Byte
8 JPE Jump on parity even 3 Byte
9 JPO Jump on parity odd 3 Byte
1 CALL Call unconditionally 3 Byte
Branch Instructions

0
1 CC Call on carry 3 Byte
1
1 CNC Call on no carry 3 Byte
2
1 CP Call on positive 3 Byte
3
1 CM Call on minus 3 Byte
4
1 CZ Call on zero 3 Byte
5
1 CNZ Call on no zero 3 Byte
6
1 CPE Call on parity even 3 Byte
7
1 CPO Call on parity odd 3 Byte
8
1 RET Return unconditionally 1 Byte
9
JMP: Jump unconditionally

Instruction Description Example

Opcod Operan
e d JMP 000AH
JMP 16-bit The program sequence is
transferred to the memory
address address given in the operand.
JMP: Jump unconditionally

Memo Instructi Memo Instructi

ry ons ry ons
Addre Label
ss MVI A,05
0000H MVI A,05 MOV B,A
0002H MOV B,A MOV C,B
0003H MOV C,B JMP L1
0004H JMP 0009 ADI 02
0007H ADI 02 L1: SUB B
0009H SUB B HLT
000AH HLT
Branch Instruction
Jump Conditionally
Instruction Description Example
Opco Operand
de
JC 16-bit Jump on Carry, Flag Status: JC 2030H
address
JNC 16-bit CY=1
Jump on No Carry, Flag JNC 2030H
address
JZ 16-bit Status:
Jump on CY=0
Zero, Flag Status: JZ 2030H
address
JNZ 16-bit Z=1
Jump on No Zero, Flag JNZ 2030H
address
JP 16-bit Status:
Jump Z=0on Positive, Flag JP 2030H
address
JM 16-bit Status:
Jump onS=0
Minus, Flag Status: JM 2030H
address
JPE 16-bit S=1
Jump on Parity Even, JPE 2030H
address Flag Status: P=1
JPO 16-bit Jump on Parity Odd, JPO 2030H
address Flag Status: P=0
RET: Return from subroutine unconditionally

Instruction Description Example

Opcod Operan
e d The program sequence is transferred RET
RET
from the subroutine to the calling
program.
CALL: Call Unconditionally

Instruction Description Example

Opcod Operan
e d CALL 000AH
CALL 16-bit Instruction transfers the
program sequence to the
address memory address given in the
operand. Before transferring,
the address of the next
instruction(PC) is pushed onto
the stack.
CALL: Call Unconditionally

Lin Instruction Address PC SP 05 [2008

]
e
1 LXI H,1002 [0000] [0003] 0
SP [2007
2 LXI D,3002 [0003] [0006] 0
09 ]
SP
[2006
3 CALL ADD1 [0006] [0009]
0009 ]
4 LXI B,4002 [0009] [000C] [2005
]
5 ADD1:MOV A,D [000C] [000D]
6 ADD H [000D] [000E]
7 RET [000E]
Branch Instruction
CALL Conditionally
Instruction Description Example
Opco Operand
de
CC 16-bit Call on Carry, Flag Status: CC 2030H
address
CNC 16-bit CY=1
Call on No Carry, Flag Status: CNC 2030H
address
CZ 16-bit CY=0
Call on Zero, Flag Status: CZ 2030H
address
CNZ 16-bit Z=1
Call on No Zero, Flag Status: CNZ 2030H
address
CP 16-bit Z=0
Call on Positive, Flag Status: CP 2030H
address
CM 16-bit S=0
Call on Minus, Flag Status: CM 2030H
address
CPE 16-bit S=1
Call on Parity Even, CPE 2030H
address Flag Status: P=1
CPO 16-bit Call on Parity Odd, CPO 2030H
address Flag Status: P=0
Branch Instruction
Return from Subroutine
Instruction Description Example
Opcod Operand
e
RC 16-bit Return on Carry, CY=1 RC
address
RNC 16-bit Return on No Carry, CY=0 RNC
address
RZ 16-bit Return on Zero, Z=1 RZ
address
RNZ 16-bit Return on No Zero, Z=0 RNZ
address
RP 16-bit Return on Positive, S=0 RP
address
RM 16-bit Return on Minus, S=1 RP
address
RPE 16-bit Return on Parity Even, RPE
address Flag Status: P=1
RPO 16-bit Return on Parity Odd, RPO
address Flag Status: P=0
PCHL: Load program counter with HL contents

Instruction Description Example

Opcod Operan
e d PCHL
PCHL None • The contents of registers H &
L are copied into the program
counter.
• The contents of H are placed
as the high-order byte and
the contents of L as the low-
order byte.
RST: Restart

Instruction Description Exampl

Opcod Operan e
e d RST 5
RST 0- The RST instruction is used as software
7(N) instructions in a program to transfer the
program execution to one of the
following eight locations.
Instruction Restart Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
Branch Instruction
The 8085 has additionally 4 interrupts, which can generate RST
instructions internally and doesn’t require any external hardware.

Instruction Description Example

Opcod Operan
e d
TRAP None It restart from address 0024H TRAP
RST 5.5 It restart from address 002CH RST 5.5
RST None
6.5 It restart from address 0034H RST 6.5
RST None
7.5 It restart from address 003CH RST 7.5
None
 1 JMP Jump unconditionally 3 Byte
2 JC Jump on carry 3 Byte
3 JNC Jump on no carry 3 Byte
4 JP Jump on positive 3 Byte
5 JM Jump on minus 3 Byte
6 JZ Jump on zero 3 Byte
7 JNZ Jump on no zero 3 Byte
8 JPE Jump on parity even 3 Byte
9 JPO Jump on parity odd 3 Byte
1
Branch Instructions
CALL Call unconditionally 3 Byte
0
1
CC Call on carry 3 Byte
1
1
CNC Call on no carry 3 Byte
2
1
CP Call on positive 3 Byte
3
1
CM Call on minus 3 Byte
4
1
CZ Call on zero 3 Byte
5
1
CNZ Call on no zero 3 Byte
6
1
CPE Call on parity even 3 Byte
7
1
CPO Call on parity odd 3 Byte
8
1
RET Return unconditionally 1 Byte
9
 Classification of 8085 Instructions

Based on Byte Size Based on Function

One-byte Instructions Data Transfer Instructions
Requires one memory location
to perform an operation
Arithmetic Instructions
E.g. CMA, ADD

Two-byte Instructions Logic & Bit Manipulation

Requires two memory locations Instructions
to perform an operation Branch Instructions
E.g. MVI A,32H

Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Logical & Bit
Manipulation
Instructions
 1 CMP Compare register or memory with accumulator 1 Byte

Logical & Bit Manipulation Instructions

2 CPI Compare immediate with accumulator 2 Byte
Logical AND register or memory with
3 ANA 1 Byte
accumulator
4 ANI Logical AND immediate with accumulator 2 Byte
Exclusive OR register or memory with
5 XRA 1 Byte
accumulator
6 XRI Exclusive OR immediate with accumulator 2 Byte
Logical OR register or memory with
7 ORA 1 Byte
accumulator
8 ORI Logical OR immediate with accumulator 2 Byte
9 RLC Rotate accumulator left 1 Byte
1
RRC Rotate accumulator right 1 Byte
0
1
RAL Rotate accumulator left through carry 1 Byte
1
1
RAR Rotate accumulator right through carry 1 Byte
2
1
CMA Complement accumulator 1 Byte
CMP: Compare register/memory with
accumulator
Instruction Description Example
Opcod Operan
e d CMP B
CMP R/M The contents of the operand
(register or memory) is CMP M
compared with the contents of
the accumulator. Both contents
are preserved. The result of the
comparison is shown by setting
the flags:
1. if (A) < (reg/mem): carry flag
is set(1).
2. if (A) = (reg/mem): zero flag
is set(1).
3. if (A) > (reg/mem): carry and
zero flags are reset(0).
CPI: Compare immediate with accumulator

Instruction Description Example

Opcod Operan
e d CPI 89H
CPI 8-bit • The second byte data is
data compared with the contents
of the accumulator.
• The values being compared
remain unchanged. The result
of the comparison is shown
by setting the flags:
1. if (A) < data: carry flag is
set(1).
2. if (A) = data: zero flag is
set(1).
3. if (A) > data: carry and zero
flags are reset(0).
ANA: AND register/memory with accumulator

Instruction Description Example

Opcod Operan
e d ANA B
ANA R/M • The contents of the accumulator
are logically ANDed with the ANA M
contents of the operand (register
or memory), and the result is
placed in the accumulator.
• If the operand is a memory
location, its address is specified
by the contents of HL registers.
• S, Z, P are modified to reflect the
result of the operation.
• CY is reset. AC is set.
ANI: AND immediate with accumulator

Instruction Description Example

Opcod Operan
e d ANI 02H
ANI 8-bit • The contents of the accumulator
data are logically ANDed with the 8-bit
data (operand) and the result is
placed in the accumulator.
• S, Z, P are modified to reflect the
result of the operation.
• CY is reset. AC is set.
ORA: OR register/memory with accumulator

Instruction Description Example

Opcod Operan
e d ORA B
ORA R/M • The contents of the accumulator
is logically ORed with the ORA M
contents of the operand (register
or memory), and the result is
placed in the accumulator.
• If the operand is a memory
location, its address is specified
by the contents of HL registers.
• S, Z, P are modified to reflect the
result of the operation. CY and AC
are reset.
ORI: OR immediate with accumulator

Instruction Description Example

Opcod Operan
e d ORI 02H
ORI 8-bit • The contents of the accumulator
data is logically ORed with the 8-bit
data (operand) and the result is
placed in the accumulator.
• S, Z, P are modified to reflect the
result of the operation.
• CY is reset. AC is set.
XRA: Exclusive OR register/memory with
accumulator

Instruction Description Example

Opcod Operan
e d XRA B
XRA R/M • The contents of the accumulator
is Exclusive ORed with the XRA M
contents of the operand (register
or memory), and the result is
placed in the accumulator.
• If the operand is a memory
location, its address is specified
by the contents of HL registers.
• S, Z, P are modified to reflect the
result of the operation. CY and AC
are reset.
XRI: Exclusive OR immediate with accumulator

Instruction Description Example

Opcod Operan
e d XRI 02H
XRI 8-bit • The contents of the accumulator
data are Exclusive Ored with the 8-bit
data (operand) and the result is
placed in the accumulator.
• S, Z, P are modified to reflect the
result of the operation.
• CY is reset. AC is set.
RLC: Rotate accumulator left

Instruction Description Example

Opcod Operan
e d RLC
RLC None • Each binary bit of the
accumulator is rotated left by one
position.
• Bit D7 is placed in the position of
D0 as well as in the Carry flag(CY).
• CY is modified according to bit D7.
• S, Z, P, AC are not affected.
Logical Instruction

RLC

A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
0 1 0 1 0 0 0 1

Rotate the accumulator left CY

RRC: Rotate accumulator right

Instruction Description Example

Opcod Operan
e d RRC
RRC None • Each binary bit of the
accumulator is rotated right by
one position.
• Bit D0 is placed in the position of
D7 as well as in the Carry flag(CY).
• CY is modified according to bit D0.
• S, Z, P, AC are not affected.
RRC: Example

A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
1 0 1 0 1 0 0

Rotate the accumulator right

CY
RAL: Rotate accumulator left through carry

Instruction Description Example

Opcod Operan
e d RAL
RAL None • Each binary bit of the
accumulator is rotated left by one
position through the Carry flag.
• Bit D7 is placed in the Carry flag,
and the Carry flag is placed in the
least significant position D0.
• CY is modified according to bit D7.
• S, Z, P, AC are not affected.
RAL: Example

A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
0 1 0 1 0 0 0

CY
0
Rotate the accumulator left through carry
RAR: Rotate accumulator right through carry

Instruction Description Example

Opcod Operan
e d RAR
RAR None • Each binary bit of the
accumulator is rotated right by
one position through the Carry
flag.
• Bit D0 is placed in the Carry flag,
and the Carry flag is placed in the
most significant position D7.
• CY is modified according to bit D0.
• S, Z, P, AC are not affected.
RAR: Example

A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
1 0 1 0 1 0 0

Rotate the accumulator right through carry

CY
1
CMA: Complement accumulator

Instruction Description Example

Opcod Operan
e d CMA
CMA None The contents of the accumulator are
complemented. No flags are
affected.

A 2A CMA

001 1010
0
1100101
1
D 5
Logical Instruction
CMC: Complement Carry
Instruction Description Example
Opcod Operan
e d CMC
CMC None The Carry flag is complemented. No
other flags are affected.

STC: Set Carry

Instruction Description Example
Opcod Operan
e
STC d
None The Carry flag is set(1). No other STC
flags are affected.
 1 CMP Compare register or memory with accumulator 1 Byte

Logical & Bit Manipulation Instructions

2 CPI Compare immediate with accumulator 2 Byte
Logical AND register or memory with
3 ANA 1 Byte
accumulator
4 ANI Logical AND immediate with accumulator 2 Byte
Exclusive OR register or memory with
5 XRA 1 Byte
accumulator
6 XRI Exclusive OR immediate with accumulator 2 Byte
Logical OR register or memory with
7 ORA 1 Byte
accumulator
8 ORI Logical OR immediate with accumulator 2 Byte
9 RLC Rotate accumulator left 1 Byte
1
RRC Rotate accumulator right 1 Byte
0
1
RAL Rotate accumulator left through carry 1 Byte
1
1
RAR Rotate accumulator right through carry 1 Byte
2
1
CMA Complement accumulator 1 Byte
 Classification of 8085 Instructions

Based on Byte Size Based on Function

One-byte Instructions Data Transfer Instructions
Requires one memory location
to perform an operation
Arithmetic Instructions
E.g. CMA, ADD

Two-byte Instructions Logic & Bit Manipulation

Requires two memory locations Instructions
to perform an operation Branch Instructions
E.g. MVI A,32H

Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Control Instructions
Control Instructions
1 NOP No operation 1 Byte
2 HLT Halt 1 Byte
3 DI Disable interrupts 1 Byte
4 EI Enable interrupts 1 Byte
5 RIM Read interrupt mask 1 Byte
6 SIM Set interrupt mask 1 Byte
Control Instructions
Instruction Description Example
Opcod Operan
e d NOP
NOP None • No operation is performed. The
instruction is fetched and
decoded. However no operation is
executed.
• It is used to increase processing
time of execution.
• 1 CPU cycle is "wasted" to
HLT None execute
The CPU afinishes
NOP instruction.
executing the HLT
current instruction and stops further
execution. An interrupt or reset is
necessary to exit from the halt state.
Control Instructions

Instruction Description Example

Opcod Operan
e d DI
DI None Disable Interrupt
The interrupt enable flip-flop is reset
and all the interrupts except the
TRAP are disabled. No flags are
EI None affected.
Enable Interrupt EI
• The interrupt enable flip-flop is
set and all interrupts are enabled.
• No flags are affected.
• This instruction is necessary to re
enable the interrupts (except
TRAP).
SIM: Set Interrupt Mask

Instruction Description Example

Opcod Operan
e d SIM
SIM None This is a multipurpose instruction
used to :
1. Set the status of interrupts 7.5,
6.5, 5.5
2. Set serial data input bit.
The instruction loads eight bits in
the accumulator with the following
interpretations.
SIM Instruction

A:Accumulator

D7 D6 D5 D4 D3 D2 D1 D0
SOD SDE X R7.5 MS M7. M6.
E 5 5 M5.
Serial Output Reset 5
Data To set mask for RST7.5,RST
RST 7.5 if
It is used to 6.5, RST5.5
D4=1
transmit o/p Interrupt Masked if bit=1
bits. Serial Data
Ignored if D6=0 Enable
If D6=1; bit D7 is
output to SOD Mask Set Enable: if 0, bits 0-2
Latch are ignored
if 1, mask is set
SIM Instruction

D7 D6 D5 D4 D3 D2 D1 D0
Accumul SOD SDE X R7.5 MS M7. M6. M5.
ator E 5 5 5
Example 1: MVI A,08H
SIM
D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 1 0 0 0
RIM: Read Interrupt Mask
Instruction Description Example
Opcod Operan
e d RIM
RIM None
This is a multipurpose instruction
used to
1. Read the status of interrupts 7.5,
6.5, 5.5
2. Read serial data input bit.
A:AccumulatorIt reads eight bits from accumulator
D7 withD6 following
D5 Dinterpretations.
4 D3 D2 D1 D0
SID I7 I6 I5 IE 7. 6. 5.
5 5 5
To To identify pending To read interrupt
receive interrupts mask
serial 1=pending interrupt Interrupt Masked if
data Interrupt Enable
0=no pending interrupt Flag: 1=enable;
bit=1
0=disable
Control Instructions
1 NOP No operation 1 Byte
2 HLT Halt 1 Byte
3 DI Disable interrupts 1 Byte
4 EI Enable interrupts 1 Byte
5 RIM Read interrupt mask 1 Byte
6 SIM Set interrupt mask 1 Byte
References
Book: Microprocessor Architecture, Programming, and Applications with
the 8085, Ramesh S. Gaonkar Pub: Penram International

Mobile 8085 and 8086 Microprocessor Opcodes app from Play Store:
Applicatio http://tiny.cc/aopcodes
n
Thank You