2.7.Error Detection
2.7.Error Detection
Session by
Dr/L.RAJA, ASP/ECE
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cussion about the previous sessions
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Agenda of the session
• Error Detection
• Parity Check
• Checksum
• Cyclic Redundancy check
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Error Detection
If the following two conditions are met, receiver can detect a change
in original codeword.
1. The receiver has (or can find) a list of valid code words.
Types –
Parity Check
Checksum
Cyclic Redundancy
Check(CRC)
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Parity Check
Both redundancy check adds extra parity byte for entire frame in
addition to parity bit
for each computes
Receiver byte row and column parities for data bits.
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Parity Check Code
Familiar Error detecting code – simple parity
check code
of 1’s even
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ncoder and decoder for simple parity-check code
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2D Parity Check
Better Approach – Two dimensional parity check
For each row and column one parity check bit is calculated
Two dimensional parity check can detect upto three errors that occur
anywhere in table
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2D Parity Check
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Checksum
Another error detection method is called checksum.
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Checksum -Example
Suppose our data is a list of five 4-bit numbers that we want to
send to a destination. In addition to sending these numbers,
send the sum of the numbers.
For example, if the set of numbers is (7, 11, 12, 0, 6)
send (7, 11, 12, 0, 6, 36), where 36 is the sum of the original
numbers.
Solution
bits.
(0101 + 1) = 0110 or 6. 17
Checksum - Example
How can we represent the number −6 in one’s complement
arithmetic using only four bits?
Solution
In one’s complement arithmetic, the negative or complement of a number
is found by inverting all bits. Positive 6 is 0110; negative 6 is 1001.
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Checksum
Sender site :
1. The message is divided into 16-bit words.
2. The value of the checksum word is set to 0.
3. All words including the checksum are
added using one’s complement addition.
4. The sum is complemented and becomes the
checksum.
5. The checksum is sent with the data. 20
Checksum
Receiver site:
words.
checksum.
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Cyclic Codes
Cyclic codes are special linear block codes with one extra property.
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Cyclic Redundancy Check
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CRC- Encoder and Decoder
In the encoder,
Dataword has k bits (4 here)
Codeword has n bits (7 here)
Size of dataword is
augmented by
adding n − k (3 here) 0s to
right-
hand side of the word.
n-bit result is fed into
generator.
Generator uses a divisor of
size
n − k + 1 (4 here),
predefined.
Generator divides the
Decoder receives codeword (possibly corrupted in transition). augmented
A copy of all n bits is fed to checker, which is a replica of generator.dataword by the divisor
Remainder produced by the checker is a syndrome of n − k (modulo-2 (3 here) bits, which is fed to
decision logic analyzer. division).
Analyzer has a simple function. If the syndrome bits are all 0s, 4leftmost
Quotientbitsof
ofdivision is24
the codeword
Division in CRC encoder
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vision in the CRC decoder for two cases
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Cyclic Redundancy Check
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Advantages - CRC
Which can detect two bit errors? A simple parity check code can detect
a) Parity check _____ errors
b) Cyclic redundancy check a.Even number of errors
c) Parity & Cyclic redundancy check b.Two
d) None of the mentioned c.Odd number of errors
d. no errors
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Session Handler Details
(Dr. L.RAJA)
ASP/ECE
[email protected]
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