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Carrylook Ahead

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15 views22 pages

Carrylook Ahead

Uploaded by

riyapoonam803
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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UNIT -II

Arithmetic and logic unit: Look ahead carries adders. Multiplication: Signed
operand multiplication,
Booths algorithm and array multiplier. Division and logic operations. Floating
point arithmetic
operation, Arithmetic & logic unit design. IEEE Standard for Floating Point
Numbers
Adders
• Adders is an electronic circuit that performs addition of numbers.
• In CPU, it can be used to calculate addresses, table indices and similar
operations.
• It can be constructed for many numerical representations such as BCD
etc.
• Types of adders
Half adders
Full adders
Ripple adders
Look ahead carry adders and many more.
Half adders

• Add two single binary digits A and B. It has two outputs sum and carry.
Full adder

• A combinational circuit that adds 3 inputs to generate a output as


sum bit and carry bit.
Carry look ahead adders

• CLA is a fastest adder.


• It reduces the propagation delay, which occurs during addition.
• It uses more complex hardware circuit.
• It is designed by transforming the ripple carry adder circuit such that the carry logic of adder is
changed into two level logic.
CLA
• We use one extra circuit 4 bit carry look ahead generator for
preventing carry delay.
• This circuit works to predict the carry. It will calculate only first full
adder’s carry and sum (So, Co) on that basis we will predict further
sum and carry.
Multiplication: Signed operand multiplication
Multiplication of two fixed point binary number in signed magnitude representation is done
with process of successive shift and add operation.
Hardware Implementation :
Following components are required for the Hardware Implementation of multiplication algorithm :

Registers:
Two Registers B and Q are used to store multiplicand
and multiplier respectively.
Register A is used to store partial product during
multiplication.
Sequence Counter register (SC) is used to store
number of bits in the multiplier.
Flip Flop:
To store sign bit of registers we require three flip flops
(A sign, B sign and Q sign).
Flip flop E is used to store carry bit generated during
partial product addition.
Complement and Parallel adder:
This hardware unit is used in calculating partial
product i.e, perform addition required.
Flowchart of Multiplication:
Example:
Multiplicand = 10111-23
Multiplier = 10011 -19

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