ECCE4227: Embedded Systems

Chapter 11

Serial Communication
 Topics
 Communication theory
 Parallel vs. Serial
 Direction: Simplex, Half duplex, Full duplex
 Synchronization: Synchronous vs.
Asynchronous
 UART protocol
 UART in AVR
 UART Registers
 Program Examples
 SPI Communication

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 Parallel vs. Serial
 Parallel
 For short distances
 Not applicable for long distances
 More expensive
 Cross-talk problem

D7
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 Direction
 Simplex

 Half Duplex

 Full Duplex

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 Synchronization
 Synchronous

 Asynchronous

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 USART (Universal Synchronous Asynchronous
Receive Transmit)
 USART devices can be used to communicate
synchronously and asynchronously (UART) .
 Since the synchronous capability of USART is not
used nowadays, we concentrate on UART.
 The Universal Asynchronous Receiver/Transmitter
(UART) is the implementation of the RS-232C
standard.
 Typical speed: 9600, 19200, 115200 bps (baud rate)
 Baud rate: The rate as which bits are transmitted per
each second.
 kbps = 1000 bits /second NOT 1024 bits/second

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 UART Protocol
 Serial
 Asynchronous
 Full duplex

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 UART Protocol
 Each byte is encapsulated with a start, stop (1 or 2
bits), and optionally a parity bit. Bits are sent
serially.
b7 b6 b5 b4 b3 b2 b1 b0

stop parity start

bit bit bit

 The job of the transmitter is to add those control

bits, while the received remove them.
 The parity can be optionally used to provide error
control.
 Sender and receiver must agree on the following:
 Baud rate (speed)
 Number of data bits per transmission
 Type of parity (Even, Odd, or None)
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 UART Protocol
 Assume that the transmitter would like to transfer the
message “ABCD” to the receiver.
 Each character must be represented in ASCII
A = 0x41 B = 0x42 C = 0x43 D = 0x44

 Bits are transmitted with the least significant bits first. Each
byte is preceded by a start bit (usually 0) and a stop bit
(usually 1). Stop bits can be two bits. Parity is optional.

 Assume that we would like to send “C” with odd parity

and two stop bits:
110010000110
TX RX
C

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 UART Protocol
 When measuring speed, K means 103 not 1024.
Similarly, M means 106, not 1024*1024.

 Format of transmitted data can be abbreviated as

xYz
Data width Stop bits width
Parity (E, O, N)

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 UART Protocol
 Example: 8N1: 8-bit data, No parity, 1 stop bit

 How about the following? 7E2 and 8O1

 Knowing the size of transmitted file and the baud rate,

the transmission time can be calculated.

 Example: Assume 8E1 and 9,600 baud rate. How long

does it take to transmit 1MB of data.
 Total number of data bits = 1 x 220 x 8 = 8 x 220
 Each data symbol requires (1 + 8 + 1 + 1) bits  11/8
bits
 Time = ( 8 x 220 x 11/8 ) / 9600 = 20 minutes

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Review Questions

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Review Questions

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 Using RS-232C in AVR
 The pins that are shown in the adjacent
figure are used to interface the AVR RXD 2 (PD0)
microcontroller to another serial device
 RXD: Receive bits
TXD 3 (PD1)
 TXD: Transmit bits

ATmega8
 RS232C : One of the oldest serial
communication standards implemented by
UART
 Connecting AVR to an external
RS232C device may require
additional MAX232 circuitry to
convert RS232 voltage levels to
TTL levels and vice versa.

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MAX232

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 UART registers in AVR
 Control registers: (initialize speed, data size,
parity, etc.)
 UBRR, UCSRB, and UCSRC
 Send/receive register
 UDR
 Status register
 UCSRA

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 UBRR Register
 To set the baud rate, update the content of the
register (Only the least significant 12 bits are
used) 15 11 0

UBRRH UBRRL

 Use the following equation:

 Example: fclk = 1.8432 MHz, 9600 baud rate.

Calculate the content of UBRR register.

 UBRRH = 0; UBRRL = 11;

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 Example
 It is desired to have a 9600bps
communication. If fclk is 16 MHz, What is the
content of UBRR register.
 Solution:
Use the following equation:

-1

UBRR = 103.166, so UBRR =103

UBRRH = 0; UBRRL = 103;

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Review Questions

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Some Standard Baud rates

1200
2400
4800
9600
19,200
38,400
57,600
115,200

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 UCSRC [Data Format]
 The figure shows the register bit map:

Parity bits Data size

Always clear (0) 00 NP Stop bit 00 5
“Asynchronous” Size
01 - 01 6
10 E 0 1 10 7
11 O 1 2 11 8
Always set (1)
Used for synchronous
only. Always clear (0) this
bit

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 UCSRC (Example)
 Configure UCSRC register for 7E2 data format:

1 0 1 0 1 1 0 0

 UCSRC = 0xAC;

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 UCSRA
 The figure shows the register bit map:

Data is received If set (1), then

(check before baud rate is
reading) doubled

Ready to transmit
(check before
transmission)

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 UCSRB

TXCI
RXCIE RXCIE
E
UDRIE RXEN TXEN

If set (1), then TXD is

enabled and GPIO is
If set (1), Data disabled
Register Empty

If set (1), Receive If set (1), then RXD is

Interrupt Enable enabled and GPIO is
disabled

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 UCSRB (Example)
 Configure UCSRB by enabling sending and
receiving data on UART:

TXCI
RXCIE RXCIE
E
UDRIE RXEN TXEN

0 0 0 1 1 0 0 0

If set (1), then TXD is

enabled and GPIO is
 UCSRB = If0x18;
set (1), Data disabled
Register Empty

If set (1), Receive If set (1), then RXD is

Interrupt Enable enabled and GPIO is
disabled
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 UART Configuration Example
 Configure the ATmega8 microcontroller to transfer data using
UART at 19200 baud rate. The data format is 7E2. Assume 8 MHZ
clock frequency.

#define F_CPU 8000000UL

#include <stdint.h>
#include <avr/io.h>

// This function is called from

// main and initializes UART
void initUART()
{
UBRRH = 0;
UBRRL = 25;
UCSRC = 0xAC;
UCSRB = 0x18;
}

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Polling-based UART send and receive
int main()
{
initUART(); // initialize UART

// Send a character
char x = ‘A’;
// wait until device is ready to transmit
data
while ( (UCSRA & 0x20) == 0 );
UDR = x;

// Receive a character
// wait until device is ready to receive
data
while ( (UCSRA & 0x80) == 0);
x = UDR;

return 0;
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Example 1: sending character ‘G’ continuously
#define F_CPU 16000000UL
#include <avr/io.h>

void uart_init (void)

{
UCSRB = (1<<TXEN);
UCSRC = (1<<UCSZ1)|(1<<UCSZ0)|(1<<URSEL); //8N1 format
UBRRL = 103; //baud rate = 9600bps
}

void uart_send (unsigned char ch)

{
while (! (UCSRA & (1<<UDRE))); //wait until UDR is empty
UDR = ch; //transmit the character ‘ch’
}

int main (void)

{
uart_init(); //initialize the USART

while(1) //do forever

uart_send ('G'); //transmit ‘G’ letter

return 0;
}

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Example 2 : Receives bytes of data serially and puts
them on Port B.
#define F_CPU 16000000UL
#include <avr/io.h>
int main (void)
{
DDRB = 0xFF; //Port B is output
UCSRB = (1<<RXEN); //initialize USART
UCSRC = (1<<UCSZ1)|(1<<UCSZ0)|(1<<URSEL); // 8N1
UBRRL = 103;

while(1)
{
//wait until receive new data
while (! (UCSRA & (1<<RXC)));

PORTB = UDR;
}
return 0;
}

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 Example 3
 Transfer
“Hello” from
ATmega8 to 0x8E;
PC (baud rate
9600, 8N2
data mode)

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 UART Programming using Interrupts
 It is a waste of microcontroller time to poll RXC and
UDRE flags to check whether data is received or we are
ready to transmit

 Instead, we can use Interrupts rather than polling :

 Interrupt-based data receive:

Set to High Receive Complete Interrupt Enable (RXCIE) in
UCSRB register, and properly define
ISR(USART_RXC_vect).
 Interrupt-based data transmit:

Set USRAT Data Register Empty Interrupt Enable (UDRIE) in
UCSRB register to 1. Properly define
ISR(USART_UDRE_vect).

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Example 1 (interrupt-based) : sending character
‘G’ continuously
#include <avr/io.h>
#include <avr/interrupt.h>

void usart_init (void)

{
UCSRB = (1<<TXEN)|(1<<UDRIE) ; //enable transmit and UDR Empty int.
UCSRC = (1<<UCSZ1)|(1<<UCSZ0)|(1<<URSEL); //8N1 format
UBRRL = 103; //baud rate = 9600bps
}
ISR (USART_UDRE_vect)
{
UDR = ‘G’; //transmit ‘G’
}

int main (void)

{
usart_init(); //initialize the USART
sei(); //enable interrupts

while(1); //do forever

return 0;
}

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 Example 2 (interrupt-based) : Receive bytes of data
serially and place them on Port B.
#include <avr/io.h>
#include <avr/interrupt.h>

ISR (USART_RXC_vect)
{
PORTB = UDR;
}
int main (void)
{
DDRB = 0xFF; //Port B is output
UCSRB = (1<<RXEN)|(1<<RXCIE); //enable receive and RXC int.
UCSRC = (1<<UCSZ1)|(1<<UCSZ0)|(1<<URSEL);
UBRRL = 103;
sei(); //enable interrupts
while(1); // wait forever
return 0;
}

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Serial Peripheral Interface (SPI)

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 Serial Peripheral Interface (SPI)
 SPI is faster than RS232C, where it can achieve speeds of up to
10Mbps.

 SPI is synchronous protocol that operates with respect to the

clock.

 SPI is full-duplex protocol, where a device can transmit and

receive data, simultaneously.

 In SPI communication, there is Master and Slave.

 Master generates the clock, which is used to synchronize

with the slave.

 Master initiates the communication with the slave.

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 SPI Signals
 Four lines for communication
 SCLK: Serial clock (generated by Master)
 MOSI: Master-Out, Slave-In (transfer from Master to Slave)
 MISO: Master-In, Slave-Out (transfer from Slave to Master)
 SS: Slave Select (Master initiates the communication with the
slave)

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 SPI Configurations
Standard Daisy chain
configuration configuration

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 SPI Data Transfer
1. Communication begins when Master activates SS signal.
2. Master and Slave can place the data in the Data Register, which
is usually 8 bits (It can also be 16, and 32 bits).
3. Master toggles SCLK.
4. At each clock pulse, one bit is shifted out from Master Data
Register to Salve Data Register. Similarly, a bit is shifted out from
the Slave Data Register to the Master Data Register. This process
continues until the word is transferred to the other side
completely.

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 SPI in AVR
 The figure shows how SPI signals are mapped to ATmega8 pins:

PB5

PB3

PB4

PB2

 Three registers are used in SPI communication:

 SPDR: contains the data when transmitting or receiving.

 SPCR: SPI Control register

 SPSR: SPI Status register

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 SPI Control Register (SPCR)
 The figure shows the register bit map:

Control Speed

00
SPI Enable 0  Slave
1  Master
01
SPI Interrupt Enable:
0  No Interrupt
1  Interrupt after 10
transmission
or reception of a word 11

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 SPI Status Register (SPSR)
 The figure shows the register bit map:

Transfer is complete! Communication

(Check before reading speed is doubled is
data or transmitting a set to 1
new word)

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 SPI Example
 Configure AVR as Master, no interrupts (i.e. poling
mode), speed is 1/16 of the input lock.

// This function is called from main

void initSPI_Master ()
{
DDRB = 0x2C; // WHY?
SPCR = 0x51; // WHY?
}

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 SPI Example (cont.)
 Transfer a byte
// This function is called from main
void sendByte(uint8_t x)
{
SPDR = x;
// Wait until transfer is done.
while ( (SPSR & 0x80) == 0) ;
}
 Receive a byte
// This function is called from main
uint8_t getByte()
{
// Wait until transfer is done.
while ( (SPSR & 0x80) == 0) ;

return SPDR;
}

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 SPI Example
 Write C program for both SPI Master and Slave to
transfer 4-bit data (input from switch at Port C of
Master), and output the on LEDs of Slave (using Port C
of Slave).

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Master Code

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Slave Code
SPCR

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Inter Integrated Communication (I2C)

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 I2C Details
 Two lines
 Serial data line (SDA)
 Serial clock line (SCL)
 Only two wires for connecting multiple
devices
 Multi Master capability
 Many devices can be connected on two
lines

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 I2C Details
 Each I2C device recognized by a unique address

 Each I2C device can be either a transmitter or

receiver

 I2C devices can be masters or slaves for a data

transfer

Master (usually a microcontroller): Initiates a data
transfer on the bus, generates the clock signals to
permit that transfer, and terminates the transfer
 Slave: Any device addressed by the master at
that time

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 How can any device
transfer or receive on the same two wires?
 Pull ups and high-impedance mode pins
 Wires default to being “on”, any device can
make a wire go “off”.
 SPI and UART can’t do this, why?

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 Bit Transfer on the I2C Bus
 In normal data transfer, the data line only
changes state when the clock is low
 Start and Stop conditions are exceptions

SDA

SCL
Data line stable; Change
Data valid of data
allowed

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 Start and Stop Conditions

• A transition of the data line while the clock line is high

is defined as either a start or a stop condition.
• Both start and stop conditions are generated by the
bus master
• The bus is considered busy after a start condition, until
a stop condition occurs

SDA SDA

SCL SCL

Start Stop
Condition Condition

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 I2C Addressing
 Each node has a unique 7 (or 10) bit
address

 Peripherals often have fixed and

programmable address portions

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 I2C-Connected System

Example I2C-connected system with two microcontrollers

(Source: I2C Specification, Philips)

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 Master-Slave Relationships
 Who is the master?
 master-transmitters
 master-receivers

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 Master-Slave Relationships
 Who is the master?

master-transmitters

master-receivers

 Suppose microcontroller A wants to send information to

microcontroller B

A (master) addresses B (slave)

A (master-transmitter), sends data to B (slave-receiver)

A terminates the transfer.

 If microcontroller A wants to receive information from microcontroller

B

A (master) addresses microcontroller B (slave)

A (master-receiver) receives data from B (slave-transmitter)

A terminates the transfer

 If two devices want to take control of the bus, which one gets priority?

Bus Arbitration
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Exercise: How fast can I2C run?
• How fast can you run it?
• Assumptions
– 0’s are driven
– 1’s are “pulled up”
• Some working figures
– Rp = 10 kΩ
– Ccap = 100 pF
– VDD = 5 V
– Vin_high = 3.5 V
• Recall for RC circuit
– Vcap(t) = VDD(1-e-t/τ) (1)
– Where τ = RC

– τ = 1us
– t= 1.2 us from eq 1

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