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Design Procedure

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0% found this document useful (0 votes)
8 views

Design Procedure

Uploaded by

dkkeyan
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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DESIGN OF SYNCHRONOUS SEQUENTIAL CIRCUITS

1. The given problem is determined with a state diagram


2. From the state diagram, obtain the state table.
3. The number of states may be reduced by state reduction methods, if
applicable.
4. Assign binary values to each state (Binary Assignment) if the state table
contains letter symbols.
5. Determine the number of flip flops needed and assign a letter symbol
(A,B,C ...) to each.
6. Choose the type of flip flop (D,T,JK, SR) to be used.
7. From the state table, derive the circuit excitation and output tables.
8. Using K-map or any other simplification method, derive the circuit output
functions and the flip-flop input functions.
9. Draw the logic diagram.
A sequential circuit has three flip-flops A, B, C; one input x_in ; and one output y_out . The state diagram is shown in
Figure The circuit is to be designed by treating the unused states as don’t-care conditions. Analyze the circuit
obtained from the design to determine the effect of the unused states. Use D flip-flops in the design
Ring Counter

Ring counters are implemented using shift registers. It is essentially a circulating shift
register connected so that the last flip-flop shifts its value into the first flip-flop. There is
usually only a single 1 circulating in the register, as long as clock pulses are applied.
(Starts 1000->0100->0010->0001 repeat)
Start control signal, which presets the left-most flip-flop to 1 and
clears the others to 0.
Johnson Counter

The Johnson counter, also known as the twisted-ring counter,


is exactly the same as the ring counter except that the inverted
output of the last flip-flop is connected to the input of the first
flip-flop.
Let’s say, starts from 000, 100, 110, 111, 011 and 001, and the
sequence is repeated so long as there is input pulse.
Clock Pulse
FFA FFB FFC FFD
No
0 0 0 0 0
Truth Table for a 4-bit Johnson 1 1 0 0 0
Ring Counter 2 1 1 0 0
3 1 1 1 0
4 1 1 1 1
5 0 1 1 1
6 0 0 1 1
7 0 0 0 1

As well as counting or rotating data around a continuous loop, ring counters can also be used to detect or
recognize various patterns or number values within a set of data. By connecting simple logic gates such as the
AND or the OR gates to the outputs of the flip-flops the circuit can be made to detect a set number or value.
Standard 2, 3 or 4-stage Johnson ring counters can also be used to divide the frequency of the clock signal by
varying their feedback connections and divide-by-3 or divide-by-5 outputs are also available.
The contents of a four‐bit register is initially 0110. The register is shifted six times to the right with
the serial input being 1011100. What is the content of the register after each shift?
Analyse state reduction if possible after designing a clocked synchronous sequential logic circuit using JK
flip flops for the following state diagram

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