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Rebecca_edge-AI

Presentation of REBECCA edge AI project

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11 views12 pages

Rebecca_edge-AI

Presentation of REBECCA edge AI project

Uploaded by

jovanni333
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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HORIZON-KDT-JU-2021-2-RIA

GA no. 101097224

Reconfigurable Heterogeneous Highly Parallel


Processing Platform for safe and secure AI
Yannis Papaefstathiou
Exascale Performance Systems – EXAPSYS

Edge-AI Conference
17th October 2023,
1
Athens
Who is
REBECCA ?
BENEFICIARY EPS BENEFICIARY EPS
EREVNITIKO PANEPISTIMIAKO INSTITOUTO 13 UNIVERSIDAD DE CASTILLA - LA MANCHA ES
1 TILEPIKONONIAKON SYSTIMATON EL BARCELONA SUPERCOMPUTING CENTER-CENTRO
2 EXASCALE PERFORMANCE SYSTEMS - EXAPSYS IKE EL 14 NACIONAL DE SUPERCOMPUTACION ES
3 IDRYMA TECHNOLOGIAS KAI EREVNAS EL 15 INTECS SOLUTIONS SPA IT
4 ETHNIKO KAI KAPODISTRIAKO PANEPISTIMIO ATHINON EL 16 POLITECNICO DI TORINO IT
5 SYSGO GMBH DE 17 LUNDS UNIVERSITET SE
FRAUNHOFER GESELLSCHAFT ZUR FORDERUNG DER 18 ARCELIK A.S. TR
6 ANGEWANDTEN FORSCHUNG EV DE 19 UAB TERAGLOBUS LT
7 ITEC BV NL 20 KLEPSYDRA TECHNOLOGIES GMBH CH
8 ALMENDE BV NL 21 SYNTHARA AG CH
9 AquaSmart Engineering BV NL 22 BONSEYES COMMUNITY ASSOCIATION CH
10 STICHTING IMEC NEDERLAND NL CSEM CENTRE SUISSE D'ELECTRONIQUE ET DE
11 SOLVER MACHINE LEARNING SL ES MICROTECHNIQUE SA - RECHERCHE ET
12 FENT INNOVATIVE SOFTWARE SOLUTIONSSL ES 23 DEVELOPPEMENT CH
ZURCHER HOCHSCHULE FUR ANGEWANDTE
24 WISSENSCHAFTEN CH

2
Why REBECCA ?

As we have heard in the keynote and will most probably see in the three days of
the meeting there is a clear need for :

 Domain-specific SoCs and platforms integrating manycore CPUs, vector processors,


hardware accelerators and FPGAs,
 Hardware Design Tools, Programming environments, aimed at efficiently designing
and programming such domain-specific heterogeneous platforms,
 Complete software stacks from application programming to runtime systems to
satisfy hard real-time, safety and security requirements, wherever possible, in a formal
way.

3
How is REBECCA
doing it ?

To Address the needs REBECCA is developing a complete HW/SW stack


comprising of
An innovative RISC-V based processing unit, including hardware accelerators for AI
and security,
An advanced System in Package (SiP) consisting of a number of chiplets
A novel Hardware/Software Design Toolset for the implementation of such
heterogeneous systems
An innovating Programming Environment for the diversified REBECCA systems
Adapted OSs, runtime systems and middleware for the REBECCA platform (see next
presentation by FORTH)
Complete AI frameworks taking full advantage of both the SW and HW of REBECCA
Applications from UAVs, Consumer Electronics
4 and Utility Infrastructure domains.
Deeper into REBECCA

• Two identical
interconnected
processing chiplets

• External FPGA

• Inter-chiplet
communication
• Inter-device
communication

5
Even Deeper into
REBECCA

Hardware
Name of Accelerator Domain Implementation
Neuromorphic Compute PlatformAcceleratorsAI ASIC

ML Accelerator AI FPGA
CNN accelerator AI FPGA
AI accelerator AI FPGA
Systolic Accelerator AI FPGA
Intrusion Detection/Prevention Security ASIC
System

Near Memory Processing Unit AI/General-Purpose Processing ASIC

6
Exploring the beaty of REBECCA

DNN architecture and quantization DNN architecture and quantization

Pytorch/TF
training and quantization

DNN architecture and params DSE-2


DSE-2

RISC+FPGA deployment

FPGA deployment FPGA deployment

HW/SW co-development Mapper Generators

Rebecca platform

RISC-V FPGA

7
Exploring the safety of REBECCA

Application model (C++)

RISC+
accelerator code

Safety assurance

Safety analysis results

Runtime layer Safety assessment

Rebecca platform

RISC-V FPGA

8
Exploring the security of REBECCA

Application model (C++)

RISC+
accelerator code

security assurance

Security analysis results

Security assessment Model checking

Rebecca platform

RISC-V FPGA

9
Many REBECCAs together

1
REBECCA in (future) action

1
1

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