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Microprocessor design and course Lecture One

The document outlines the objectives and content of the COMP 413 Microprocessor Systems Design course, focusing on the functionality and advantages of microprocessors over traditional hard-wired designs. It covers the architecture and operation of the 8085 microprocessor, including its buses, control signals, and instruction fetching process. The course aims to equip students with the skills to design and implement microprocessor-controlled systems.

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0% found this document useful (0 votes)
3 views25 pages

Microprocessor design and course Lecture One

The document outlines the objectives and content of the COMP 413 Microprocessor Systems Design course, focusing on the functionality and advantages of microprocessors over traditional hard-wired designs. It covers the architecture and operation of the 8085 microprocessor, including its buses, control signals, and instruction fetching process. The course aims to equip students with the skills to design and implement microprocessor-controlled systems.

Uploaded by

msimiyu888
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 25

COMP 413

MICROPROCESSOR
SYSTEMS DESIGN

Sept to Dec 2022 Wednesday, January 22, 2025


.

At the end of this course Comp 413 you


should be able to;
 Discuss the basic function a microprocessor in any
system
 Describe the benefits that microprocessor controlled
designs have over hard-wired IC logic designs,
 Discuss the functional blocks of a microprocessor-
based system having basic input/output capability
 Describe the function of the address, data, and
control bus
 Describe the flow of data through the Internal parts
of an 8085 microprocessor

Sept to Dec 2022 Wednesday, January 22, 2025


.

Cont.,
 Discuss the function of the I/O ports in any

microprocessor controlled system


 Design and implement a

microprocessor/microcontroller controlled system

Sept to Dec 2022 Wednesday, January 22, 2025


Introduction
4

 Design applications previously studied involved


Combinational and Sequential logic ICs (Comp 211 &
Comp 312).
 Combinational circuits;circuits realized by combination of
logic gates(AND,OR,NOT etc)
 Sequential circuits;combinational logic circuits with
memory
 A complete design could be within the realm of Small Scale
Integration (SSI) and Medium Scale Integration (MSI)
 An example is that of a traffic light controller that goes
through the sequence; green-yellow-red.
 To implement this logic , some counter ICs are used for timing, shift
register ICs for sequencing the lights, and a D- Flip Flop to interrupt
the sequence with a crosswalk push button for pedestrian crossing

Sept to Dec 2022 Wednesday, January 22, 2025


.
5

When it comes to modern complexity of


electronic controls for example in the modern
automobiles, there exists several analog
quantities to monitor such as;
 engine speed,
 manifold pressure (inlet and exhaust pipes ),
 coolant temperature
 there are also digital control functions to spark plug
timing, fuel mixture control, and radiator circulation
control.
It means therefore that there are calculations
and decision making continuously taking place.
This therefore makes it an application for a
Sept microprocessor.
to Dec 2022 Wednesday, January 22, 2025
.
6

A microprocessor based design is


therefore convenient whenever an
application involves;
 Making calculations
 Making decisions based on external stimulus
 Maintaining memory of past events

Sept to Dec 2022 Wednesday, January 22, 2025


.
7

A microprocessor therefore has more


advantages over the hard-wired SSI/MSI IC
approach;
 It is a general purpose device
 Performs any function depending on the
control program
 Making changes is done by changing
instructions in the program. Hard-wired will be
redesigned and reconstructed
New microprocessors come to the market
every year to meet needs of designers,
however the theory behind this technology
Sept remains
to Dec 2022 basically the same. Wednesday, January 22, 2025
8

A microprocessor is a general purpose device


that is driven by software instructions and
communicates with several external support
chips to perform input/output of a specific
task.
A microprocessor is also referred to as a CPU
This course will be based on the 8085
microprocessor that runs at a frequency of
either 3.03MHZ(8085A) or 5MHZ
maximum(8085A-2).
16 bit address and 8 bit data bus

Sept to Dec 2022 Wednesday, January 22, 2025


An 8085A Microprocessor
9

Sept to Dec 2022 Wednesday, January 22, 2025


Pin Arrangement
10

The pins on the chip can be grouped into six


groups:
 Address Bus
 Data Bus
 Power supply and clock signals
 Serial I/O ports(SID,SOD)
 Control and Status signals
 Externally initiated signals

Sept to Dec 2022 Wednesday, January 22, 2025


Address and Data Bus(lines)
11

Address bus has 8 lines A8 – A15 which are unidirectional.


The remaining 8 bits address are multiplexed (time shared)
with the 8 data bit lines.
AD0 – AD7 serve both as bi-directional data bus D0 – D7 and
A0 – A7 for address lines to make 16-bits with A8 – A15
During the execution of the instruction, the lines will carry
the address bits and during execution will carry the 8 bit data.
Addresses originate from the microprocessor and so are
unidirectional and data lines are bidirectional since data
flows in and out of the processor.

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
12

Latches can be used to save/hold the


information before the function of the bits
change.

Sept to Dec 2022 Wednesday, January 22, 2025


Clock signals
13

X1 and X2 are the inputs from the crystal


oscillator or clock generating circuit.

Clk out pin: An output clocking pin to drive


the rest of the system.

Sept to Dec 2022 Wednesday, January 22, 2025


Control and Status signals
14

ALE: Address Latch Enable. Set to 1 by the


system when AD0 – AD7 lines have an address
on them. It changes back to 0 thereafter. This
signal can be used to save the address bits
from the AD lines.
RD: Read. Active Low signal to enable a read
from a memory location.
WR: Write. Active Low signal to enable a
write to a memory location.

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
15

IO/M:Input,Output/Memory. This signal


specifies whether the operation is a memory
operation(IO/M = 0) or an I/O operation
(IO/M =1).
S1 and S2 : Status signals to specify the kind
of operation being performed.

Sept to Dec 2022 Wednesday, January 22, 2025


Fetching an Instruction
16

Assume the processor is fetching an


instruction from address 8400H. That means
the Program Counter(PC) is loaded with this
value.
 The PC places the address value on the address bus
and the controller issues a RD signal.
 The memory’s address decoder gets the value and
determines which memory location is being accessed.

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
17

The value on the memory location is placed


on the data bus.
The value on the data bus is read into the
Instruction Register(IR) inside the
microprocessor.
Then transferred to the Instruction
Decoder(ID) inside the microprocessor for
decoding.

After decoding the instruction, the control


unit issues control signals to perform the
operation.
Sept to Dec 2022 Wednesday, January 22, 2025
18

All instruction would go through Fetch,


Decode , and Execution cycle

Sept to Dec 2022 Wednesday, January 22, 2025


19

Sept to Dec 2022 Wednesday, January 22, 2025


8085 Features
20

The ALU
 In addition to the arithmetic & Logic circuits, the ALU

includes the accumulator, which is part of every


arithmetic and logic operation.
 The ALU also includes a temporary register that is

used for temporary data storage during the execution


of an operation. The temporary register is not
accessible by the programmer.

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
21

The Flag Register(program status word)


 The flag register consists of five status flags
 The sign flag(S): This is set to the value of the most
significant bit of the accumulator after an arithmetic or
logic operation (0 for positive and 1 for negative).

 The zero flag(Z) is set to a 1 whenever an arithmetic


or logic operation produces a result of zero. A nonzero
result sets it to 0.

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
22

 The auxiliary carry flag(Ac): Reflects any carry from


bit 3 to bit 4(assuming an 8-bit data with bit 0 as the
LSB and bit 7 as the MSB).

 The parity status flag(P): is set to 1 if an operation


produces an answer with even parity.

 The carry flag(Cy): Reflects the final carry out of the


most significant bit of any arithmetic operation. The flag
is also used for the shift and rotate instructions.

Sept to Dec 2022 Wednesday, January 22, 2025


Register Structure
23

The Accumulator:
The accumulator(A) is an 8-bit register.
Most arithmetic and logic operations are
performed using the accumulator.
All I/O operations are performed via the
accumulator

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
24

General purpose registers:


The B,C,D,E,H and L registers are 8-bits long
and are used for moving data between
themselves, the accumulator and the memory.

There are a number of instructions that


combine two of these 8-bit registers to form
16-bit register pair.

Sept to Dec 2022 Wednesday, January 22, 2025


Cont.
25

Arithmetic operations use B and C, or D and


E, or H and L as 16-bit data registers.

Register HL is the memory address register


or data counter. The register pair stores the
16-bit address of an 8-bit data being accessed
from memory.

Sept to Dec 2022 Wednesday, January 22, 2025

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