Microprocessor Architecture

Microprocessor Architecture

Every Microprocessor has a set of instructions, designed

internally, to manipulate data and communicate with
peripheral devices (including memory). This process of
data manipulation and communication is determined by
the internal logic designed of the microprocessor, called
the architecture.
The microprocessor can be programmed to perform functions
on given data by writing specific instructions into its memory.
Writing (or entering) instructions and data is done through an
input devices such as a keyboard.
The microprocessor reads one instruction at a time, matches it
with its instruction set, and performs the data manipulation
indicated by the instruction.
The result is either stored back into memory or displayed on an
output devices as LEDs or a CRT terminal.
 Microprocessor Architecture

In addition, the microprocessor can respond to external devices (or

signals), that is, it can be interrupted, reset, hold, or asked to wait to
synchronize with slower peripherals.

All the various functions performed by the microprocessor can

be classified in three categories:
 Microprocessor initiated operations
 Internal data operations
 Peripheral (or externally) initiated operations

To perform these operations, the microprocessor requires a group

logic circuits and a set of signals called control signals.
 Microprocessor Initiated Operations

The microprocessor performs primarily four operations:*

Memory Read: Reads data (or instructions) from memory.
Memory Write: Write data (or instructions) into memory.
I/O Read: Accepts data from input devices.
I/O Write: Sends data to output devices.
All these operations are part of communication process between
microprocessor and peripheral devices (including memory). To
communicate with a peripheral (or a memory location), the
microprocessor needs perform the following steps:
Step-1: Identify the peripheral or the memory location (with its address).
Step-2: Transfer data.
Step-3: Provide proper timing or synchronization signals.
It is important to note that the microprocessor treats memory and I/O devices
the same way.
* Other operations are omitted here for clarity.
 Bus Organization

The microprocessor performs these function by using three sets

of communication buses:
Address Bus
Data Bus
Control Bus
A15
A0 Address Bus

Memory Input

8085 Real world

µP Output

D7
D0 Data Bus

Control Bus

Figure: The 8085 Bus Structure

 Bus Organization

A group of parallel conductors that carry information is called a

bus. In computer system, each peripheral or memory location is
identified by a binary number called address. One conducting wire
requires to carry one bit.
Address Bus
A group of parallel conducting wires that are used to send a memory
address or a peripheral device address from the microprocessor to
the memory location or the peripheral is called address bus. The
address bus is unidirectional i.e. bits flow only in one direction. The
8085 microprocessor has 16 address lines. Thus, it is capable of
addressing 216 = 65,536 (generally known as 64K) memory locations.

The number of address lines is arbitrary. It is determined by the

designer of a microprocessor based on such considerations as
availability of pins and intended applications of the microprocessor.

The microprocessor uses the address bus to perform the function specified
in step-1.
 Bus Organization

Data Bus
A group of parallel conducting wires used to transfer data between
the microprocessor and peripherals (or memory) is called data bus.
These lines are bidirectional i.e., data flow in both directions between
the microprocessor and peripheral devices (or memory). The 8085
microprocessor has eight data lines which enable the microprocessor
to manipulate 8-bit data ranging from 00 to FF (28 = 256 numbers).

The data bus influences the microprocessor architecture considerably.

It determines the word length and the register size of a microprocessor.
Thus the 8085 microprocessor is called an 8-bit microprocessor.
The microprocessor uses the data bus to perform the function specified in
step-2.
 Bus Organization

Control Bus
The control bus is comprised of various single lines that carry timing
or synchronization signals. These are not groups of lines like address
or data buses, but individual lines that provide a pulse to indicate a
microprocessor operation. The microprocessor generates specific
control signals for every operation it performs.

The microprocessor uses the control bus to perform the function specified
in step-3.
 Memory Read Operation

To read the contents of a memory location, the following steps take

place:
The microprocessor places the 16-bit address of the memory location
on the address bus (Figure).
The address on the address bus is decoded by an external logic circuit
called decoder and identifies the right location.
A15
A0 16-bit memory address Address Bus

Data

Memory

decoder
Memory
8085 Chip
µP

D7
D0 Data Bus

MEMR Memory Read

Figure: Memory Read Operation
 Memory Read Operation

The microprocessor activates a control signal called “memory read”

which enables the memory chip.
The memory places its contents (data) of the specified location on the
data bus.
The microprocessor reads the value of the data bus after a certain
amount of time.
 Internal Data Operations

The internal architecture of the 8085 microprocessor determines how

and what operation can be performed with the data. These operations
are:
1. Store 8-bit data.
2. Perform arithmetic and logical operations.
3. Test for conditions.
4. Sequence the execution of instructions.
5. Store data temporarily during execution in the defined R/W
memory locations called stack.
To perform these operations, the microprocessor requires:
Registers
Arithmetic/Logic unit (ALU)
Timing and control logic
Internal buses (paths for information flow)
 8085 Registers

Figure shows only programmable registers of the 8085 internal

architecture. Programmable means it can be used for data manipulation
by writing instructions.
Accumulator A (8) Flag Register
Registers
B (8) C (8)
General purpose registers
D (8) E (8)
The 8085 microprocessor has
six general purpose registers to H (8) L (8)
store 8-bit data (first operation) Stack Pointer (SP) (16)
during a program execution.
Program Counter (PC) (16)
These registers are identified
as B, C, D, E, H and L as shown
in Figure. 8
Data Bus Address Bus 16
Lines Lines

Can be used singly

Or can be used as register Bidirectional Unidirectional
pairs – BC, DE, and HL to perform
some 16-bit operation Figure: 8085 Programmable Register
 8085 Registers

H and L can be used as a data pointer (holds memory address).

N.B. Some microprocessor do not have these types of register; instead, they
use memory space as their register.
Special Purpose Registers
Accumulator
The accumulator, identified as A, is an 8-bit register which is part of
the arithmetic/logic unit (ALU).
It is used to store 8-bit data and to perform arithmetic and logical
operations (Second operation).
It is used to store the result of an operation.
It is also used to store 8 bit data during I/O transfer.
Flag register
It is an 8-bit register adjacent to the accumulator and part of the ALU.
It is not used as an 8-bit register; five bit positions, out of eight, are used
to store the outputs of the five flip-flops.
 8085 Registers

These five flip-flops will be set or reset after an operation according to

data conditions of the result in the accumulator and other registers.
They are called Zero (Z), Carry (C), Sign (S), Parity (P) and Auxiliary Carry
(AC) flags.
The microprocessor uses these flags to test data conditions (Third
operation).

The bit positions in the flag register are shown in the following figure
D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY

Zero (z) Flag

In the flag register, the flip-flop which is used to indicate a zero result
in the accumulator is called zero flag.
This flag is set to 1, when the result is zero; otherwise it is reset.
 8085 Registers

10110011
+ 01001101
1 00000000

Carry (C) Flag

In the flag register, the flip-flop which is used to indicate a carry or
borrow is called carry flag.
This flag is set to 1, if there is a carry or borrow from an arithmetic
operation; otherwise it is reset.
The Jump instruction, JC ( Jump On Carry ) is associated with this
flag.

10110101 10110101
+ 01101100 - 11001100
Carry 1 00100001 Borrow 1 11101001
 8085 Registers

Sign (S) Flag

In the flag register, the flip-flop which is used to indicate the sign of
the result in the accumulator is called sign flag.
This flag is set if the result in the accumulator is negative; otherwise it
is reset if the result in the accumulator is positive.
1 Negative; 0 Positive

Parity (P) Flag

In the flag register, the flip-flop which is used to indicate the even
number of 1s or odd number of 1s in the result is called parity flag.
This flag is set for an even number of 1s in the result; otherwise it is
reset for an odd number of 1s.

Auxiliary Carry (AC) Flag

In the flag register, the flip-flop which is used to indicate the auxiliary
carry is called auxiliary carry flag.
 8085 Registers

Auxiliary Carry (AC) Flag

This flag is set when a carry generated by digit D3 and passed to digit
to D4 in an arithmetic operation; otherwise it is reset.
This flag is used internally for BCD (binary-coded decimal) operations.
There is no Jump instruction associated with this flag.
 8085 Registers

Program Counter (PC)

This is a 16-bit register that is used to sequence the execution of the
instructions.
It is also called memory pointer. In 8085 µp, memory locations have 16-bit
addresses, and that is why it is a 16-bit register.
The function of the program counter is to point to the memory address
from which the next instruction is to be fetched, i.e. it always holds the
address of the next instruction. When an instruction is being fetched, the
program counter is incremented by one to point to the next meomry location.
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory pointer, i.e., it
points to a memory location in R/W memory. It holds the current level (top) of
the stack.
The stack is a group of memory locations in the R/W memory that is used
temporary storage of binary information during the execution of a program.
In other words, it is an area of memory used to hold data that will be retrieved
soon.
 8085 Registers

Stack Pointer (SP)

The starting memory location of the stack is defined in the main program,
and space is reserved, usually at the high end of the memory map.
The stack is usually accessed in a Last In First Out (LIFO) fashion.
 Externally Initiated Operations

External devices (or signals) can initiate the following

operations, for which individual pins on the microprocessor
chip are assigned: Reset, Interrupt, Ready, Hold.
Reset
When the reset is activated, all operations are stopped and the program
counter is cleared, i.e., it holds 0000H.
Interrupt
The microprocessor can be interrupted from the normal execution of
instructions and asked to execute some other instructions called service
routine.
After completing the service routine, the microprocessor resumes its
normal operation.
Ready
The 8085 µP has a pin called READY. If the external signal at this READY
pin is low, the microprocessor enters into a wait state.
This signal is used primarily to synchronize slower peripherals with the
microprocessor.
 Externally Initiated Operations

Hold
The 8085 µP has a pin called HOLD. When this pin is activated by an
external signal, the microprocessor stops executing instructions and
relinquishes control of busses and allows the external peripheral to use
them.
This signal is used primarily in Direct Memory Access (DMA) data
transfer.
 Memory

Memory is an essential component of a microprocessor /

microcomputer system which is used to store information (binary
data and instructions). There are various types of memory that can
be classified in two main groups:
Main (or prime) memory
Storage memory
Main (or prime) memory
Microprocessor uses it in executing and storing programs.
It should be able to respond fast enough to keep up the execution
speed of the µP.
It should be random access memory, meaning that the µP should
be able to access information from any register with the same
speed (independent of its place in the memory chip).
The size of the main memory (capacity of memory, e.g. 64KB,
128KB etc.) determines how large a program the system can
process.
Main (or Prime) memory is divide into two main groups:

Read/Write memory (R/WM) or Random Access Memory (RAM)

Read Only Memory (ROM)
Read/Write memory (R/WM) or Random Access Memory (RAM)
Storage memory

Microprocessor uses it to store programs and results after the

completion of program execution.
Information stored in it is nonvolatile, meaning information
remains intact even if the system is turned off.
Generally, it is not a part of any system; it is made part of the
system when stored programs need to be accessed.
Microprocessor cannot directly execute or process programs
stored in it; programs need to be copied into the main memory (i.e.
R/W memory)
The size of the storage memory (i.e. capacity of memory) is
unlimited; when one disk or tape is full, the next one can be used.
 Memory

The Output is Low The Output is High High Impedance

Memory Register
 A Group of Memory Registers

D0 D1 D2 D3

o o o o
WR

D Q D Q D Q D Q

EN EN EN EN
I0 I1 I2 I3

D Q D Q D Q D Q
WR Input Buffers

EN EN EN EN
EN0 Memory Reg. 0

EN1 Memory Reg. 1

D Q D Q D Q D Q
EN2 Memory Reg. 2
EN EN EN EN

EN3 Memory Reg. 3

D Q D Q D Q D Q RD Output Buffers

EN EN EN EN

O0 O1 O2 O3

o o o o
RD

D0 D1 D2 D3
Memory
Memory
 Memory

A3 A3
A2 A2

CS RD WR CS RD WR
M1 M2
0011 R3 1011 R11
A1 0010 R2 A1 1010 R10
A0 0001 R1 A0 1001 R9
0000 R0 1000 R8

I/O I/O
Lines Lines
 Memory

CS RD WR CS RD

Address R/W M Address ROM

Lines Lines

I/O I/O
Lines Lines
 Memory Map and Addresses

The memory map is a picture representation of the

address range and shows where the different memory
chips are located within the address range.

0000 0000
EPROM Address Range of EPROM Chip
3FFF
4400
RAM 1 Address Range of 1st RAM Chip
5FFF
6000
RAM 2 Address Range of 2nd RAM Chip
Address
Range

8FFF
9000
RAM 3 Address Range of 3rd RAM Chip
A3FF
A400

RAM 4 Address Range of 4th RAM Chip

F7FF
FFFF
 Memory Map and Addresses

A15
A14
A13 MEMRD
A12
MEMWR
A11
A10
A9
A8 CS RD WR
A7
A6

Internal Decoder
A5

A4 256 Registers
A3
A2

A1

A0

I/O
 Memory Map and Addresses

A15
A14
A13 MEMRD
A12
MEMWR
A11
A10
A9
A8 CS RD WR
A7
A6

Internal Decoder
A5

A4 256 Registers
A3
A2

A1

A0

I/O
 Memory Map and Addresses

A15
A14 MEMRD
A13
MEMWR
A12
A11
A10
CS RD WR
A9
A8
A7

Internal Decoder
A6
A5 1024 Registers

A4
A3
A2
A1
A0

I/O
Memory and Instruction Fetch

Instruction Fetch Operation

Memory Classification

Memory Classification
 ROM Memory Cell

Functional Representation of ROM Memory Cell

 A3 A3

A2 A2

CS RD WR CS RD WR
M1 M2

0011 R3 1011 R11

A1 0010 R2 A1 1010 R10

0001 R1 A0 1001 R9
A0
0000 R0 1000 R8

I/O I/O
Lines Lines

R3

R2 R1
Address
R0 M1 R/W M Lines